* [PATCH v2 2/2] pwm: imx: enable clocks during PWM register accesses
2023-09-06 13:39 [PATCH v2 1/2] clk: implement clk_get_optional helper Bastian Krause
@ 2023-09-06 13:39 ` Bastian Krause
2023-09-06 14:09 ` [PATCH v2 1/2] clk: implement clk_get_optional helper Sascha Hauer
1 sibling, 0 replies; 3+ messages in thread
From: Bastian Krause @ 2023-09-06 13:39 UTC (permalink / raw)
To: barebox; +Cc: Ahmad Fatoum, Uwe Kleine-König, Bastian Krause, Marco Felsch
From: Ahmad Fatoum <a.fatoum@pengutronix.de>
This is a port of Linux commit 9f4c8f9607c3147d291b70c13dd01c738ed41faf:
| Author: Anson Huang <anson.huang@nxp.com>
| AuthorDate: Wed Dec 19 05:24:58 2018 +0000
| Commit: Thierry Reding <thierry.reding@gmail.com>
| CommitDate: Mon Dec 24 12:06:56 2018 +0100
|
| pwm: imx: Add ipg clock operation
|
| i.MX PWM module's ipg_clk_s is for PWM register access, on most of i.MX
| SoCs, this ipg_clk_s is from system ipg clock or perclk which is always
| enabled, but on i.MX7D, the ipg_clk_s is from PWM1_CLK_ROOT which is
| controlled by CCGR132, that means the CCGR132 MUST be enabled first
| before accessing PWM registers on i.MX7D. This patch adds ipg clock
| operation to make sure register access successfully on i.MX7D and it
| fixes Linux kernel boot up hang during PWM driver probe.
|
| Fixes: 4a23e6ee9f69 ("ARM: dts: imx7d-sdb: Restore pwm backlight support")
| Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
| Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
Unlike the Linux version, we make clk_ipg optional to reduce changes for
older SoCs.
This fixes system hang during PWM access on i.MX8M and presumably i.MX7.
On top of that, integrate Linux commit
15d4dbd601591858611184f9ddeb5bf21569159c:
| Author: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
| AuthorDate: Sun Feb 9 22:31:06 2020 +0100
| Commit: Thierry Reding <thierry.reding@gmail.com>
| CommitDate: Mon Mar 30 16:55:25 2020 +0200
|
| pwm: imx27: Fix clock handling in pwm_imx27_apply()
|
| pwm_imx27_apply() enables the clocks if the previous PWM state was
| disabled. Given that the clocks are supposed to be left on iff the PWM
| is running, the decision to disable the clocks at the end of the
| function must not depend on the previous state.
|
| Without this fix the enable count of the two affected clocks increases
| by one whenever ->apply() changes from one disabled state to another.
|
| Fixes: bd88d319abe9 ("pwm: imx27: Unconditionally write state to hardware")
| Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
| Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
In barebox, this means calling imx_pwm_clk_disable_v2() conditionally
iff the PWM is left disabled, otherwise keep the clocks enabled.
Reported-by: Bastian Krause <bst@pengutronix.de>
Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Reviewed-by: Marco Felsch <m.felsch@pengutronix.de>
Signed-off-by: Bastian Krause <bst@pengutronix.de>
---
Changes since (implicit) v1:
- also port Linux commit 15d4dbd601591858611184f9ddeb5bf21569159c,
leaving the clocks on iff the PWM is enabled
---
drivers/pwm/pwm-imx.c | 45 ++++++++++++++++++++++++++++++++++++++++++-
1 file changed, 44 insertions(+), 1 deletion(-)
diff --git a/drivers/pwm/pwm-imx.c b/drivers/pwm/pwm-imx.c
index 2dc7e4cfd64..c9db4aef344 100644
--- a/drivers/pwm/pwm-imx.c
+++ b/drivers/pwm/pwm-imx.c
@@ -36,7 +36,7 @@
#define MX3_PWMCR_EN (1 << 0)
struct imx_chip {
- struct clk *clk_per;
+ struct clk *clk_per, *clk_ipg;
void __iomem *mmio_base;
@@ -93,14 +93,42 @@ static void imx_pwm_set_enable_v1(struct pwm_chip *chip, bool enable)
writel(val, imx->mmio_base + MX1_PWMC);
}
+static int imx_pwm_clk_enable_v2(struct imx_chip *imx)
+{
+ int ret;
+
+ ret = clk_enable(imx->clk_ipg);
+ if (ret)
+ return ret;
+
+ ret = clk_prepare_enable(imx->clk_per);
+ if (ret) {
+ clk_disable_unprepare(imx->clk_ipg);
+ return ret;
+ }
+
+ return 0;
+}
+
+static void imx_pwm_clk_disable_v2(struct imx_chip *imx)
+{
+ clk_disable_unprepare(imx->clk_per);
+ clk_disable_unprepare(imx->clk_ipg);
+}
+
static int imx_pwm_config_v2(struct pwm_chip *chip,
int duty_ns, int period_ns)
{
struct imx_chip *imx = to_imx_chip(chip);
unsigned long long c;
unsigned long period_cycles, duty_cycles, prescale;
+ int ret;
u32 cr;
+ ret = imx_pwm_clk_enable_v2(imx);
+ if (ret)
+ return ret;
+
c = clk_get_rate(imx->clk_per);
c = c * period_ns;
do_div(c, 1000000000);
@@ -134,6 +162,9 @@ static int imx_pwm_config_v2(struct pwm_chip *chip,
writel(cr, imx->mmio_base + MX3_PWMCR);
+ if (!chip->state.p_enable)
+ imx_pwm_clk_disable_v2(imx);
+
return 0;
}
@@ -141,6 +172,11 @@ static void imx_pwm_set_enable_v2(struct pwm_chip *chip, bool enable)
{
struct imx_chip *imx = to_imx_chip(chip);
u32 val;
+ int ret;
+
+ ret = imx_pwm_clk_enable_v2(imx);
+ if (WARN_ON(ret))
+ return;
val = readl(imx->mmio_base + MX3_PWMCR);
@@ -150,6 +186,9 @@ static void imx_pwm_set_enable_v2(struct pwm_chip *chip, bool enable)
val &= ~MX3_PWMCR_EN;
writel(val, imx->mmio_base + MX3_PWMCR);
+
+ if (!enable)
+ imx_pwm_clk_disable_v2(imx);
}
static int imx_pwm_apply(struct pwm_chip *chip, const struct pwm_state *state)
@@ -215,6 +254,10 @@ static int imx_pwm_probe(struct device *dev)
imx = xzalloc(sizeof(*imx));
+ imx->clk_ipg = clk_get_optional(dev, "ipg");
+ if (IS_ERR(imx->clk_ipg))
+ return PTR_ERR(imx->clk_ipg);
+
imx->clk_per = clk_get(dev, "per");
if (IS_ERR(imx->clk_per))
return PTR_ERR(imx->clk_per);
--
2.39.2
^ permalink raw reply [flat|nested] 3+ messages in thread* Re: [PATCH v2 1/2] clk: implement clk_get_optional helper
2023-09-06 13:39 [PATCH v2 1/2] clk: implement clk_get_optional helper Bastian Krause
2023-09-06 13:39 ` [PATCH v2 2/2] pwm: imx: enable clocks during PWM register accesses Bastian Krause
@ 2023-09-06 14:09 ` Sascha Hauer
1 sibling, 0 replies; 3+ messages in thread
From: Sascha Hauer @ 2023-09-06 14:09 UTC (permalink / raw)
To: Bastian Krause; +Cc: barebox, Ahmad Fatoum, Uwe Kleine-König, Marco Felsch
On Wed, Sep 06, 2023 at 03:39:27PM +0200, Bastian Krause wrote:
> From: Ahmad Fatoum <a.fatoum@pengutronix.de>
>
> Lack of clock can be ok at times and thus the clk API accepts NULL
> arguments and treats them as no-op.
>
> Linux provides a clk_get_optional function to simplify code with such
> optional code, so let's provide an equivalent for barebox.
>
> Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
> Reviewed-by: Marco Felsch <m.felsch@pengutronix.de>
> ---
> No changes since (implicit) v1.
> ---
> include/linux/clk.h | 19 +++++++++++++++++++
> 1 file changed, 19 insertions(+)
Applied, thanks
Sascha
>
> diff --git a/include/linux/clk.h b/include/linux/clk.h
> index 8509d5ece9d..82022e78e39 100644
> --- a/include/linux/clk.h
> +++ b/include/linux/clk.h
> @@ -932,4 +932,23 @@ static inline void clk_bulk_disable(int num_clks,
>
> #endif
>
> +/**
> + * clk_get_optional - lookup and obtain a reference to an optional clock
> + * producer.
> + * @dev: device for clock "consumer"
> + * @id: clock consumer ID
> + *
> + * Behaves the same as clk_get() except where there is no clock producer. In
> + * this case, instead of returning -ENOENT, the function returns NULL.
> + */
> +static inline struct clk *clk_get_optional(struct device *dev, const char *id)
> +{
> + struct clk *clk = clk_get(dev, id);
> +
> + if (clk == ERR_PTR(-ENOENT))
> + return NULL;
> +
> + return clk;
> +}
> +
> #endif
> --
> 2.39.2
>
>
>
--
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^ permalink raw reply [flat|nested] 3+ messages in thread