[PATCH v2 05/29] i.MX: HABv4: extend support to i.MX8M SoCs

[Marco Felsch <m.felsch@pengutronix.de>]

From: Rouven Czerwinski <r.czerwinski@pengutronix.de>

Instead of only supporting i.MX8MQ based boards, extend support to the
whole i.MX8M family.

OCRAM address values were taken from AN12263 Rev1 06/2020. While at it
turn the OCRAM addresses into defines as well and remove the superfluous
comment lines.

The fuses do match with the i.MX8MQ except for the DIR_BT_DIS fuse.

Signed-off-by: Rouven Czerwinski <r.czerwinski@pengutronix.de>
[m.felsch@pengutronix.de: adapt commit message]
[m.felsch@pengutronix.de: integrate review feedback]
Signed-off-by: Marco Felsch <m.felsch@pengutronix.de>
---
Changelog:
v2:
- unchanged
- v1-link: https://lore.barebox.org/barebox/20231010143314.2031253-1-m.felsch@pengutronix.de/T/#t

 drivers/hab/hab.c   |  6 +++++-
 drivers/hab/habv4.c | 26 ++++++++++++++++++--------
 2 files changed, 23 insertions(+), 9 deletions(-)

diff --git a/drivers/hab/hab.c b/drivers/hab/hab.c
index 04f88175c857..1edc495aee94 100644
--- a/drivers/hab/hab.c
+++ b/drivers/hab/hab.c
@@ -169,6 +169,10 @@ static int imx8m_hab_lockdown_device_ocotp(void)
 	if (ret < 0)
 		return ret;
 
+	/* Only i.MX8MQ requires fusing of DIR_BT_DIS */
+	if (!cpu_is_mx8mq())
+		return ret;
+
 	return imx_ocotp_write_field(MX8MQ_OCOTP_DIR_BT_DIS, 1);
 }
 
@@ -239,7 +243,7 @@ static struct imx_hab_ops *imx_get_hab_ops(void)
 		ops = &imx_hab_ops_iim;
 	else if (IS_ENABLED(CONFIG_HABV4) && cpu_is_mx6())
 		ops = &imx6_hab_ops_ocotp;
-	else if (IS_ENABLED(CONFIG_HABV4) && cpu_is_mx8mq())
+	else if (IS_ENABLED(CONFIG_HABV4) && cpu_is_mx8m())
 		ops = &imx8m_hab_ops_ocotp;
 	else
 		return NULL;
diff --git a/drivers/hab/habv4.c b/drivers/hab/habv4.c
index bbfbf697b520..0238b98dfb7e 100644
--- a/drivers/hab/habv4.c
+++ b/drivers/hab/habv4.c
@@ -193,18 +193,34 @@ static enum hab_status hab_sip_report_status(enum hab_config *config,
 	return (enum hab_status)res.a0;
 }
 
+#define IMX8MQ_ROM_OCRAM_ADDRESS	0x9061C0
+#define IMX8MM_ROM_OCRAM_ADDRESS	0x908040
+#define IMX8MN_ROM_OCRAM_ADDRESS	0x908040
+#define IMX8MP_ROM_OCRAM_ADDRESS	0x90D040
+
 static enum hab_status imx8m_read_sram_events(enum hab_status status,
 					     uint32_t index, void *event,
 					     uint32_t *bytes)
 {
 	struct hab_event_record *events[10];
 	int num_events = 0;
-	char *sram = (char *)0x9061c0;
+	char *sram;
 	int i = 0;
 	int internal_index = 0;
 	char *end = 0;
 	struct hab_event_record *search;
 
+	if (cpu_is_mx8mq())
+		sram = (char *)IMX8MQ_ROM_OCRAM_ADDRESS;
+	else if (cpu_is_mx8mm())
+		sram = (char *)IMX8MM_ROM_OCRAM_ADDRESS;
+	else if (cpu_is_mx8mn())
+		sram = (char *)IMX8MN_ROM_OCRAM_ADDRESS;
+	else if (cpu_is_mx8mp())
+		sram = (char *)IMX8MP_ROM_OCRAM_ADDRESS;
+	else
+		return HAB_STATUS_FAILURE;
+
 	/*
 	 * AN12263 HABv4 Guidelines and Recommendations
 	 * recommends the address and size, however errors are usually contained
@@ -590,7 +606,7 @@ static int imx8m_hab_get_status(void)
 
 static int init_imx8m_hab_get_status(void)
 {
-	if (!cpu_is_mx8mq())
+	if (!cpu_is_mx8m())
 		/* can happen in multi-image builds and is not an error */
 		return 0;
 
@@ -602,12 +618,6 @@ static int init_imx8m_hab_get_status(void)
 
 	return 0;
 }
-
-/*
- *
- *
- *
- */
 postmmu_initcall(init_imx8m_hab_get_status);
 
 static int init_imx6_hab_get_status(void)
-- 
2.39.2