[PATCH 4/7] ARM: stm32mp: don't re-enable DBGCFGR clock

[Ahmad Fatoum <a.fatoum@pengutronix.de>]

TF-A will already enable the DBGMCU peripheral for us, so let's
skip setting the bit. This is useful, because while the peripheral's
base address stays the same between MP15 and MP13, the clock's offset
within the RCC peripheral doesn't, so by skipping the clock enablement,
we avoid having to differentiate between MP13 and MP15 that early.

Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
---
 include/mach/stm32mp/revision.h | 4 ----
 1 file changed, 4 deletions(-)

diff --git a/include/mach/stm32mp/revision.h b/include/mach/stm32mp/revision.h
index 63bdcb3a4dbb..47e2651432bc 100644
--- a/include/mach/stm32mp/revision.h
+++ b/include/mach/stm32mp/revision.h
@@ -64,9 +64,6 @@ int stm32mp_package(void);
 #define DBGMCU_IDC_REV_ID_MASK	GENMASK(31, 16)
 #define DBGMCU_IDC_REV_ID_SHIFT	16
 
-#define RCC_DBGCFGR		(STM32_RCC_BASE + 0x080C)
-#define RCC_DBGCFGR_DBGCKEN	BIT(8)
-
 /* BSEC OTP index */
 #define BSEC_OTP_RPN	1
 #define BSEC_OTP_PKG	16
@@ -77,7 +74,6 @@ int stm32mp_package(void);
 
 static inline u32 stm32mp_read_idc(void)
 {
-	setbits_le32(RCC_DBGCFGR, RCC_DBGCFGR_DBGCKEN);
 	return readl(IOMEM(DBGMCU_IDC));
 }
 
-- 
2.39.2