From: Sascha Hauer <sha@pengutronix.de>
To: Ahmad Fatoum <a.fatoum@pengutronix.de>
Cc: barebox@lists.infradead.org
Subject: Re: [PATCH 1/2] mci: core: check for both 3.3v and 1.8v DDR support
Date: Thu, 23 Nov 2023 15:54:42 +0100 [thread overview]
Message-ID: <20231123145442.GO3359458@pengutronix.de> (raw)
In-Reply-To: <20231123103808.432548-1-a.fatoum@pengutronix.de>
On Thu, Nov 23, 2023 at 11:38:07AM +0100, Ahmad Fatoum wrote:
> We don't yet support the higher speed modes that require voltage
> switching, so regulator interaction in barebox was so far limited to
> enabling the supply. barebox also doesn't keep track what voltage the
> eMMC is running on, so it doesn't know whether MMC_CAP_MMC_1_8V_DDR
> or MMC_CAP_MMC_3_3V_DDR is the correct bit to check. Let's just accept
> either until we add support for higher speed modes. barebox will
> fallback to the non-DDR speed mode anyway if it fails to read the
> ext_csd using it.
>
> Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
> ---
> drivers/mci/mci-core.c | 8 +++++++-
> 1 file changed, 7 insertions(+), 1 deletion(-)
Applied, thanks
Sascha
>
> diff --git a/drivers/mci/mci-core.c b/drivers/mci/mci-core.c
> index 175753cca5d7..07eca96a9d61 100644
> --- a/drivers/mci/mci-core.c
> +++ b/drivers/mci/mci-core.c
> @@ -1289,7 +1289,13 @@ static int mci_mmc_select_hs_ddr(struct mci *mci)
> struct mci_host *host = mci->host;
> int ret;
>
> - if (!(mci_caps(mci) & MMC_CAP_MMC_1_8V_DDR))
> + /*
> + * barebox MCI core does not change voltage, so we don't know here
> + * if we should check for the 1.8v or 3.3v mode. Until we support
> + * higher speed modes that require voltage switching like HS200/HS400,
> + * let's just check for either bit.
> + */
> + if (!(mci_caps(mci) & (MMC_CAP_MMC_1_8V_DDR | MMC_CAP_MMC_3_3V_DDR)))
> return 0;
>
> ret = mci_mmc_try_bus_width(mci, host->bus_width, MMC_TIMING_MMC_DDR52);
> --
> 2.39.2
>
>
>
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prev parent reply other threads:[~2023-11-23 14:56 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-11-23 10:38 Ahmad Fatoum
2023-11-23 10:38 ` [PATCH 2/2] mci: stm32_sdmmc2: enable eMMC 52MHz DDR mode Ahmad Fatoum
2023-11-23 10:54 ` Ahmad Fatoum
2023-11-23 14:54 ` Sascha Hauer [this message]
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