* [PATCH v2 0/8] ARM: i.MX93: TQMA93xx: Add LGA variant @ 2024-02-05 7:45 Sascha Hauer 2024-02-05 7:45 ` [PATCH v2 1/8] i2c: lpi2c: determine clk rate during probe Sascha Hauer ` (8 more replies) 0 siblings, 9 replies; 12+ messages in thread From: Sascha Hauer @ 2024-02-05 7:45 UTC (permalink / raw) To: Barebox List The TQ i.MX93 boards come in different variants. This series adds support for the LGA variant. Fortunately the TQ boards all have a EEPROM equipped from which the variant can be read, so this series adds the necessary pieces to to I2C in PBL on i.MX93 and also the common EEPROM parsing code. The EEPROM parsing code could be reused on other TQ boards barebox has support for, like the tqmls1046a, tqma6ul and tqma8mp. Doing so is left for the future, for now the code is only used to detect the i.MX93 board variant. Sascha Hauer (8): i2c: lpi2c: determine clk rate during probe i2c: lpi2c: use udelay for timeout loops i2c: lpi2c: add PBL support pbl: eeprom: return error from eeprom_read() common: add TQ EEPROM support ARM: i.MX9: add i2c base address defines ARM: i.MX9: rename TQ i.MX93 board to TQMA93XX ARM: i.MX: tqma93xx: Add LGA board variant arch/arm/boards/Makefile | 2 +- arch/arm/boards/tqma93xx/Makefile | 2 + .../boards/{tqmba9xxxca => tqma93xx}/board.c | 0 arch/arm/boards/tqma93xx/lowlevel.c | 109 ++ .../lpddr4x_tqma93xxca_timing.c | 0 .../tqma93xx/lpddr4x_tqma93xxla_timing.c | 1482 +++++++++++++++++ arch/arm/boards/tqmba9xxxca/Makefile | 2 - arch/arm/boards/tqmba9xxxca/lowlevel.c | 46 - arch/arm/configs/imx_v8_defconfig | 2 +- arch/arm/configs/multi_v8_defconfig | 2 +- arch/arm/dts/Makefile | 3 +- arch/arm/dts/imx93-tqma9352-mba93xxca.dts | 38 +- arch/arm/dts/imx93-tqma9352-mba93xxla.dts | 5 + arch/arm/dts/imx93-tqma93xx.dtsi | 37 + arch/arm/mach-imx/Kconfig | 7 +- common/boards/Kconfig | 3 + common/boards/Makefile | 1 + common/boards/tq/Makefile | 1 + common/boards/tq/tq_eeprom.c | 140 ++ drivers/i2c/busses/Makefile | 2 +- drivers/i2c/busses/i2c-imx-lpi2c.c | 70 +- images/Makefile.imx | 6 +- include/mach/imx/imx9-regs.h | 8 + include/pbl/eeprom.h | 11 +- include/pbl/i2c.h | 1 + include/tq_eeprom.h | 196 +++ 26 files changed, 2063 insertions(+), 113 deletions(-) create mode 100644 arch/arm/boards/tqma93xx/Makefile rename arch/arm/boards/{tqmba9xxxca => tqma93xx}/board.c (100%) create mode 100644 arch/arm/boards/tqma93xx/lowlevel.c rename arch/arm/boards/{tqmba9xxxca => tqma93xx}/lpddr4x_tqma93xxca_timing.c (100%) create mode 100644 arch/arm/boards/tqma93xx/lpddr4x_tqma93xxla_timing.c delete mode 100644 arch/arm/boards/tqmba9xxxca/Makefile delete mode 100644 arch/arm/boards/tqmba9xxxca/lowlevel.c create mode 100644 arch/arm/dts/imx93-tqma9352-mba93xxla.dts create mode 100644 arch/arm/dts/imx93-tqma93xx.dtsi create mode 100644 common/boards/tq/Makefile create mode 100644 common/boards/tq/tq_eeprom.c create mode 100644 include/tq_eeprom.h -- 2.39.2 ^ permalink raw reply [flat|nested] 12+ messages in thread
* [PATCH v2 1/8] i2c: lpi2c: determine clk rate during probe 2024-02-05 7:45 [PATCH v2 0/8] ARM: i.MX93: TQMA93xx: Add LGA variant Sascha Hauer @ 2024-02-05 7:45 ` Sascha Hauer 2024-02-05 7:45 ` [PATCH v2 2/8] i2c: lpi2c: use udelay for timeout loops Sascha Hauer ` (7 subsequent siblings) 8 siblings, 0 replies; 12+ messages in thread From: Sascha Hauer @ 2024-02-05 7:45 UTC (permalink / raw) To: Barebox List The clock rate is not expected to change during runtime, so we can determine it during probe instead of later when actually transferring messages. This helps us to integrate PBL support into the driver where we don't have clk_get_rate() available. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> --- drivers/i2c/busses/i2c-imx-lpi2c.c | 11 +++++------ 1 file changed, 5 insertions(+), 6 deletions(-) diff --git a/drivers/i2c/busses/i2c-imx-lpi2c.c b/drivers/i2c/busses/i2c-imx-lpi2c.c index f28a445601..91203d90be 100644 --- a/drivers/i2c/busses/i2c-imx-lpi2c.c +++ b/drivers/i2c/busses/i2c-imx-lpi2c.c @@ -104,6 +104,7 @@ struct lpi2c_imx_struct { unsigned int txfifosize; unsigned int rxfifosize; enum lpi2c_imx_mode mode; + unsigned long clk_rate; }; static void lpi2c_imx_intctrl(struct lpi2c_imx_struct *lpi2c_imx, @@ -197,23 +198,19 @@ static void lpi2c_imx_stop(struct lpi2c_imx_struct *lpi2c_imx) static int lpi2c_imx_config(struct lpi2c_imx_struct *lpi2c_imx) { u8 prescale, filt, sethold, datavd; - unsigned int clk_rate, clk_cycle, clkhi, clklo; + unsigned int clk_cycle, clkhi, clklo; enum lpi2c_imx_pincfg pincfg; unsigned int temp; lpi2c_imx_set_mode(lpi2c_imx); - clk_rate = clk_get_rate(lpi2c_imx->clks[0].clk); - if (!clk_rate) - return -EINVAL; - if (lpi2c_imx->mode == HS || lpi2c_imx->mode == ULTRA_FAST) filt = 0; else filt = 2; for (prescale = 0; prescale <= 7; prescale++) { - clk_cycle = clk_rate / ((1 << prescale) * lpi2c_imx->bitrate) + clk_cycle = lpi2c_imx->clk_rate / ((1 << prescale) * lpi2c_imx->bitrate) - 3 - (filt >> 1); clkhi = DIV_ROUND_UP(clk_cycle, I2C_CLK_RATIO + 1); clklo = clk_cycle - clkhi; @@ -493,6 +490,8 @@ static int lpi2c_imx_probe(struct device *dev) if (ret) return ret; + lpi2c_imx->clk_rate = clk_get_rate(lpi2c_imx->clks[0].clk); + temp = readl(lpi2c_imx->base + LPI2C_PARAM); lpi2c_imx->txfifosize = 1 << (temp & 0x0f); lpi2c_imx->rxfifosize = 1 << ((temp >> 8) & 0x0f); -- 2.39.2 ^ permalink raw reply [flat|nested] 12+ messages in thread
* [PATCH v2 2/8] i2c: lpi2c: use udelay for timeout loops 2024-02-05 7:45 [PATCH v2 0/8] ARM: i.MX93: TQMA93xx: Add LGA variant Sascha Hauer 2024-02-05 7:45 ` [PATCH v2 1/8] i2c: lpi2c: determine clk rate during probe Sascha Hauer @ 2024-02-05 7:45 ` Sascha Hauer 2024-02-05 7:45 ` [PATCH v2 3/8] i2c: lpi2c: add PBL support Sascha Hauer ` (6 subsequent siblings) 8 siblings, 0 replies; 12+ messages in thread From: Sascha Hauer @ 2024-02-05 7:45 UTC (permalink / raw) To: Barebox List In PBL we don't have get_time_ns() and is_timeout() available. In preparation for adding PBL support to the driver replace the timeout loops with udelay() which we have available in PBL. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> --- drivers/i2c/busses/i2c-imx-lpi2c.c | 25 +++++++++++++++---------- 1 file changed, 15 insertions(+), 10 deletions(-) diff --git a/drivers/i2c/busses/i2c-imx-lpi2c.c b/drivers/i2c/busses/i2c-imx-lpi2c.c index 91203d90be..42f7b37143 100644 --- a/drivers/i2c/busses/i2c-imx-lpi2c.c +++ b/drivers/i2c/busses/i2c-imx-lpi2c.c @@ -116,7 +116,7 @@ static void lpi2c_imx_intctrl(struct lpi2c_imx_struct *lpi2c_imx, static int lpi2c_imx_bus_busy(struct lpi2c_imx_struct *lpi2c_imx) { unsigned int temp; - u64 start = get_time_ns(); + unsigned int timeout = 500000; while (1) { temp = readl(lpi2c_imx->base + LPI2C_MSR); @@ -130,7 +130,8 @@ static int lpi2c_imx_bus_busy(struct lpi2c_imx_struct *lpi2c_imx) if (temp & (MSR_BBF | MSR_MBF)) break; - if (is_timeout(start, 500 * MSECOND)) { + udelay(1); + if (!timeout--) { dev_dbg(&lpi2c_imx->adapter.dev, "bus not work\n"); return -ETIMEDOUT; } @@ -177,7 +178,7 @@ static int lpi2c_imx_start(struct lpi2c_imx_struct *lpi2c_imx, static void lpi2c_imx_stop(struct lpi2c_imx_struct *lpi2c_imx) { unsigned int temp; - u64 start = get_time_ns(); + unsigned int timeout = 500000; writel(GEN_STOP << 8, lpi2c_imx->base + LPI2C_MTDR); @@ -186,7 +187,8 @@ static void lpi2c_imx_stop(struct lpi2c_imx_struct *lpi2c_imx) if (temp & MSR_SDF) break; - if (is_timeout(start, 500 * MSECOND)) { + udelay(1); + if (!timeout--) { dev_dbg(&lpi2c_imx->adapter.dev, "stop timeout\n"); break; } @@ -284,7 +286,7 @@ static int lpi2c_imx_master_disable(struct lpi2c_imx_struct *lpi2c_imx) static int lpi2c_imx_txfifo_empty(struct lpi2c_imx_struct *lpi2c_imx) { u32 txcnt; - u64 start = get_time_ns(); + unsigned int timeout = 500000; do { txcnt = readl(lpi2c_imx->base + LPI2C_MFSR) & 0xff; @@ -294,7 +296,8 @@ static int lpi2c_imx_txfifo_empty(struct lpi2c_imx_struct *lpi2c_imx) return -EIO; } - if (is_timeout(start, 500 * MSECOND)) { + udelay(1); + if (!timeout--) { dev_dbg(&lpi2c_imx->adapter.dev, "txfifo empty timeout\n"); return -ETIMEDOUT; } @@ -326,12 +329,13 @@ static void lpi2c_imx_set_rx_watermark(struct lpi2c_imx_struct *lpi2c_imx) static int lpi2c_imx_write_txfifo(struct lpi2c_imx_struct *lpi2c_imx) { unsigned int data, remaining; - uint64_t start = get_time_ns(); + unsigned int timeout = 100000;; do { u32 cnt = readl(lpi2c_imx->base + LPI2C_MFSR) & 0xff; if (cnt == lpi2c_imx->txfifosize) { - if (is_timeout(start, 100 * MSECOND)) + udelay(1); + if (!timeout--) return -EIO; continue; } @@ -349,12 +353,13 @@ static int lpi2c_imx_read_rxfifo(struct lpi2c_imx_struct *lpi2c_imx) { unsigned int remaining; unsigned int data; - uint64_t start = get_time_ns(); + unsigned int timeout = 100000;; do { data = readl(lpi2c_imx->base + LPI2C_MRDR); if (data & MRDR_RXEMPTY) { - if (is_timeout(start, 100 * MSECOND)) + udelay(1); + if (!timeout--) return -EIO; continue; } -- 2.39.2 ^ permalink raw reply [flat|nested] 12+ messages in thread
* [PATCH v2 3/8] i2c: lpi2c: add PBL support 2024-02-05 7:45 [PATCH v2 0/8] ARM: i.MX93: TQMA93xx: Add LGA variant Sascha Hauer 2024-02-05 7:45 ` [PATCH v2 1/8] i2c: lpi2c: determine clk rate during probe Sascha Hauer 2024-02-05 7:45 ` [PATCH v2 2/8] i2c: lpi2c: use udelay for timeout loops Sascha Hauer @ 2024-02-05 7:45 ` Sascha Hauer 2024-02-05 7:45 ` [PATCH v2 4/8] pbl: eeprom: return error from eeprom_read() Sascha Hauer ` (5 subsequent siblings) 8 siblings, 0 replies; 12+ messages in thread From: Sascha Hauer @ 2024-02-05 7:45 UTC (permalink / raw) To: Barebox List This adds PBL support to the lpi2c driver which can be used for early I2C support on i.MX93. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> --- drivers/i2c/busses/Makefile | 2 +- drivers/i2c/busses/i2c-imx-lpi2c.c | 34 ++++++++++++++++++++++++++++++ include/pbl/i2c.h | 1 + 3 files changed, 36 insertions(+), 1 deletion(-) diff --git a/drivers/i2c/busses/Makefile b/drivers/i2c/busses/Makefile index 48f9b5be04..b4225995c0 100644 --- a/drivers/i2c/busses/Makefile +++ b/drivers/i2c/busses/Makefile @@ -4,7 +4,7 @@ obj-$(CONFIG_I2C_BCM283X) += i2c-bcm283x.o obj-$(CONFIG_I2C_GPIO) += i2c-gpio.o obj-$(CONFIG_I2C_IMX) += i2c-imx.o lwl-$(CONFIG_I2C_IMX_EARLY) += i2c-imx-early.o -obj-$(CONFIG_I2C_IMX_LPI2C) += i2c-imx-lpi2c.o +obj-pbl-$(CONFIG_I2C_IMX_LPI2C) += i2c-imx-lpi2c.o obj-$(CONFIG_I2C_MV64XXX) += i2c-mv64xxx.o obj-$(CONFIG_I2C_OMAP) += i2c-omap.o obj-$(CONFIG_I2C_TEGRA) += i2c-tegra.o diff --git a/drivers/i2c/busses/i2c-imx-lpi2c.c b/drivers/i2c/busses/i2c-imx-lpi2c.c index 42f7b37143..a7d52fb1b1 100644 --- a/drivers/i2c/busses/i2c-imx-lpi2c.c +++ b/drivers/i2c/busses/i2c-imx-lpi2c.c @@ -19,6 +19,7 @@ #include <pinctrl.h> #include <of_gpio.h> #include <of_device.h> +#include <pbl/i2c.h> #include <io.h> #include <i2c/i2c.h> @@ -93,6 +94,7 @@ enum lpi2c_imx_pincfg { struct lpi2c_imx_struct { struct i2c_adapter adapter; + struct pbl_i2c pbl_i2c; int num_clks; struct clk_bulk_data *clks; void __iomem *base; @@ -455,6 +457,36 @@ static int lpi2c_imx_xfer(struct i2c_adapter *adapter, return (result < 0) ? result : num; } +#ifdef __PBL__ + +static int lpi2c_pbl_imx_xfer(struct pbl_i2c *lpi2c, struct i2c_msg *msgs, int num) +{ + struct lpi2c_imx_struct *lpi2c_imx = container_of(lpi2c, struct lpi2c_imx_struct, pbl_i2c); + + return lpi2c_imx_xfer(&lpi2c_imx->adapter, msgs, num); +} + +struct pbl_i2c *imx93_i2c_early_init(void __iomem *regs) +{ + static struct lpi2c_imx_struct lpi2c; + u32 temp; + + lpi2c.base = regs; + + temp = readl(lpi2c.base + LPI2C_PARAM); + printf("%s: 0x%08x\n", __func__, temp); + lpi2c.txfifosize = 1 << (temp & 0x0f); + lpi2c.rxfifosize = 1 << ((temp >> 8) & 0x0f); + lpi2c.bitrate = 100000; + lpi2c.clk_rate = 24000000; + + lpi2c.pbl_i2c.xfer = lpi2c_pbl_imx_xfer; + + return &lpi2c.pbl_i2c; +} + +#else + static const struct of_device_id lpi2c_imx_of_match[] = { { .compatible = "fsl,imx7ulp-lpi2c" }, { }, @@ -517,6 +549,8 @@ static struct driver lpi2c_imx_driver = { }; coredevice_platform_driver(lpi2c_imx_driver); +#endif + MODULE_AUTHOR("Gao Pan <pandy.gao@nxp.com>"); MODULE_DESCRIPTION("I2C adapter driver for LPI2C bus"); MODULE_LICENSE("GPL"); diff --git a/include/pbl/i2c.h b/include/pbl/i2c.h index ea2ae447a3..b31f72bee7 100644 --- a/include/pbl/i2c.h +++ b/include/pbl/i2c.h @@ -18,6 +18,7 @@ static inline int pbl_i2c_xfer(struct pbl_i2c *i2c, struct pbl_i2c *imx8m_i2c_early_init(void __iomem *regs); struct pbl_i2c *imx6_i2c_early_init(void __iomem *regs); struct pbl_i2c *ls1046_i2c_init(void __iomem *regs); +struct pbl_i2c *imx93_i2c_early_init(void __iomem *regs); static inline int i2c_dev_probe(struct pbl_i2c *i2c, int addr, bool onebyte) { -- 2.39.2 ^ permalink raw reply [flat|nested] 12+ messages in thread
* [PATCH v2 4/8] pbl: eeprom: return error from eeprom_read() 2024-02-05 7:45 [PATCH v2 0/8] ARM: i.MX93: TQMA93xx: Add LGA variant Sascha Hauer ` (2 preceding siblings ...) 2024-02-05 7:45 ` [PATCH v2 3/8] i2c: lpi2c: add PBL support Sascha Hauer @ 2024-02-05 7:45 ` Sascha Hauer 2024-02-05 7:45 ` [PATCH v2 5/8] common: add TQ EEPROM support Sascha Hauer ` (4 subsequent siblings) 8 siblings, 0 replies; 12+ messages in thread From: Sascha Hauer @ 2024-02-05 7:45 UTC (permalink / raw) To: Barebox List Reading from an I2C EEPROM can clearly produce errors, so return an error code instead of void. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> --- include/pbl/eeprom.h | 11 +++++++++-- 1 file changed, 9 insertions(+), 2 deletions(-) diff --git a/include/pbl/eeprom.h b/include/pbl/eeprom.h index df868b1a37..4d9ef22fc8 100644 --- a/include/pbl/eeprom.h +++ b/include/pbl/eeprom.h @@ -5,7 +5,7 @@ #include <common.h> #include <pbl/i2c.h> -static inline void eeprom_read(struct pbl_i2c *i2c, u16 client_addr, u32 addr, void *buf, u16 count) +static inline int eeprom_read(struct pbl_i2c *i2c, u16 client_addr, u32 addr, void *buf, u16 count) { u8 msgbuf[2]; struct i2c_msg msg[] = { @@ -27,8 +27,15 @@ static inline void eeprom_read(struct pbl_i2c *i2c, u16 client_addr, u32 addr, v msg[0].len = i; ret = pbl_i2c_xfer(i2c, msg, ARRAY_SIZE(msg)); - if (ret != ARRAY_SIZE(msg)) + if (ret < 0) + return ret; + + if (ret != ARRAY_SIZE(msg)) { pr_err("Failed to read from eeprom@%x: %d\n", client_addr, ret); + return -EIO; + } + + return 0; } #endif -- 2.39.2 ^ permalink raw reply [flat|nested] 12+ messages in thread
* [PATCH v2 5/8] common: add TQ EEPROM support 2024-02-05 7:45 [PATCH v2 0/8] ARM: i.MX93: TQMA93xx: Add LGA variant Sascha Hauer ` (3 preceding siblings ...) 2024-02-05 7:45 ` [PATCH v2 4/8] pbl: eeprom: return error from eeprom_read() Sascha Hauer @ 2024-02-05 7:45 ` Sascha Hauer 2024-02-05 8:11 ` Marco Felsch 2024-02-05 7:45 ` [PATCH v2 6/8] ARM: i.MX9: add i2c base address defines Sascha Hauer ` (3 subsequent siblings) 8 siblings, 1 reply; 12+ messages in thread From: Sascha Hauer @ 2024-02-05 7:45 UTC (permalink / raw) To: Barebox List Many TQ boards have an EEPROM with useful board information equipped. Add support for reading this EEPROM. The code is based on the corresponding U-Boot code from the TQ downstream U-Boot. Right now not much of this information is actually used, the main motivation for porting this code was to detect the DDR type on the TQ i.MX93 boards. Distributing and printing the information is left for a future excercise. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> --- common/boards/Kconfig | 3 + common/boards/Makefile | 1 + common/boards/tq/Makefile | 1 + common/boards/tq/tq_eeprom.c | 140 +++++++++++++++++++++++++ include/tq_eeprom.h | 196 +++++++++++++++++++++++++++++++++++ 5 files changed, 341 insertions(+) create mode 100644 common/boards/tq/Makefile create mode 100644 common/boards/tq/tq_eeprom.c create mode 100644 include/tq_eeprom.h diff --git a/common/boards/Kconfig b/common/boards/Kconfig index a1d87c0215..fe3a60d508 100644 --- a/common/boards/Kconfig +++ b/common/boards/Kconfig @@ -10,3 +10,6 @@ config BOARD_PHYTEC_SOM_DETECTION config BOARD_PHYTEC_SOM_IMX8M_DETECTION bool select BOARD_PHYTEC_SOM_DETECTION + +config BOARD_TQ + bool diff --git a/common/boards/Makefile b/common/boards/Makefile index c1e1b78df3..147c36643d 100644 --- a/common/boards/Makefile +++ b/common/boards/Makefile @@ -2,3 +2,4 @@ obj-$(CONFIG_BOARD_QEMU_VIRT) += qemu-virt/ obj-$(CONFIG_BOARD_PHYTEC_SOM_DETECTION) += phytec/ +obj-$(CONFIG_BOARD_TQ) += tq/ diff --git a/common/boards/tq/Makefile b/common/boards/tq/Makefile new file mode 100644 index 0000000000..9950cbdb00 --- /dev/null +++ b/common/boards/tq/Makefile @@ -0,0 +1 @@ +obj-pbl-y += tq_eeprom.o diff --git a/common/boards/tq/tq_eeprom.c b/common/boards/tq/tq_eeprom.c new file mode 100644 index 0000000000..83a24bbb04 --- /dev/null +++ b/common/boards/tq/tq_eeprom.c @@ -0,0 +1,140 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * Copyright (c) 2014-2023 TQ-Systems GmbH <u-boot@ew.tq-group.com>, + * D-82229 Seefeld, Germany. + * Author: Markus Niebel + */ + +#include <common.h> +#include <net.h> +#include <linux/ctype.h> +#include <crc.h> +#include <pbl/i2c.h> +#include <pbl/eeprom.h> + +#include "tq_eeprom.h" + +/* + * static EEPROM layout + */ +#define TQ_EE_HRCW_BYTES 0x20 +#define TQ_EE_RSV1_BYTES 10 +#define TQ_EE_RSV2_BYTES 8 + +struct __packed tq_eeprom_data { + union { + struct tq_vard vard; + _Static_assert(sizeof(struct tq_vard) == TQ_EE_HRCW_BYTES, \ + "struct tq_vard has incorrect size"); + u8 hrcw_primary[TQ_EE_HRCW_BYTES]; + } tq_hw_data; + u8 mac[TQ_EE_MAC_BYTES]; /* 0x20 ... 0x25 */ + u8 rsv1[TQ_EE_RSV1_BYTES]; + u8 serial[TQ_EE_SERIAL_BYTES]; /* 0x30 ... 0x37 */ + u8 rsv2[TQ_EE_RSV2_BYTES]; + u8 id[TQ_EE_BDID_BYTES]; /* 0x40 ... 0x7f */ +}; + +static bool tq_vard_valid(const struct tq_vard *vard) +{ + const unsigned char *start = (const unsigned char *)(vard) + + sizeof(vard->crc); + u16 crc; + + crc = crc_itu_t(0, start, sizeof(*vard) - sizeof(vard->crc)); + + return vard->crc == crc; +} + +phys_size_t tq_vard_memsize(u8 val, unsigned int multiply, unsigned int tmask) +{ + phys_size_t result = 0; + + if (val != VARD_MEMSIZE_DEFAULT) { + result = 1 << (size_t)(val & VARD_MEMSIZE_MASK_EXP); + if (val & tmask) + result *= 3; + result *= multiply; + } + + return result; +} + +void tq_vard_show(const struct tq_vard *vard) +{ + /* display data anyway to support developer */ + printf("HW\tREV.%02uxx\n", (unsigned int)vard->hwrev); + printf("RAM\ttype %u, %lu MiB, %s\n", + (unsigned int)(vard->memtype & VARD_MEMTYPE_MASK_TYPE), + (unsigned long)(tq_vard_ramsize(vard) / (SZ_1M)), + (tq_vard_has_ramecc(vard) ? "ECC" : "no ECC")); + printf("RTC\t%c\nSPINOR\t%c\ne-MMC\t%c\nSE\t%c\nEEPROM\t%c\n", + (tq_vard_has_rtc(vard) ? 'y' : 'n'), + (tq_vard_has_spinor(vard) ? 'y' : 'n'), + (tq_vard_has_emmc(vard) ? 'y' : 'n'), + (tq_vard_has_secelem(vard) ? 'y' : 'n'), + (tq_vard_has_eeprom(vard) ? 'y' : 'n')); + + if (tq_vard_has_eeprom(vard)) + printf("EEPROM\ttype %u, %lu KiB, page %lu\n", + (unsigned int)(vard->eepromtype & VARD_EETYPE_MASK_MFR) >> 4, + (unsigned long)(tq_vard_eepromsize(vard) / (SZ_1K)), + tq_vard_eeprom_pgsize(vard)); + + printf("FORMFACTOR: "); + + switch (tq_vard_get_formfactor(vard)) { + case VARD_FORMFACTOR_TYPE_LGA: + printf("LGA\n"); + break; + case VARD_FORMFACTOR_TYPE_CONNECTOR: + printf("CONNECTOR\n"); + break; + case VARD_FORMFACTOR_TYPE_SMARC2: + printf("SMARC-2\n"); + break; + case VARD_FORMFACTOR_TYPE_NONE: + /* + * applies to boards with no variants or older boards + * where this field is not written + */ + printf("UNSPECIFIED\n"); + break; + default: + /* + * generic fall trough + * unhandled form factor or invalid data + */ + printf("UNKNOWN\n"); + break; + } +} + +static void tq_read_string(const char *src, char *dst, int len) +{ + int i; + + for (i = 0; i < len && isprint(src[i]) && isascii(src[i]); ++i) + dst[i] = src[i]; + dst[i] = '\0'; +} + +struct tq_eeprom *pbl_tq_read_eeprom(struct pbl_i2c *i2c, u8 addr) +{ + struct tq_eeprom_data raw; + static struct tq_eeprom eeprom; + int ret; + + ret = eeprom_read(i2c, addr, 0, &raw, sizeof(raw)); + if (ret) + return NULL; + + if (tq_vard_valid(&eeprom.vard)) + eeprom.vard = raw.tq_hw_data.vard; + + memcpy(eeprom.mac, raw.mac, TQ_EE_MAC_BYTES); + tq_read_string(raw.serial, eeprom.serial, TQ_EE_SERIAL_BYTES); + tq_read_string(raw.id, eeprom.id, TQ_EE_BDID_BYTES); + + return &eeprom; +} diff --git a/include/tq_eeprom.h b/include/tq_eeprom.h new file mode 100644 index 0000000000..9a81e6e61d --- /dev/null +++ b/include/tq_eeprom.h @@ -0,0 +1,196 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ +/* + * Copyright (c) 2014-2023 TQ-Systems GmbH <u-boot@ew.tq-group.com>, + * D-82229 Seefeld, Germany. + * Author: Markus Niebel + */ + +#ifndef __TQ_EEPROM_H__ +#define __TQ_EEPROM_H__ + +#include <linux/sizes.h> + +#define VARD_FEATURE_BYTES 8 + +/* + * VARD - variant and revision detection + * must have an exact size of 32 bytes to fit in EEPROM just before + * the module data + */ +struct __packed tq_vard { + u16 crc; /* checksum of vard data - CRC16 XMODEM */ + u8 hwrev; /* hardware major revision */ + u8 memsize; /* RAM size */ + u8 memtype; /* RAM Type + ECC */ + u8 features[VARD_FEATURE_BYTES]; /* feature bitmask */ + u8 eepromsize; /* user eeprom size (feature EEPROM) */ + u8 eepromtype; /* user eeprom type (feature EEPROM) */ + u8 formfactor; /* SOM Form factor. mask 0xf0 */ + u8 rsv[0x10]; /* for future use */ +}; + +#define VARD_MEMTYPE_MASK_TYPE 0x7f /* board specific RAM Type */ +#define VARD_MEMTYPE_MASK_ECC 0x80 /* extra ECC RAM assembled */ +#define VARD_MEMTYPE_DEFAULT 0xff /* use board specific default */ + +#define VARD_MEMSIZE_MASK_EXP 0x1f /* 2^n MBytes */ +#define VARD_MEMSIZE_MASK_FACTOR 0x20 /* x3 */ +#define VARD_MEMSIZE_DEFAULT 0xff /* use board specific default */ + +/* feature is present if bit is zero */ +#define VARD_FEATURE_0_RESERVED 0xf0 /* Do not use */ +#define VARD_FEATURE_0_EMMC 0x08 /* e-MMC assembled */ +#define VARD_FEATURE_0_EEPROM 0x04 /* user EEPROM assembled */ +#define VARD_FEATURE_0_SPINOR 0x02 /* [Q,O]SPI-NOR assembled */ +#define VARD_FEATURE_0_SECELEM 0x01 /* secure element assembled */ + +#define VARD_FEATURE_4_RESERVED 0xf0 /* Do not use */ +#define VARD_FEATURE_4_RTC 0x08 /* RTC assembled */ + +#define VARD_EESIZE_MASK_EXP 0x1f /* 2^n Bytes */ +#define VARD_EETYPE_DEFAULT 0xff /* use board specific default */ +#define VARD_EETYPE_MASK_MFR 0xf0 /* manufacturer / type mask */ +#define VARD_EETYPE_MASK_PGSIZE 0x0f /* page size */ + +#define VARD_FORMFACTOR_MASK_TYPE 0xf0 /* SOM type mask */ +#define VARD_FORMFACTOR_TYPE_CONNECTOR 0x00 /* SOM with connector, no board standard */ +#define VARD_FORMFACTOR_TYPE_LGA 0x10 /* LGA SOM, no board standard */ +#define VARD_FORMFACTOR_TYPE_SMARC2 0x20 /* SOM conforms to SMARC-2 standard */ +#define VARD_FORMFACTOR_TYPE_NONE 0xf0 /* unspecified SOM type */ + +/* + * all data should only be handled as valid, if CRC is OKAY + */ +static inline +bool tq_vard_has_ramecc(const struct tq_vard *vard) +{ + return (vard->memtype & VARD_MEMTYPE_MASK_ECC); +} + +/* + * Calculate size in byte using byte from vard + * This works as long as coding for EEPROM / RAM size is the same + * val - memsize byte from tq_vard structure + * multiply - multiplier, aka 1 / SZ_1K / SZ_1M + * tmask - mask for triple factor (use only for RAM sizes) + * + * return size in bytes or zero in case the val is equal to VARD_MEMSIZE_DEFAULT + */ +phys_size_t tq_vard_memsize(u8 val, unsigned int multiply, unsigned int tmask); + +static inline +phys_size_t tq_vard_ramsize(const struct tq_vard *vard) +{ + return tq_vard_memsize(vard->memsize, SZ_1M, VARD_MEMSIZE_MASK_FACTOR); +} + +static inline +size_t tq_vard_eepromsize(const struct tq_vard *vard) +{ + return tq_vard_memsize(vard->eepromsize, 1, 0x0); +} + +static inline +size_t tq_vard_eeprom_pgsize(const struct tq_vard *vard) +{ + return 1 << (size_t)(vard->eepromtype & VARD_EETYPE_MASK_PGSIZE); +} + +static inline +int tq_vard_has_feature(const struct tq_vard *vard, unsigned int fbyte, + unsigned int fbit) +{ + if (fbyte < VARD_FEATURE_BYTES && fbit < 8) + return !(vard->features[fbyte] & BIT(fbit)); + else + return -ERANGE; +} + +static inline +bool tq_vard_has_emmc(const struct tq_vard *vard) +{ + return (tq_vard_has_feature(vard, 0, 3) > 0); +} + +static inline +bool tq_vard_has_eeprom(const struct tq_vard *vard) +{ + return (tq_vard_has_feature(vard, 0, 2) > 0); +} + +static inline +bool tq_vard_has_spinor(const struct tq_vard *vard) +{ + return (tq_vard_has_feature(vard, 0, 1) > 0); +} + +static inline +bool tq_vard_has_secelem(const struct tq_vard *vard) +{ + return (tq_vard_has_feature(vard, 0, 0) > 0); +} + +static inline +bool tq_vard_has_rtc(const struct tq_vard *vard) +{ + return (tq_vard_has_feature(vard, 4, 3) > 0); +} + +static inline u32 tq_vard_get_formfactor(const struct tq_vard *vard) +{ + return (u32)(vard->formfactor & VARD_FORMFACTOR_MASK_TYPE); +}; + +static inline +bool tq_vard_is_lga(const struct tq_vard *vard) +{ + return (tq_vard_get_formfactor(vard) == VARD_FORMFACTOR_TYPE_LGA); +} + +static inline +bool tq_vard_is_connector(const struct tq_vard *vard) +{ + return (tq_vard_get_formfactor(vard) == VARD_FORMFACTOR_TYPE_CONNECTOR); +} + +static inline +bool tq_vard_is_smarc2(const struct tq_vard *vard) +{ + return (tq_vard_get_formfactor(vard) == VARD_FORMFACTOR_TYPE_SMARC2); +} + +void tq_vard_show(const struct tq_vard *vard); + +struct tq_som_feature_list; + +/** + * fill in presence information from VARD. + * + * @param[in] vard pointer to VARD structure from SOM EEPROM + * @param[in] features SOM specific feature list + * + * @return 0 on success + * + * Must be called after data was read to vard. The function checks + * if vard is valid, goes through the list and sets the present flag + * for each entry depending on the flags in vard. + */ +int tq_vard_detect_features(const struct tq_vard *vard, + struct tq_som_feature_list *features); + +#define TQ_EE_MAC_BYTES 6 +#define TQ_EE_SERIAL_BYTES 8 +#define TQ_EE_BDID_BYTES 0x40 + +struct tq_eeprom { + struct tq_vard vard; + u8 mac[TQ_EE_MAC_BYTES]; + u8 serial[TQ_EE_SERIAL_BYTES + 1]; + u8 id[TQ_EE_BDID_BYTES + 1]; +}; + +struct pbl_i2c; + +struct tq_eeprom *pbl_tq_read_eeprom(struct pbl_i2c *i2c, u8 addr); + +#endif -- 2.39.2 ^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH v2 5/8] common: add TQ EEPROM support 2024-02-05 7:45 ` [PATCH v2 5/8] common: add TQ EEPROM support Sascha Hauer @ 2024-02-05 8:11 ` Marco Felsch 2024-02-05 8:18 ` Sascha Hauer 0 siblings, 1 reply; 12+ messages in thread From: Marco Felsch @ 2024-02-05 8:11 UTC (permalink / raw) To: Sascha Hauer; +Cc: Barebox List Hi Sascha, On 24-02-05, Sascha Hauer wrote: > Many TQ boards have an EEPROM with useful board information equipped. > Add support for reading this EEPROM. The code is based on the > corresponding U-Boot code from the TQ downstream U-Boot. > > Right now not much of this information is actually used, the main > motivation for porting this code was to detect the DDR type on the > TQ i.MX93 boards. Distributing and printing the information is left > for a future excercise. > > Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> > --- > common/boards/Kconfig | 3 + > common/boards/Makefile | 1 + > common/boards/tq/Makefile | 1 + > common/boards/tq/tq_eeprom.c | 140 +++++++++++++++++++++++++ > include/tq_eeprom.h | 196 +++++++++++++++++++++++++++++++++++ should we bundle such includes under 'include/boards/' or 'include/boards/tq'? Regards, Marco > 5 files changed, 341 insertions(+) > create mode 100644 common/boards/tq/Makefile > create mode 100644 common/boards/tq/tq_eeprom.c > create mode 100644 include/tq_eeprom.h > > diff --git a/common/boards/Kconfig b/common/boards/Kconfig > index a1d87c0215..fe3a60d508 100644 > --- a/common/boards/Kconfig > +++ b/common/boards/Kconfig > @@ -10,3 +10,6 @@ config BOARD_PHYTEC_SOM_DETECTION > config BOARD_PHYTEC_SOM_IMX8M_DETECTION > bool > select BOARD_PHYTEC_SOM_DETECTION > + > +config BOARD_TQ > + bool > diff --git a/common/boards/Makefile b/common/boards/Makefile > index c1e1b78df3..147c36643d 100644 > --- a/common/boards/Makefile > +++ b/common/boards/Makefile > @@ -2,3 +2,4 @@ > > obj-$(CONFIG_BOARD_QEMU_VIRT) += qemu-virt/ > obj-$(CONFIG_BOARD_PHYTEC_SOM_DETECTION) += phytec/ > +obj-$(CONFIG_BOARD_TQ) += tq/ > diff --git a/common/boards/tq/Makefile b/common/boards/tq/Makefile > new file mode 100644 > index 0000000000..9950cbdb00 > --- /dev/null > +++ b/common/boards/tq/Makefile > @@ -0,0 +1 @@ > +obj-pbl-y += tq_eeprom.o > diff --git a/common/boards/tq/tq_eeprom.c b/common/boards/tq/tq_eeprom.c > new file mode 100644 > index 0000000000..83a24bbb04 > --- /dev/null > +++ b/common/boards/tq/tq_eeprom.c > @@ -0,0 +1,140 @@ > +// SPDX-License-Identifier: GPL-2.0-or-later > +/* > + * Copyright (c) 2014-2023 TQ-Systems GmbH <u-boot@ew.tq-group.com>, > + * D-82229 Seefeld, Germany. > + * Author: Markus Niebel > + */ > + > +#include <common.h> > +#include <net.h> > +#include <linux/ctype.h> > +#include <crc.h> > +#include <pbl/i2c.h> > +#include <pbl/eeprom.h> > + > +#include "tq_eeprom.h" > + > +/* > + * static EEPROM layout > + */ > +#define TQ_EE_HRCW_BYTES 0x20 > +#define TQ_EE_RSV1_BYTES 10 > +#define TQ_EE_RSV2_BYTES 8 > + > +struct __packed tq_eeprom_data { > + union { > + struct tq_vard vard; > + _Static_assert(sizeof(struct tq_vard) == TQ_EE_HRCW_BYTES, \ > + "struct tq_vard has incorrect size"); > + u8 hrcw_primary[TQ_EE_HRCW_BYTES]; > + } tq_hw_data; > + u8 mac[TQ_EE_MAC_BYTES]; /* 0x20 ... 0x25 */ > + u8 rsv1[TQ_EE_RSV1_BYTES]; > + u8 serial[TQ_EE_SERIAL_BYTES]; /* 0x30 ... 0x37 */ > + u8 rsv2[TQ_EE_RSV2_BYTES]; > + u8 id[TQ_EE_BDID_BYTES]; /* 0x40 ... 0x7f */ > +}; > + > +static bool tq_vard_valid(const struct tq_vard *vard) > +{ > + const unsigned char *start = (const unsigned char *)(vard) + > + sizeof(vard->crc); > + u16 crc; > + > + crc = crc_itu_t(0, start, sizeof(*vard) - sizeof(vard->crc)); > + > + return vard->crc == crc; > +} > + > +phys_size_t tq_vard_memsize(u8 val, unsigned int multiply, unsigned int tmask) > +{ > + phys_size_t result = 0; > + > + if (val != VARD_MEMSIZE_DEFAULT) { > + result = 1 << (size_t)(val & VARD_MEMSIZE_MASK_EXP); > + if (val & tmask) > + result *= 3; > + result *= multiply; > + } > + > + return result; > +} > + > +void tq_vard_show(const struct tq_vard *vard) > +{ > + /* display data anyway to support developer */ > + printf("HW\tREV.%02uxx\n", (unsigned int)vard->hwrev); > + printf("RAM\ttype %u, %lu MiB, %s\n", > + (unsigned int)(vard->memtype & VARD_MEMTYPE_MASK_TYPE), > + (unsigned long)(tq_vard_ramsize(vard) / (SZ_1M)), > + (tq_vard_has_ramecc(vard) ? "ECC" : "no ECC")); > + printf("RTC\t%c\nSPINOR\t%c\ne-MMC\t%c\nSE\t%c\nEEPROM\t%c\n", > + (tq_vard_has_rtc(vard) ? 'y' : 'n'), > + (tq_vard_has_spinor(vard) ? 'y' : 'n'), > + (tq_vard_has_emmc(vard) ? 'y' : 'n'), > + (tq_vard_has_secelem(vard) ? 'y' : 'n'), > + (tq_vard_has_eeprom(vard) ? 'y' : 'n')); > + > + if (tq_vard_has_eeprom(vard)) > + printf("EEPROM\ttype %u, %lu KiB, page %lu\n", > + (unsigned int)(vard->eepromtype & VARD_EETYPE_MASK_MFR) >> 4, > + (unsigned long)(tq_vard_eepromsize(vard) / (SZ_1K)), > + tq_vard_eeprom_pgsize(vard)); > + > + printf("FORMFACTOR: "); > + > + switch (tq_vard_get_formfactor(vard)) { > + case VARD_FORMFACTOR_TYPE_LGA: > + printf("LGA\n"); > + break; > + case VARD_FORMFACTOR_TYPE_CONNECTOR: > + printf("CONNECTOR\n"); > + break; > + case VARD_FORMFACTOR_TYPE_SMARC2: > + printf("SMARC-2\n"); > + break; > + case VARD_FORMFACTOR_TYPE_NONE: > + /* > + * applies to boards with no variants or older boards > + * where this field is not written > + */ > + printf("UNSPECIFIED\n"); > + break; > + default: > + /* > + * generic fall trough > + * unhandled form factor or invalid data > + */ > + printf("UNKNOWN\n"); > + break; > + } > +} > + > +static void tq_read_string(const char *src, char *dst, int len) > +{ > + int i; > + > + for (i = 0; i < len && isprint(src[i]) && isascii(src[i]); ++i) > + dst[i] = src[i]; > + dst[i] = '\0'; > +} > + > +struct tq_eeprom *pbl_tq_read_eeprom(struct pbl_i2c *i2c, u8 addr) > +{ > + struct tq_eeprom_data raw; > + static struct tq_eeprom eeprom; > + int ret; > + > + ret = eeprom_read(i2c, addr, 0, &raw, sizeof(raw)); > + if (ret) > + return NULL; > + > + if (tq_vard_valid(&eeprom.vard)) > + eeprom.vard = raw.tq_hw_data.vard; > + > + memcpy(eeprom.mac, raw.mac, TQ_EE_MAC_BYTES); > + tq_read_string(raw.serial, eeprom.serial, TQ_EE_SERIAL_BYTES); > + tq_read_string(raw.id, eeprom.id, TQ_EE_BDID_BYTES); > + > + return &eeprom; > +} > diff --git a/include/tq_eeprom.h b/include/tq_eeprom.h > new file mode 100644 > index 0000000000..9a81e6e61d > --- /dev/null > +++ b/include/tq_eeprom.h > @@ -0,0 +1,196 @@ > +/* SPDX-License-Identifier: GPL-2.0-or-later */ > +/* > + * Copyright (c) 2014-2023 TQ-Systems GmbH <u-boot@ew.tq-group.com>, > + * D-82229 Seefeld, Germany. > + * Author: Markus Niebel > + */ > + > +#ifndef __TQ_EEPROM_H__ > +#define __TQ_EEPROM_H__ > + > +#include <linux/sizes.h> > + > +#define VARD_FEATURE_BYTES 8 > + > +/* > + * VARD - variant and revision detection > + * must have an exact size of 32 bytes to fit in EEPROM just before > + * the module data > + */ > +struct __packed tq_vard { > + u16 crc; /* checksum of vard data - CRC16 XMODEM */ > + u8 hwrev; /* hardware major revision */ > + u8 memsize; /* RAM size */ > + u8 memtype; /* RAM Type + ECC */ > + u8 features[VARD_FEATURE_BYTES]; /* feature bitmask */ > + u8 eepromsize; /* user eeprom size (feature EEPROM) */ > + u8 eepromtype; /* user eeprom type (feature EEPROM) */ > + u8 formfactor; /* SOM Form factor. mask 0xf0 */ > + u8 rsv[0x10]; /* for future use */ > +}; > + > +#define VARD_MEMTYPE_MASK_TYPE 0x7f /* board specific RAM Type */ > +#define VARD_MEMTYPE_MASK_ECC 0x80 /* extra ECC RAM assembled */ > +#define VARD_MEMTYPE_DEFAULT 0xff /* use board specific default */ > + > +#define VARD_MEMSIZE_MASK_EXP 0x1f /* 2^n MBytes */ > +#define VARD_MEMSIZE_MASK_FACTOR 0x20 /* x3 */ > +#define VARD_MEMSIZE_DEFAULT 0xff /* use board specific default */ > + > +/* feature is present if bit is zero */ > +#define VARD_FEATURE_0_RESERVED 0xf0 /* Do not use */ > +#define VARD_FEATURE_0_EMMC 0x08 /* e-MMC assembled */ > +#define VARD_FEATURE_0_EEPROM 0x04 /* user EEPROM assembled */ > +#define VARD_FEATURE_0_SPINOR 0x02 /* [Q,O]SPI-NOR assembled */ > +#define VARD_FEATURE_0_SECELEM 0x01 /* secure element assembled */ > + > +#define VARD_FEATURE_4_RESERVED 0xf0 /* Do not use */ > +#define VARD_FEATURE_4_RTC 0x08 /* RTC assembled */ > + > +#define VARD_EESIZE_MASK_EXP 0x1f /* 2^n Bytes */ > +#define VARD_EETYPE_DEFAULT 0xff /* use board specific default */ > +#define VARD_EETYPE_MASK_MFR 0xf0 /* manufacturer / type mask */ > +#define VARD_EETYPE_MASK_PGSIZE 0x0f /* page size */ > + > +#define VARD_FORMFACTOR_MASK_TYPE 0xf0 /* SOM type mask */ > +#define VARD_FORMFACTOR_TYPE_CONNECTOR 0x00 /* SOM with connector, no board standard */ > +#define VARD_FORMFACTOR_TYPE_LGA 0x10 /* LGA SOM, no board standard */ > +#define VARD_FORMFACTOR_TYPE_SMARC2 0x20 /* SOM conforms to SMARC-2 standard */ > +#define VARD_FORMFACTOR_TYPE_NONE 0xf0 /* unspecified SOM type */ > + > +/* > + * all data should only be handled as valid, if CRC is OKAY > + */ > +static inline > +bool tq_vard_has_ramecc(const struct tq_vard *vard) > +{ > + return (vard->memtype & VARD_MEMTYPE_MASK_ECC); > +} > + > +/* > + * Calculate size in byte using byte from vard > + * This works as long as coding for EEPROM / RAM size is the same > + * val - memsize byte from tq_vard structure > + * multiply - multiplier, aka 1 / SZ_1K / SZ_1M > + * tmask - mask for triple factor (use only for RAM sizes) > + * > + * return size in bytes or zero in case the val is equal to VARD_MEMSIZE_DEFAULT > + */ > +phys_size_t tq_vard_memsize(u8 val, unsigned int multiply, unsigned int tmask); > + > +static inline > +phys_size_t tq_vard_ramsize(const struct tq_vard *vard) > +{ > + return tq_vard_memsize(vard->memsize, SZ_1M, VARD_MEMSIZE_MASK_FACTOR); > +} > + > +static inline > +size_t tq_vard_eepromsize(const struct tq_vard *vard) > +{ > + return tq_vard_memsize(vard->eepromsize, 1, 0x0); > +} > + > +static inline > +size_t tq_vard_eeprom_pgsize(const struct tq_vard *vard) > +{ > + return 1 << (size_t)(vard->eepromtype & VARD_EETYPE_MASK_PGSIZE); > +} > + > +static inline > +int tq_vard_has_feature(const struct tq_vard *vard, unsigned int fbyte, > + unsigned int fbit) > +{ > + if (fbyte < VARD_FEATURE_BYTES && fbit < 8) > + return !(vard->features[fbyte] & BIT(fbit)); > + else > + return -ERANGE; > +} > + > +static inline > +bool tq_vard_has_emmc(const struct tq_vard *vard) > +{ > + return (tq_vard_has_feature(vard, 0, 3) > 0); > +} > + > +static inline > +bool tq_vard_has_eeprom(const struct tq_vard *vard) > +{ > + return (tq_vard_has_feature(vard, 0, 2) > 0); > +} > + > +static inline > +bool tq_vard_has_spinor(const struct tq_vard *vard) > +{ > + return (tq_vard_has_feature(vard, 0, 1) > 0); > +} > + > +static inline > +bool tq_vard_has_secelem(const struct tq_vard *vard) > +{ > + return (tq_vard_has_feature(vard, 0, 0) > 0); > +} > + > +static inline > +bool tq_vard_has_rtc(const struct tq_vard *vard) > +{ > + return (tq_vard_has_feature(vard, 4, 3) > 0); > +} > + > +static inline u32 tq_vard_get_formfactor(const struct tq_vard *vard) > +{ > + return (u32)(vard->formfactor & VARD_FORMFACTOR_MASK_TYPE); > +}; > + > +static inline > +bool tq_vard_is_lga(const struct tq_vard *vard) > +{ > + return (tq_vard_get_formfactor(vard) == VARD_FORMFACTOR_TYPE_LGA); > +} > + > +static inline > +bool tq_vard_is_connector(const struct tq_vard *vard) > +{ > + return (tq_vard_get_formfactor(vard) == VARD_FORMFACTOR_TYPE_CONNECTOR); > +} > + > +static inline > +bool tq_vard_is_smarc2(const struct tq_vard *vard) > +{ > + return (tq_vard_get_formfactor(vard) == VARD_FORMFACTOR_TYPE_SMARC2); > +} > + > +void tq_vard_show(const struct tq_vard *vard); > + > +struct tq_som_feature_list; > + > +/** > + * fill in presence information from VARD. > + * > + * @param[in] vard pointer to VARD structure from SOM EEPROM > + * @param[in] features SOM specific feature list > + * > + * @return 0 on success > + * > + * Must be called after data was read to vard. The function checks > + * if vard is valid, goes through the list and sets the present flag > + * for each entry depending on the flags in vard. > + */ > +int tq_vard_detect_features(const struct tq_vard *vard, > + struct tq_som_feature_list *features); > + > +#define TQ_EE_MAC_BYTES 6 > +#define TQ_EE_SERIAL_BYTES 8 > +#define TQ_EE_BDID_BYTES 0x40 > + > +struct tq_eeprom { > + struct tq_vard vard; > + u8 mac[TQ_EE_MAC_BYTES]; > + u8 serial[TQ_EE_SERIAL_BYTES + 1]; > + u8 id[TQ_EE_BDID_BYTES + 1]; > +}; > + > +struct pbl_i2c; > + > +struct tq_eeprom *pbl_tq_read_eeprom(struct pbl_i2c *i2c, u8 addr); > + > +#endif > -- > 2.39.2 > > > ^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH v2 5/8] common: add TQ EEPROM support 2024-02-05 8:11 ` Marco Felsch @ 2024-02-05 8:18 ` Sascha Hauer 0 siblings, 0 replies; 12+ messages in thread From: Sascha Hauer @ 2024-02-05 8:18 UTC (permalink / raw) To: Marco Felsch; +Cc: Barebox List On Mon, Feb 05, 2024 at 09:11:38AM +0100, Marco Felsch wrote: > Hi Sascha, > > On 24-02-05, Sascha Hauer wrote: > > Many TQ boards have an EEPROM with useful board information equipped. > > Add support for reading this EEPROM. The code is based on the > > corresponding U-Boot code from the TQ downstream U-Boot. > > > > Right now not much of this information is actually used, the main > > motivation for porting this code was to detect the DDR type on the > > TQ i.MX93 boards. Distributing and printing the information is left > > for a future excercise. > > > > Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> > > --- > > common/boards/Kconfig | 3 + > > common/boards/Makefile | 1 + > > common/boards/tq/Makefile | 1 + > > common/boards/tq/tq_eeprom.c | 140 +++++++++++++++++++++++++ > > include/tq_eeprom.h | 196 +++++++++++++++++++++++++++++++++++ > > should we bundle such includes under 'include/boards/' or > 'include/boards/tq'? There already is a include/boards/phytec/ containing includes for code in common/boards/phytec. Following this pattern for new code is a good idea. Will change that. Sascha > > Regards, > Marco > > > 5 files changed, 341 insertions(+) > > create mode 100644 common/boards/tq/Makefile > > create mode 100644 common/boards/tq/tq_eeprom.c > > create mode 100644 include/tq_eeprom.h > > > > diff --git a/common/boards/Kconfig b/common/boards/Kconfig > > index a1d87c0215..fe3a60d508 100644 > > --- a/common/boards/Kconfig > > +++ b/common/boards/Kconfig > > @@ -10,3 +10,6 @@ config BOARD_PHYTEC_SOM_DETECTION > > config BOARD_PHYTEC_SOM_IMX8M_DETECTION > > bool > > select BOARD_PHYTEC_SOM_DETECTION > > + > > +config BOARD_TQ > > + bool > > diff --git a/common/boards/Makefile b/common/boards/Makefile > > index c1e1b78df3..147c36643d 100644 > > --- a/common/boards/Makefile > > +++ b/common/boards/Makefile > > @@ -2,3 +2,4 @@ > > > > obj-$(CONFIG_BOARD_QEMU_VIRT) += qemu-virt/ > > obj-$(CONFIG_BOARD_PHYTEC_SOM_DETECTION) += phytec/ > > +obj-$(CONFIG_BOARD_TQ) += tq/ > > diff --git a/common/boards/tq/Makefile b/common/boards/tq/Makefile > > new file mode 100644 > > index 0000000000..9950cbdb00 > > --- /dev/null > > +++ b/common/boards/tq/Makefile > > @@ -0,0 +1 @@ > > +obj-pbl-y += tq_eeprom.o > > diff --git a/common/boards/tq/tq_eeprom.c b/common/boards/tq/tq_eeprom.c > > new file mode 100644 > > index 0000000000..83a24bbb04 > > --- /dev/null > > +++ b/common/boards/tq/tq_eeprom.c > > @@ -0,0 +1,140 @@ > > +// SPDX-License-Identifier: GPL-2.0-or-later > > +/* > > + * Copyright (c) 2014-2023 TQ-Systems GmbH <u-boot@ew.tq-group.com>, > > + * D-82229 Seefeld, Germany. > > + * Author: Markus Niebel > > + */ > > + > > +#include <common.h> > > +#include <net.h> > > +#include <linux/ctype.h> > > +#include <crc.h> > > +#include <pbl/i2c.h> > > +#include <pbl/eeprom.h> > > + > > +#include "tq_eeprom.h" > > + > > +/* > > + * static EEPROM layout > > + */ > > +#define TQ_EE_HRCW_BYTES 0x20 > > +#define TQ_EE_RSV1_BYTES 10 > > +#define TQ_EE_RSV2_BYTES 8 > > + > > +struct __packed tq_eeprom_data { > > + union { > > + struct tq_vard vard; > > + _Static_assert(sizeof(struct tq_vard) == TQ_EE_HRCW_BYTES, \ > > + "struct tq_vard has incorrect size"); > > + u8 hrcw_primary[TQ_EE_HRCW_BYTES]; > > + } tq_hw_data; > > + u8 mac[TQ_EE_MAC_BYTES]; /* 0x20 ... 0x25 */ > > + u8 rsv1[TQ_EE_RSV1_BYTES]; > > + u8 serial[TQ_EE_SERIAL_BYTES]; /* 0x30 ... 0x37 */ > > + u8 rsv2[TQ_EE_RSV2_BYTES]; > > + u8 id[TQ_EE_BDID_BYTES]; /* 0x40 ... 0x7f */ > > +}; > > + > > +static bool tq_vard_valid(const struct tq_vard *vard) > > +{ > > + const unsigned char *start = (const unsigned char *)(vard) + > > + sizeof(vard->crc); > > + u16 crc; > > + > > + crc = crc_itu_t(0, start, sizeof(*vard) - sizeof(vard->crc)); > > + > > + return vard->crc == crc; > > +} > > + > > +phys_size_t tq_vard_memsize(u8 val, unsigned int multiply, unsigned int tmask) > > +{ > > + phys_size_t result = 0; > > + > > + if (val != VARD_MEMSIZE_DEFAULT) { > > + result = 1 << (size_t)(val & VARD_MEMSIZE_MASK_EXP); > > + if (val & tmask) > > + result *= 3; > > + result *= multiply; > > + } > > + > > + return result; > > +} > > + > > +void tq_vard_show(const struct tq_vard *vard) > > +{ > > + /* display data anyway to support developer */ > > + printf("HW\tREV.%02uxx\n", (unsigned int)vard->hwrev); > > + printf("RAM\ttype %u, %lu MiB, %s\n", > > + (unsigned int)(vard->memtype & VARD_MEMTYPE_MASK_TYPE), > > + (unsigned long)(tq_vard_ramsize(vard) / (SZ_1M)), > > + (tq_vard_has_ramecc(vard) ? "ECC" : "no ECC")); > > + printf("RTC\t%c\nSPINOR\t%c\ne-MMC\t%c\nSE\t%c\nEEPROM\t%c\n", > > + (tq_vard_has_rtc(vard) ? 'y' : 'n'), > > + (tq_vard_has_spinor(vard) ? 'y' : 'n'), > > + (tq_vard_has_emmc(vard) ? 'y' : 'n'), > > + (tq_vard_has_secelem(vard) ? 'y' : 'n'), > > + (tq_vard_has_eeprom(vard) ? 'y' : 'n')); > > + > > + if (tq_vard_has_eeprom(vard)) > > + printf("EEPROM\ttype %u, %lu KiB, page %lu\n", > > + (unsigned int)(vard->eepromtype & VARD_EETYPE_MASK_MFR) >> 4, > > + (unsigned long)(tq_vard_eepromsize(vard) / (SZ_1K)), > > + tq_vard_eeprom_pgsize(vard)); > > + > > + printf("FORMFACTOR: "); > > + > > + switch (tq_vard_get_formfactor(vard)) { > > + case VARD_FORMFACTOR_TYPE_LGA: > > + printf("LGA\n"); > > + break; > > + case VARD_FORMFACTOR_TYPE_CONNECTOR: > > + printf("CONNECTOR\n"); > > + break; > > + case VARD_FORMFACTOR_TYPE_SMARC2: > > + printf("SMARC-2\n"); > > + break; > > + case VARD_FORMFACTOR_TYPE_NONE: > > + /* > > + * applies to boards with no variants or older boards > > + * where this field is not written > > + */ > > + printf("UNSPECIFIED\n"); > > + break; > > + default: > > + /* > > + * generic fall trough > > + * unhandled form factor or invalid data > > + */ > > + printf("UNKNOWN\n"); > > + break; > > + } > > +} > > + > > +static void tq_read_string(const char *src, char *dst, int len) > > +{ > > + int i; > > + > > + for (i = 0; i < len && isprint(src[i]) && isascii(src[i]); ++i) > > + dst[i] = src[i]; > > + dst[i] = '\0'; > > +} > > + > > +struct tq_eeprom *pbl_tq_read_eeprom(struct pbl_i2c *i2c, u8 addr) > > +{ > > + struct tq_eeprom_data raw; > > + static struct tq_eeprom eeprom; > > + int ret; > > + > > + ret = eeprom_read(i2c, addr, 0, &raw, sizeof(raw)); > > + if (ret) > > + return NULL; > > + > > + if (tq_vard_valid(&eeprom.vard)) > > + eeprom.vard = raw.tq_hw_data.vard; > > + > > + memcpy(eeprom.mac, raw.mac, TQ_EE_MAC_BYTES); > > + tq_read_string(raw.serial, eeprom.serial, TQ_EE_SERIAL_BYTES); > > + tq_read_string(raw.id, eeprom.id, TQ_EE_BDID_BYTES); > > + > > + return &eeprom; > > +} > > diff --git a/include/tq_eeprom.h b/include/tq_eeprom.h > > new file mode 100644 > > index 0000000000..9a81e6e61d > > --- /dev/null > > +++ b/include/tq_eeprom.h > > @@ -0,0 +1,196 @@ > > +/* SPDX-License-Identifier: GPL-2.0-or-later */ > > +/* > > + * Copyright (c) 2014-2023 TQ-Systems GmbH <u-boot@ew.tq-group.com>, > > + * D-82229 Seefeld, Germany. > > + * Author: Markus Niebel > > + */ > > + > > +#ifndef __TQ_EEPROM_H__ > > +#define __TQ_EEPROM_H__ > > + > > +#include <linux/sizes.h> > > + > > +#define VARD_FEATURE_BYTES 8 > > + > > +/* > > + * VARD - variant and revision detection > > + * must have an exact size of 32 bytes to fit in EEPROM just before > > + * the module data > > + */ > > +struct __packed tq_vard { > > + u16 crc; /* checksum of vard data - CRC16 XMODEM */ > > + u8 hwrev; /* hardware major revision */ > > + u8 memsize; /* RAM size */ > > + u8 memtype; /* RAM Type + ECC */ > > + u8 features[VARD_FEATURE_BYTES]; /* feature bitmask */ > > + u8 eepromsize; /* user eeprom size (feature EEPROM) */ > > + u8 eepromtype; /* user eeprom type (feature EEPROM) */ > > + u8 formfactor; /* SOM Form factor. mask 0xf0 */ > > + u8 rsv[0x10]; /* for future use */ > > +}; > > + > > +#define VARD_MEMTYPE_MASK_TYPE 0x7f /* board specific RAM Type */ > > +#define VARD_MEMTYPE_MASK_ECC 0x80 /* extra ECC RAM assembled */ > > +#define VARD_MEMTYPE_DEFAULT 0xff /* use board specific default */ > > + > > +#define VARD_MEMSIZE_MASK_EXP 0x1f /* 2^n MBytes */ > > +#define VARD_MEMSIZE_MASK_FACTOR 0x20 /* x3 */ > > +#define VARD_MEMSIZE_DEFAULT 0xff /* use board specific default */ > > + > > +/* feature is present if bit is zero */ > > +#define VARD_FEATURE_0_RESERVED 0xf0 /* Do not use */ > > +#define VARD_FEATURE_0_EMMC 0x08 /* e-MMC assembled */ > > +#define VARD_FEATURE_0_EEPROM 0x04 /* user EEPROM assembled */ > > +#define VARD_FEATURE_0_SPINOR 0x02 /* [Q,O]SPI-NOR assembled */ > > +#define VARD_FEATURE_0_SECELEM 0x01 /* secure element assembled */ > > + > > +#define VARD_FEATURE_4_RESERVED 0xf0 /* Do not use */ > > +#define VARD_FEATURE_4_RTC 0x08 /* RTC assembled */ > > + > > +#define VARD_EESIZE_MASK_EXP 0x1f /* 2^n Bytes */ > > +#define VARD_EETYPE_DEFAULT 0xff /* use board specific default */ > > +#define VARD_EETYPE_MASK_MFR 0xf0 /* manufacturer / type mask */ > > +#define VARD_EETYPE_MASK_PGSIZE 0x0f /* page size */ > > + > > +#define VARD_FORMFACTOR_MASK_TYPE 0xf0 /* SOM type mask */ > > +#define VARD_FORMFACTOR_TYPE_CONNECTOR 0x00 /* SOM with connector, no board standard */ > > +#define VARD_FORMFACTOR_TYPE_LGA 0x10 /* LGA SOM, no board standard */ > > +#define VARD_FORMFACTOR_TYPE_SMARC2 0x20 /* SOM conforms to SMARC-2 standard */ > > +#define VARD_FORMFACTOR_TYPE_NONE 0xf0 /* unspecified SOM type */ > > + > > +/* > > + * all data should only be handled as valid, if CRC is OKAY > > + */ > > +static inline > > +bool tq_vard_has_ramecc(const struct tq_vard *vard) > > +{ > > + return (vard->memtype & VARD_MEMTYPE_MASK_ECC); > > +} > > + > > +/* > > + * Calculate size in byte using byte from vard > > + * This works as long as coding for EEPROM / RAM size is the same > > + * val - memsize byte from tq_vard structure > > + * multiply - multiplier, aka 1 / SZ_1K / SZ_1M > > + * tmask - mask for triple factor (use only for RAM sizes) > > + * > > + * return size in bytes or zero in case the val is equal to VARD_MEMSIZE_DEFAULT > > + */ > > +phys_size_t tq_vard_memsize(u8 val, unsigned int multiply, unsigned int tmask); > > + > > +static inline > > +phys_size_t tq_vard_ramsize(const struct tq_vard *vard) > > +{ > > + return tq_vard_memsize(vard->memsize, SZ_1M, VARD_MEMSIZE_MASK_FACTOR); > > +} > > + > > +static inline > > +size_t tq_vard_eepromsize(const struct tq_vard *vard) > > +{ > > + return tq_vard_memsize(vard->eepromsize, 1, 0x0); > > +} > > + > > +static inline > > +size_t tq_vard_eeprom_pgsize(const struct tq_vard *vard) > > +{ > > + return 1 << (size_t)(vard->eepromtype & VARD_EETYPE_MASK_PGSIZE); > > +} > > + > > +static inline > > +int tq_vard_has_feature(const struct tq_vard *vard, unsigned int fbyte, > > + unsigned int fbit) > > +{ > > + if (fbyte < VARD_FEATURE_BYTES && fbit < 8) > > + return !(vard->features[fbyte] & BIT(fbit)); > > + else > > + return -ERANGE; > > +} > > + > > +static inline > > +bool tq_vard_has_emmc(const struct tq_vard *vard) > > +{ > > + return (tq_vard_has_feature(vard, 0, 3) > 0); > > +} > > + > > +static inline > > +bool tq_vard_has_eeprom(const struct tq_vard *vard) > > +{ > > + return (tq_vard_has_feature(vard, 0, 2) > 0); > > +} > > + > > +static inline > > +bool tq_vard_has_spinor(const struct tq_vard *vard) > > +{ > > + return (tq_vard_has_feature(vard, 0, 1) > 0); > > +} > > + > > +static inline > > +bool tq_vard_has_secelem(const struct tq_vard *vard) > > +{ > > + return (tq_vard_has_feature(vard, 0, 0) > 0); > > +} > > + > > +static inline > > +bool tq_vard_has_rtc(const struct tq_vard *vard) > > +{ > > + return (tq_vard_has_feature(vard, 4, 3) > 0); > > +} > > + > > +static inline u32 tq_vard_get_formfactor(const struct tq_vard *vard) > > +{ > > + return (u32)(vard->formfactor & VARD_FORMFACTOR_MASK_TYPE); > > +}; > > + > > +static inline > > +bool tq_vard_is_lga(const struct tq_vard *vard) > > +{ > > + return (tq_vard_get_formfactor(vard) == VARD_FORMFACTOR_TYPE_LGA); > > +} > > + > > +static inline > > +bool tq_vard_is_connector(const struct tq_vard *vard) > > +{ > > + return (tq_vard_get_formfactor(vard) == VARD_FORMFACTOR_TYPE_CONNECTOR); > > +} > > + > > +static inline > > +bool tq_vard_is_smarc2(const struct tq_vard *vard) > > +{ > > + return (tq_vard_get_formfactor(vard) == VARD_FORMFACTOR_TYPE_SMARC2); > > +} > > + > > +void tq_vard_show(const struct tq_vard *vard); > > + > > +struct tq_som_feature_list; > > + > > +/** > > + * fill in presence information from VARD. > > + * > > + * @param[in] vard pointer to VARD structure from SOM EEPROM > > + * @param[in] features SOM specific feature list > > + * > > + * @return 0 on success > > + * > > + * Must be called after data was read to vard. The function checks > > + * if vard is valid, goes through the list and sets the present flag > > + * for each entry depending on the flags in vard. > > + */ > > +int tq_vard_detect_features(const struct tq_vard *vard, > > + struct tq_som_feature_list *features); > > + > > +#define TQ_EE_MAC_BYTES 6 > > +#define TQ_EE_SERIAL_BYTES 8 > > +#define TQ_EE_BDID_BYTES 0x40 > > + > > +struct tq_eeprom { > > + struct tq_vard vard; > > + u8 mac[TQ_EE_MAC_BYTES]; > > + u8 serial[TQ_EE_SERIAL_BYTES + 1]; > > + u8 id[TQ_EE_BDID_BYTES + 1]; > > +}; > > + > > +struct pbl_i2c; > > + > > +struct tq_eeprom *pbl_tq_read_eeprom(struct pbl_i2c *i2c, u8 addr); > > + > > +#endif > > -- > > 2.39.2 > > > > > > > -- Pengutronix e.K. | | Steuerwalder Str. 21 | http://www.pengutronix.de/ | 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 | Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 | ^ permalink raw reply [flat|nested] 12+ messages in thread
* [PATCH v2 6/8] ARM: i.MX9: add i2c base address defines 2024-02-05 7:45 [PATCH v2 0/8] ARM: i.MX93: TQMA93xx: Add LGA variant Sascha Hauer ` (4 preceding siblings ...) 2024-02-05 7:45 ` [PATCH v2 5/8] common: add TQ EEPROM support Sascha Hauer @ 2024-02-05 7:45 ` Sascha Hauer 2024-02-05 7:45 ` [PATCH v2 7/8] ARM: i.MX9: rename TQ i.MX93 board to TQMA93XX Sascha Hauer ` (2 subsequent siblings) 8 siblings, 0 replies; 12+ messages in thread From: Sascha Hauer @ 2024-02-05 7:45 UTC (permalink / raw) To: Barebox List Add I2C base addresses for non device tree PBL use. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> --- include/mach/imx/imx9-regs.h | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/include/mach/imx/imx9-regs.h b/include/mach/imx/imx9-regs.h index 6be61c90e3..6a87f7eb3a 100644 --- a/include/mach/imx/imx9-regs.h +++ b/include/mach/imx/imx9-regs.h @@ -1,13 +1,21 @@ #ifndef __MACH_IMX9_REGS_H #define __MACH_IMX9_REGS_H +#define MX9_I2C3_BASE_ADDR 0x42530000UL +#define MX9_I2C4_BASE_ADDR 0x42540000UL #define MX9_UART3_BASE_ADDR 0x42570000UL #define MX9_UART4_BASE_ADDR 0x42580000UL #define MX9_UART5_BASE_ADDR 0x42590000UL #define MX9_UART6_BASE_ADDR 0x425a0000UL #define MX9_UART7_BASE_ADDR 0x42690000UL #define MX9_UART8_BASE_ADDR 0x426a0000UL +#define MX9_I2C5_BASE_ADDR 0x426b0000UL +#define MX9_I2C6_BASE_ADDR 0x426c0000UL +#define MX9_I2C7_BASE_ADDR 0x426d0000UL +#define MX9_I2C8_BASE_ADDR 0x426e0000UL #define MX9_SYSCNT_CTRL_BASE_ADDR 0x44290000UL +#define MX9_I2C1_BASE_ADDR 0x44340000UL +#define MX9_I2C2_BASE_ADDR 0x44350000UL #define MX9_UART1_BASE_ADDR 0x44380000UL #define MX9_UART2_BASE_ADDR 0x44390000UL #define MX9_IOMUXC_BASE_ADDR 0x443c0000UL -- 2.39.2 ^ permalink raw reply [flat|nested] 12+ messages in thread
* [PATCH v2 7/8] ARM: i.MX9: rename TQ i.MX93 board to TQMA93XX 2024-02-05 7:45 [PATCH v2 0/8] ARM: i.MX93: TQMA93xx: Add LGA variant Sascha Hauer ` (5 preceding siblings ...) 2024-02-05 7:45 ` [PATCH v2 6/8] ARM: i.MX9: add i2c base address defines Sascha Hauer @ 2024-02-05 7:45 ` Sascha Hauer 2024-02-05 7:45 ` [PATCH v2 8/8] ARM: i.MX: tqma93xx: Add LGA board variant Sascha Hauer 2024-02-08 7:19 ` [PATCH v2 0/8] ARM: i.MX93: TQMA93xx: Add LGA variant Sascha Hauer 8 siblings, 0 replies; 12+ messages in thread From: Sascha Hauer @ 2024-02-05 7:45 UTC (permalink / raw) To: Barebox List The TQ i.MX93 boards come in different variants, all of which can be identified with an EEPROM. We can support all variants in a single image, so rename the tqmba9xxxca, which is only one variant, to TQMA93XX which can be used as a name covering all variants. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> --- arch/arm/boards/Makefile | 2 +- arch/arm/boards/{tqmba9xxxca => tqma93xx}/Makefile | 0 arch/arm/boards/{tqmba9xxxca => tqma93xx}/board.c | 0 arch/arm/boards/{tqmba9xxxca => tqma93xx}/lowlevel.c | 6 +++--- .../{tqmba9xxxca => tqma93xx}/lpddr4x_tqma93xxca_timing.c | 0 arch/arm/configs/imx_v8_defconfig | 2 +- arch/arm/configs/multi_v8_defconfig | 2 +- arch/arm/dts/Makefile | 2 +- arch/arm/mach-imx/Kconfig | 4 ++-- images/Makefile.imx | 6 +++--- 10 files changed, 12 insertions(+), 12 deletions(-) rename arch/arm/boards/{tqmba9xxxca => tqma93xx}/Makefile (100%) rename arch/arm/boards/{tqmba9xxxca => tqma93xx}/board.c (100%) rename arch/arm/boards/{tqmba9xxxca => tqma93xx}/lowlevel.c (86%) rename arch/arm/boards/{tqmba9xxxca => tqma93xx}/lpddr4x_tqma93xxca_timing.c (100%) diff --git a/arch/arm/boards/Makefile b/arch/arm/boards/Makefile index 875d011573..e597b02be6 100644 --- a/arch/arm/boards/Makefile +++ b/arch/arm/boards/Makefile @@ -200,4 +200,4 @@ obj-$(CONFIG_MACH_RADXA_ROCK3) += radxa-rock3/ obj-$(CONFIG_MACH_RADXA_ROCK5) += radxa-rock5/ obj-$(CONFIG_MACH_VARISCITE_DT8MCUSTOMBOARD_IMX8MP) += variscite-dt8mcustomboard-imx8mp/ obj-$(CONFIG_MACH_RADXA_CM3) += radxa-cm3/ -obj-$(CONFIG_MACH_TQ_MBA9XXXCA) += tqmba9xxxca/ +obj-$(CONFIG_MACH_TQMA93XX) += tqma93xx/ diff --git a/arch/arm/boards/tqmba9xxxca/Makefile b/arch/arm/boards/tqma93xx/Makefile similarity index 100% rename from arch/arm/boards/tqmba9xxxca/Makefile rename to arch/arm/boards/tqma93xx/Makefile diff --git a/arch/arm/boards/tqmba9xxxca/board.c b/arch/arm/boards/tqma93xx/board.c similarity index 100% rename from arch/arm/boards/tqmba9xxxca/board.c rename to arch/arm/boards/tqma93xx/board.c diff --git a/arch/arm/boards/tqmba9xxxca/lowlevel.c b/arch/arm/boards/tqma93xx/lowlevel.c similarity index 86% rename from arch/arm/boards/tqmba9xxxca/lowlevel.c rename to arch/arm/boards/tqma93xx/lowlevel.c index 64913b8de9..9e2e0828ca 100644 --- a/arch/arm/boards/tqmba9xxxca/lowlevel.c +++ b/arch/arm/boards/tqma93xx/lowlevel.c @@ -15,7 +15,7 @@ extern char __dtb_z_imx93_tqma9352_mba93xxca_start[]; extern struct dram_timing_info tqma93xxca_dram_timing; -static noinline void tqma9352_mba93xxca_continue(void) +static noinline void tqma93xx_continue(void) { void *base = IOMEM(MX9_UART1_BASE_ADDR); void *muxbase = IOMEM(MX9_IOMUXC_BASE_ADDR); @@ -34,7 +34,7 @@ static noinline void tqma9352_mba93xxca_continue(void) imx93_barebox_entry(__dtb_z_imx93_tqma9352_mba93xxca_start); } -ENTRY_FUNCTION(start_imx93_tqma9352_mba93xxca, r0, r1, r2) +ENTRY_FUNCTION(start_imx93_tqma93xx, r0, r1, r2) { if (current_el() == 3) imx93_cpu_lowlevel_init(); @@ -42,5 +42,5 @@ ENTRY_FUNCTION(start_imx93_tqma9352_mba93xxca, r0, r1, r2) relocate_to_current_adr(); setup_c(); - tqma9352_mba93xxca_continue(); + tqma93xx_continue(); } diff --git a/arch/arm/boards/tqmba9xxxca/lpddr4x_tqma93xxca_timing.c b/arch/arm/boards/tqma93xx/lpddr4x_tqma93xxca_timing.c similarity index 100% rename from arch/arm/boards/tqmba9xxxca/lpddr4x_tqma93xxca_timing.c rename to arch/arm/boards/tqma93xx/lpddr4x_tqma93xxca_timing.c diff --git a/arch/arm/configs/imx_v8_defconfig b/arch/arm/configs/imx_v8_defconfig index 731156e4fe..902c22e8b2 100644 --- a/arch/arm/configs/imx_v8_defconfig +++ b/arch/arm/configs/imx_v8_defconfig @@ -13,7 +13,7 @@ CONFIG_MACH_TQ_MBA8MPXL=y CONFIG_MACH_VARISCITE_DT8MCUSTOMBOARD_IMX8MP=y CONFIG_MACH_ZII_IMX8MQ_DEV=y CONFIG_64BIT=y -CONFIG_MACH_TQ_MBA9XXXCA=y +CONFIG_MACH_TQMA93XX=y CONFIG_ARM_OPTIMZED_STRING_FUNCTIONS=y CONFIG_MMU=y CONFIG_MALLOC_SIZE=0x0 diff --git a/arch/arm/configs/multi_v8_defconfig b/arch/arm/configs/multi_v8_defconfig index 677395b1f9..31d849bcce 100644 --- a/arch/arm/configs/multi_v8_defconfig +++ b/arch/arm/configs/multi_v8_defconfig @@ -18,7 +18,7 @@ CONFIG_MACH_SKOV_IMX8MP=y CONFIG_MACH_TQ_MBA8MPXL=y CONFIG_MACH_VARISCITE_DT8MCUSTOMBOARD_IMX8MP=y CONFIG_MACH_ZII_IMX8MQ_DEV=y -CONFIG_MACH_TQ_MBA9XXXCA=y +CONFIG_MACH_TQMA93XX=y CONFIG_IMX_IIM=y CONFIG_ARCH_LAYERSCAPE_PPA=y CONFIG_MACH_LS1028ARDB=y diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 301014eaff..9b08fe5643 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -221,6 +221,6 @@ lwl-$(CONFIG_MACH_LS1021AIOT) += fsl-ls1021a-iot.dtb.o lwl-$(CONFIG_MACH_ZEDBOARD) += zynq-zed.dtb.o lwl-$(CONFIG_MACH_MNT_REFORM) += imx8mq-mnt-reform2.dtb.o lwl-$(CONFIG_MACH_VARISCITE_DT8MCUSTOMBOARD_IMX8MP) += imx8mp-var-dart-dt8mcustomboard.dtb.o -lwl-$(CONFIG_MACH_TQ_MBA9XXXCA) += imx93-tqma9352-mba93xxca.dtb.o +lwl-$(CONFIG_MACH_TQMA93XX) += imx93-tqma9352-mba93xxca.dtb.o clean-files := *.dtb *.dtb.S .*.dtc .*.pre .*.dts *.dtb.z diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig index 60d01fe0f9..f52b7a4dd8 100644 --- a/arch/arm/mach-imx/Kconfig +++ b/arch/arm/mach-imx/Kconfig @@ -732,8 +732,8 @@ config MACH_ZII_IMX8MQ_DEV comment "i.MX93 boards" -config MACH_TQ_MBA9XXXCA - bool "TQ i.MX93 on MBa9xxxCA Board" +config MACH_TQMA93XX + bool "TQ i.MX93 on TQMA93XX Board" select ARCH_IMX93 select IMX9_DRAM select FIRMWARE_IMX93_ATF diff --git a/images/Makefile.imx b/images/Makefile.imx index 7f2f58b0f5..08496d36b7 100644 --- a/images/Makefile.imx +++ b/images/Makefile.imx @@ -509,6 +509,6 @@ cmd_imx9img = $(objtree)/scripts/imx9image -soc IMX9 -c -ap $< a55 0x2049A000 -o $(obj)/%.imx9img: $(obj)/% FORCE $(call if_changed,imx9img) -pblb-$(CONFIG_MACH_TQ_MBA9XXXCA) += start_imx93_tqma9352_mba93xxca -FILE_barebox-tqmba9xxxca.img = start_imx93_tqma9352_mba93xxca.pblb.imx9img -image-$(CONFIG_MACH_TQ_MBA9XXXCA) += barebox-tqmba9xxxca.img +pblb-$(CONFIG_MACH_TQMA93XX) += start_imx93_tqma93xx +FILE_barebox-tqma93xx.img = start_imx93_tqma93xx.pblb.imx9img +image-$(CONFIG_MACH_TQMA93XX) += barebox-tqma93xx.img -- 2.39.2 ^ permalink raw reply [flat|nested] 12+ messages in thread
* [PATCH v2 8/8] ARM: i.MX: tqma93xx: Add LGA board variant 2024-02-05 7:45 [PATCH v2 0/8] ARM: i.MX93: TQMA93xx: Add LGA variant Sascha Hauer ` (6 preceding siblings ...) 2024-02-05 7:45 ` [PATCH v2 7/8] ARM: i.MX9: rename TQ i.MX93 board to TQMA93XX Sascha Hauer @ 2024-02-05 7:45 ` Sascha Hauer 2024-02-08 7:19 ` [PATCH v2 0/8] ARM: i.MX93: TQMA93xx: Add LGA variant Sascha Hauer 8 siblings, 0 replies; 12+ messages in thread From: Sascha Hauer @ 2024-02-05 7:45 UTC (permalink / raw) To: Barebox List The LGA variant needs different DDR setup and another device tree. The board type can be read from EEPROM, so we don't need another image for it. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> --- arch/arm/boards/tqma93xx/Makefile | 2 +- arch/arm/boards/tqma93xx/lowlevel.c | 67 +- .../tqma93xx/lpddr4x_tqma93xxla_timing.c | 1482 +++++++++++++++++ arch/arm/dts/Makefile | 3 +- arch/arm/dts/imx93-tqma9352-mba93xxca.dts | 38 +- arch/arm/dts/imx93-tqma9352-mba93xxla.dts | 5 + arch/arm/dts/imx93-tqma93xx.dtsi | 37 + arch/arm/mach-imx/Kconfig | 3 + 8 files changed, 1596 insertions(+), 41 deletions(-) create mode 100644 arch/arm/boards/tqma93xx/lpddr4x_tqma93xxla_timing.c create mode 100644 arch/arm/dts/imx93-tqma9352-mba93xxla.dts create mode 100644 arch/arm/dts/imx93-tqma93xx.dtsi diff --git a/arch/arm/boards/tqma93xx/Makefile b/arch/arm/boards/tqma93xx/Makefile index 2957523cdd..1bef9e284d 100644 --- a/arch/arm/boards/tqma93xx/Makefile +++ b/arch/arm/boards/tqma93xx/Makefile @@ -1,2 +1,2 @@ -lwl-y += lowlevel.o lpddr4x_tqma93xxca_timing.o +lwl-y += lowlevel.o lpddr4x_tqma93xxca_timing.o lpddr4x_tqma93xxla_timing.o obj-y += board.o diff --git a/arch/arm/boards/tqma93xx/lowlevel.c b/arch/arm/boards/tqma93xx/lowlevel.c index 9e2e0828ca..7d6b217fea 100644 --- a/arch/arm/boards/tqma93xx/lowlevel.c +++ b/arch/arm/boards/tqma93xx/lowlevel.c @@ -11,27 +11,90 @@ #include <mach/imx/xload.h> #include <mach/imx/romapi.h> #include <mach/imx/esdctl.h> +#include <pbl/i2c.h> +#include <tq_eeprom.h> extern char __dtb_z_imx93_tqma9352_mba93xxca_start[]; +extern char __dtb_z_imx93_tqma9352_mba93xxla_start[]; extern struct dram_timing_info tqma93xxca_dram_timing; +extern struct dram_timing_info tqma93xxla_dram_timing; + +static int tqma93xx_get_formfactor(void) +{ + struct pbl_i2c *i2c; + struct tq_eeprom *eeprom; + phys_size_t ramsize; + int formfactor; + + i2c = imx93_i2c_early_init(IOMEM(MX9_I2C1_BASE_ADDR)); + + eeprom = pbl_tq_read_eeprom(i2c, 0x53); + if (!eeprom) + return VARD_FORMFACTOR_TYPE_CONNECTOR; + + ramsize = tq_vard_ramsize(&eeprom->vard); + if (ramsize != SZ_1G) + pr_err("unsupported ram size 0x%08llx\n", ramsize); + + formfactor = tq_vard_get_formfactor(&eeprom->vard); + + switch (formfactor) { + case VARD_FORMFACTOR_TYPE_LGA: + pr_debug("LGA board type\n"); + break; + case VARD_FORMFACTOR_TYPE_CONNECTOR: + pr_debug("CONNECTOR board type\n"); + break; + default: + pr_err("Unknown formfactor\n"); + formfactor = VARD_FORMFACTOR_TYPE_CONNECTOR; + } + + return formfactor; +} static noinline void tqma93xx_continue(void) { void *base = IOMEM(MX9_UART1_BASE_ADDR); void *muxbase = IOMEM(MX9_IOMUXC_BASE_ADDR); + int formfactor; + void *fdt; + writel(0x10, muxbase + 0x170); + writel(0x10, muxbase + 0x174); writel(0x0, muxbase + 0x184); + writel(0xb9e, muxbase + 0x320); + writel(0xb9e, muxbase + 0x324); + imx9_uart_setup(IOMEM(base)); pbl_set_putc(lpuart32_putc, base + 0x10); + formfactor = tqma93xx_get_formfactor(); + if (current_el() == 3) { - imx93_ddr_init(&tqma93xxca_dram_timing, DRAM_TYPE_LPDDR4); + switch (formfactor) { + case VARD_FORMFACTOR_TYPE_LGA: + imx93_ddr_init(&tqma93xxla_dram_timing, DRAM_TYPE_LPDDR4); + break; + case VARD_FORMFACTOR_TYPE_CONNECTOR: + imx93_ddr_init(&tqma93xxca_dram_timing, DRAM_TYPE_LPDDR4); + break; + } imx93_romapi_load_image(); imx93_load_and_start_image_via_tfa(); } - imx93_barebox_entry(__dtb_z_imx93_tqma9352_mba93xxca_start); + switch (formfactor) { + case VARD_FORMFACTOR_TYPE_LGA: + fdt = __dtb_z_imx93_tqma9352_mba93xxla_start; + break; + case VARD_FORMFACTOR_TYPE_CONNECTOR: + fdt = __dtb_z_imx93_tqma9352_mba93xxca_start; + break; + } + + imx93_barebox_entry(fdt); } ENTRY_FUNCTION(start_imx93_tqma93xx, r0, r1, r2) diff --git a/arch/arm/boards/tqma93xx/lpddr4x_tqma93xxla_timing.c b/arch/arm/boards/tqma93xx/lpddr4x_tqma93xxla_timing.c new file mode 100644 index 0000000000..7ca8c3aedc --- /dev/null +++ b/arch/arm/boards/tqma93xx/lpddr4x_tqma93xxla_timing.c @@ -0,0 +1,1482 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * Copyright 2022 NXP + */ + +/* generated from TQMa9xxxLA.DDR-Timing.Beta.0001.mex */ + +#include <common.h> +#include <soc/imx9/ddr.h> + +static struct dram_cfg_param ddr_ddrc_cfg[] = { + /** Initialize DDRC registers **/ + { 0x4e300110, 0x44100001 }, + { 0x4e300000, 0x8000bf }, + { 0x4e300008, 0x0 }, + { 0x4e300080, 0x80000412 }, + { 0x4e300084, 0x0 }, + { 0x4e300100, 0x24a0321b }, + { 0x4e300104, 0xa8ee001b }, + { 0x4e300108, 0x2f2e3233 }, + { 0x4e30010c, 0x85c18b }, + { 0x4e300114, 0x1002 }, + { 0x4e300124, 0x1c77071d }, + { 0x4e300160, 0x5402 }, + { 0x4e30016c, 0x35f00000 }, + { 0x4e300170, 0x8b0b0608 }, + { 0x4e300250, 0x28 }, + { 0x4e300254, 0x0 }, + { 0x4e30025c, 0x400 }, + { 0x4e300260, 0x0 }, + { 0x4e300300, 0x14281114 }, + { 0x4e300304, 0x106110a }, + { 0x4e300308, 0xa200e3c }, + { 0x4e300f04, 0x80 }, + { 0x4e300800, 0x39300002 }, + { 0x4e300804, 0x1f1f1f1f }, +}; + +/* PHY Initialize Configuration */ +static struct dram_cfg_param ddr_ddrphy_cfg[] = { + { 0x100a0, 0x2 }, + { 0x100a1, 0x1 }, + { 0x100a2, 0x0 }, + { 0x100a3, 0x4 }, + { 0x100a4, 0x3 }, + { 0x100a5, 0x5 }, + { 0x100a6, 0x6 }, + { 0x100a7, 0x7 }, + { 0x110a0, 0x4 }, + { 0x110a1, 0x0 }, + { 0x110a2, 0x2 }, + { 0x110a3, 0x3 }, + { 0x110a4, 0x1 }, + { 0x110a5, 0x5 }, + { 0x110a6, 0x7 }, + { 0x110a7, 0x6 }, + { 0x1005f, 0x5ff }, + { 0x1015f, 0x5ff }, + { 0x1105f, 0x5ff }, + { 0x1115f, 0x5ff }, + { 0x55, 0x1ff }, + { 0x1055, 0x1ff }, + { 0x2055, 0x1ff }, + { 0x200c5, 0x19 }, + { 0x2002e, 0x2 }, + { 0x90204, 0x0 }, + { 0x20024, 0x1e3 }, + { 0x2003a, 0x2 }, + { 0x2007d, 0x212 }, + { 0x2007c, 0x61 }, + { 0x20056, 0x3 }, + { 0x1004d, 0xe00 }, + { 0x1014d, 0xe00 }, + { 0x1104d, 0xe00 }, + { 0x1114d, 0xe00 }, + { 0x10049, 0xe00 }, + { 0x10149, 0xe00 }, + { 0x11049, 0xe00 }, + { 0x11149, 0xe00 }, + { 0x43, 0x60 }, + { 0x1043, 0x60 }, + { 0x2043, 0x60 }, + { 0x20018, 0x1 }, + { 0x20075, 0x4 }, + { 0x20050, 0x0 }, + { 0x2009b, 0x2 }, + { 0x20008, 0x3a5 }, + { 0x20088, 0x9 }, + { 0x200b2, 0x10c }, + { 0x10043, 0x5a1 }, + { 0x10143, 0x5a1 }, + { 0x11043, 0x5a1 }, + { 0x11143, 0x5a1 }, + { 0x200fa, 0x2 }, + { 0x20019, 0x1 }, + { 0x200f0, 0x0 }, + { 0x200f1, 0x0 }, + { 0x200f2, 0x4444 }, + { 0x200f3, 0x8888 }, + { 0x200f4, 0x5555 }, + { 0x200f5, 0x0 }, + { 0x200f6, 0x0 }, + { 0x200f7, 0xf000 }, + { 0x1004a, 0x500 }, + { 0x1104a, 0x500 }, + { 0x20025, 0x0 }, + { 0x2002d, 0x0 }, + { 0x2002c, 0x0 }, +}; + +/* ddr phy trained csr */ +static struct dram_cfg_param ddr_ddrphy_trained_csr[] = { + { 0x200b2, 0x0 }, + { 0x1200b2, 0x0 }, + { 0x2200b2, 0x0 }, + { 0x200cb, 0x0 }, + { 0x10043, 0x0 }, + { 0x110043, 0x0 }, + { 0x210043, 0x0 }, + { 0x10143, 0x0 }, + { 0x110143, 0x0 }, + { 0x210143, 0x0 }, + { 0x11043, 0x0 }, + { 0x111043, 0x0 }, + { 0x211043, 0x0 }, + { 0x11143, 0x0 }, + { 0x111143, 0x0 }, + { 0x211143, 0x0 }, + { 0x12043, 0x0 }, + { 0x112043, 0x0 }, + { 0x212043, 0x0 }, + { 0x12143, 0x0 }, + { 0x112143, 0x0 }, + { 0x212143, 0x0 }, + { 0x13043, 0x0 }, + { 0x113043, 0x0 }, + { 0x213043, 0x0 }, + { 0x13143, 0x0 }, + { 0x113143, 0x0 }, + { 0x213143, 0x0 }, + { 0x80, 0x0 }, + { 0x100080, 0x0 }, + { 0x200080, 0x0 }, + { 0x1080, 0x0 }, + { 0x101080, 0x0 }, + { 0x201080, 0x0 }, + { 0x2080, 0x0 }, + { 0x102080, 0x0 }, + { 0x202080, 0x0 }, + { 0x3080, 0x0 }, + { 0x103080, 0x0 }, + { 0x203080, 0x0 }, + { 0x4080, 0x0 }, + { 0x104080, 0x0 }, + { 0x204080, 0x0 }, + { 0x5080, 0x0 }, + { 0x105080, 0x0 }, + { 0x205080, 0x0 }, + { 0x6080, 0x0 }, + { 0x106080, 0x0 }, + { 0x206080, 0x0 }, + { 0x7080, 0x0 }, + { 0x107080, 0x0 }, + { 0x207080, 0x0 }, + { 0x8080, 0x0 }, + { 0x108080, 0x0 }, + { 0x208080, 0x0 }, + { 0x9080, 0x0 }, + { 0x109080, 0x0 }, + { 0x209080, 0x0 }, + { 0x10080, 0x0 }, + { 0x110080, 0x0 }, + { 0x210080, 0x0 }, + { 0x10180, 0x0 }, + { 0x110180, 0x0 }, + { 0x210180, 0x0 }, + { 0x11080, 0x0 }, + { 0x111080, 0x0 }, + { 0x211080, 0x0 }, + { 0x11180, 0x0 }, + { 0x111180, 0x0 }, + { 0x211180, 0x0 }, + { 0x12080, 0x0 }, + { 0x112080, 0x0 }, + { 0x212080, 0x0 }, + { 0x12180, 0x0 }, + { 0x112180, 0x0 }, + { 0x212180, 0x0 }, + { 0x13080, 0x0 }, + { 0x113080, 0x0 }, + { 0x213080, 0x0 }, + { 0x13180, 0x0 }, + { 0x113180, 0x0 }, + { 0x213180, 0x0 }, + { 0x10081, 0x0 }, + { 0x110081, 0x0 }, + { 0x210081, 0x0 }, + { 0x10181, 0x0 }, + { 0x110181, 0x0 }, + { 0x210181, 0x0 }, + { 0x11081, 0x0 }, + { 0x111081, 0x0 }, + { 0x211081, 0x0 }, + { 0x11181, 0x0 }, + { 0x111181, 0x0 }, + { 0x211181, 0x0 }, + { 0x12081, 0x0 }, + { 0x112081, 0x0 }, + { 0x212081, 0x0 }, + { 0x12181, 0x0 }, + { 0x112181, 0x0 }, + { 0x212181, 0x0 }, + { 0x13081, 0x0 }, + { 0x113081, 0x0 }, + { 0x213081, 0x0 }, + { 0x13181, 0x0 }, + { 0x113181, 0x0 }, + { 0x213181, 0x0 }, + { 0x100d0, 0x0 }, + { 0x1100d0, 0x0 }, + { 0x2100d0, 0x0 }, + { 0x101d0, 0x0 }, + { 0x1101d0, 0x0 }, + { 0x2101d0, 0x0 }, + { 0x110d0, 0x0 }, + { 0x1110d0, 0x0 }, + { 0x2110d0, 0x0 }, + { 0x111d0, 0x0 }, + { 0x1111d0, 0x0 }, + { 0x2111d0, 0x0 }, + { 0x120d0, 0x0 }, + { 0x1120d0, 0x0 }, + { 0x2120d0, 0x0 }, + { 0x121d0, 0x0 }, + { 0x1121d0, 0x0 }, + { 0x2121d0, 0x0 }, + { 0x130d0, 0x0 }, + { 0x1130d0, 0x0 }, + { 0x2130d0, 0x0 }, + { 0x131d0, 0x0 }, + { 0x1131d0, 0x0 }, + { 0x2131d0, 0x0 }, + { 0x100d1, 0x0 }, + { 0x1100d1, 0x0 }, + { 0x2100d1, 0x0 }, + { 0x101d1, 0x0 }, + { 0x1101d1, 0x0 }, + { 0x2101d1, 0x0 }, + { 0x110d1, 0x0 }, + { 0x1110d1, 0x0 }, + { 0x2110d1, 0x0 }, + { 0x111d1, 0x0 }, + { 0x1111d1, 0x0 }, + { 0x2111d1, 0x0 }, + { 0x120d1, 0x0 }, + { 0x1120d1, 0x0 }, + { 0x2120d1, 0x0 }, + { 0x121d1, 0x0 }, + { 0x1121d1, 0x0 }, + { 0x2121d1, 0x0 }, + { 0x130d1, 0x0 }, + { 0x1130d1, 0x0 }, + { 0x2130d1, 0x0 }, + { 0x131d1, 0x0 }, + { 0x1131d1, 0x0 }, + { 0x2131d1, 0x0 }, + { 0x10068, 0x0 }, + { 0x10168, 0x0 }, + { 0x10268, 0x0 }, + { 0x10368, 0x0 }, + { 0x10468, 0x0 }, + { 0x10568, 0x0 }, + { 0x10668, 0x0 }, + { 0x10768, 0x0 }, + { 0x10868, 0x0 }, + { 0x11068, 0x0 }, + { 0x11168, 0x0 }, + { 0x11268, 0x0 }, + { 0x11368, 0x0 }, + { 0x11468, 0x0 }, + { 0x11568, 0x0 }, + { 0x11668, 0x0 }, + { 0x11768, 0x0 }, + { 0x11868, 0x0 }, + { 0x12068, 0x0 }, + { 0x12168, 0x0 }, + { 0x12268, 0x0 }, + { 0x12368, 0x0 }, + { 0x12468, 0x0 }, + { 0x12568, 0x0 }, + { 0x12668, 0x0 }, + { 0x12768, 0x0 }, + { 0x12868, 0x0 }, + { 0x13068, 0x0 }, + { 0x13168, 0x0 }, + { 0x13268, 0x0 }, + { 0x13368, 0x0 }, + { 0x13468, 0x0 }, + { 0x13568, 0x0 }, + { 0x13668, 0x0 }, + { 0x13768, 0x0 }, + { 0x13868, 0x0 }, + { 0x10069, 0x0 }, + { 0x10169, 0x0 }, + { 0x10269, 0x0 }, + { 0x10369, 0x0 }, + { 0x10469, 0x0 }, + { 0x10569, 0x0 }, + { 0x10669, 0x0 }, + { 0x10769, 0x0 }, + { 0x10869, 0x0 }, + { 0x11069, 0x0 }, + { 0x11169, 0x0 }, + { 0x11269, 0x0 }, + { 0x11369, 0x0 }, + { 0x11469, 0x0 }, + { 0x11569, 0x0 }, + { 0x11669, 0x0 }, + { 0x11769, 0x0 }, + { 0x11869, 0x0 }, + { 0x12069, 0x0 }, + { 0x12169, 0x0 }, + { 0x12269, 0x0 }, + { 0x12369, 0x0 }, + { 0x12469, 0x0 }, + { 0x12569, 0x0 }, + { 0x12669, 0x0 }, + { 0x12769, 0x0 }, + { 0x12869, 0x0 }, + { 0x13069, 0x0 }, + { 0x13169, 0x0 }, + { 0x13269, 0x0 }, + { 0x13369, 0x0 }, + { 0x13469, 0x0 }, + { 0x13569, 0x0 }, + { 0x13669, 0x0 }, + { 0x13769, 0x0 }, + { 0x13869, 0x0 }, + { 0x1008c, 0x0 }, + { 0x11008c, 0x0 }, + { 0x21008c, 0x0 }, + { 0x1018c, 0x0 }, + { 0x11018c, 0x0 }, + { 0x21018c, 0x0 }, + { 0x1108c, 0x0 }, + { 0x11108c, 0x0 }, + { 0x21108c, 0x0 }, + { 0x1118c, 0x0 }, + { 0x11118c, 0x0 }, + { 0x21118c, 0x0 }, + { 0x1208c, 0x0 }, + { 0x11208c, 0x0 }, + { 0x21208c, 0x0 }, + { 0x1218c, 0x0 }, + { 0x11218c, 0x0 }, + { 0x21218c, 0x0 }, + { 0x1308c, 0x0 }, + { 0x11308c, 0x0 }, + { 0x21308c, 0x0 }, + { 0x1318c, 0x0 }, + { 0x11318c, 0x0 }, + { 0x21318c, 0x0 }, + { 0x1008d, 0x0 }, + { 0x11008d, 0x0 }, + { 0x21008d, 0x0 }, + { 0x1018d, 0x0 }, + { 0x11018d, 0x0 }, + { 0x21018d, 0x0 }, + { 0x1108d, 0x0 }, + { 0x11108d, 0x0 }, + { 0x21108d, 0x0 }, + { 0x1118d, 0x0 }, + { 0x11118d, 0x0 }, + { 0x21118d, 0x0 }, + { 0x1208d, 0x0 }, + { 0x11208d, 0x0 }, + { 0x21208d, 0x0 }, + { 0x1218d, 0x0 }, + { 0x11218d, 0x0 }, + { 0x21218d, 0x0 }, + { 0x1308d, 0x0 }, + { 0x11308d, 0x0 }, + { 0x21308d, 0x0 }, + { 0x1318d, 0x0 }, + { 0x11318d, 0x0 }, + { 0x21318d, 0x0 }, + { 0x100c0, 0x0 }, + { 0x1100c0, 0x0 }, + { 0x2100c0, 0x0 }, + { 0x101c0, 0x0 }, + { 0x1101c0, 0x0 }, + { 0x2101c0, 0x0 }, + { 0x102c0, 0x0 }, + { 0x1102c0, 0x0 }, + { 0x2102c0, 0x0 }, + { 0x103c0, 0x0 }, + { 0x1103c0, 0x0 }, + { 0x2103c0, 0x0 }, + { 0x104c0, 0x0 }, + { 0x1104c0, 0x0 }, + { 0x2104c0, 0x0 }, + { 0x105c0, 0x0 }, + { 0x1105c0, 0x0 }, + { 0x2105c0, 0x0 }, + { 0x106c0, 0x0 }, + { 0x1106c0, 0x0 }, + { 0x2106c0, 0x0 }, + { 0x107c0, 0x0 }, + { 0x1107c0, 0x0 }, + { 0x2107c0, 0x0 }, + { 0x108c0, 0x0 }, + { 0x1108c0, 0x0 }, + { 0x2108c0, 0x0 }, + { 0x110c0, 0x0 }, + { 0x1110c0, 0x0 }, + { 0x2110c0, 0x0 }, + { 0x111c0, 0x0 }, + { 0x1111c0, 0x0 }, + { 0x2111c0, 0x0 }, + { 0x112c0, 0x0 }, + { 0x1112c0, 0x0 }, + { 0x2112c0, 0x0 }, + { 0x113c0, 0x0 }, + { 0x1113c0, 0x0 }, + { 0x2113c0, 0x0 }, + { 0x114c0, 0x0 }, + { 0x1114c0, 0x0 }, + { 0x2114c0, 0x0 }, + { 0x115c0, 0x0 }, + { 0x1115c0, 0x0 }, + { 0x2115c0, 0x0 }, + { 0x116c0, 0x0 }, + { 0x1116c0, 0x0 }, + { 0x2116c0, 0x0 }, + { 0x117c0, 0x0 }, + { 0x1117c0, 0x0 }, + { 0x2117c0, 0x0 }, + { 0x118c0, 0x0 }, + { 0x1118c0, 0x0 }, + { 0x2118c0, 0x0 }, + { 0x120c0, 0x0 }, + { 0x1120c0, 0x0 }, + { 0x2120c0, 0x0 }, + { 0x121c0, 0x0 }, + { 0x1121c0, 0x0 }, + { 0x2121c0, 0x0 }, + { 0x122c0, 0x0 }, + { 0x1122c0, 0x0 }, + { 0x2122c0, 0x0 }, + { 0x123c0, 0x0 }, + { 0x1123c0, 0x0 }, + { 0x2123c0, 0x0 }, + { 0x124c0, 0x0 }, + { 0x1124c0, 0x0 }, + { 0x2124c0, 0x0 }, + { 0x125c0, 0x0 }, + { 0x1125c0, 0x0 }, + { 0x2125c0, 0x0 }, + { 0x126c0, 0x0 }, + { 0x1126c0, 0x0 }, + { 0x2126c0, 0x0 }, + { 0x127c0, 0x0 }, + { 0x1127c0, 0x0 }, + { 0x2127c0, 0x0 }, + { 0x128c0, 0x0 }, + { 0x1128c0, 0x0 }, + { 0x2128c0, 0x0 }, + { 0x130c0, 0x0 }, + { 0x1130c0, 0x0 }, + { 0x2130c0, 0x0 }, + { 0x131c0, 0x0 }, + { 0x1131c0, 0x0 }, + { 0x2131c0, 0x0 }, + { 0x132c0, 0x0 }, + { 0x1132c0, 0x0 }, + { 0x2132c0, 0x0 }, + { 0x133c0, 0x0 }, + { 0x1133c0, 0x0 }, + { 0x2133c0, 0x0 }, + { 0x134c0, 0x0 }, + { 0x1134c0, 0x0 }, + { 0x2134c0, 0x0 }, + { 0x135c0, 0x0 }, + { 0x1135c0, 0x0 }, + { 0x2135c0, 0x0 }, + { 0x136c0, 0x0 }, + { 0x1136c0, 0x0 }, + { 0x2136c0, 0x0 }, + { 0x137c0, 0x0 }, + { 0x1137c0, 0x0 }, + { 0x2137c0, 0x0 }, + { 0x138c0, 0x0 }, + { 0x1138c0, 0x0 }, + { 0x2138c0, 0x0 }, + { 0x100c1, 0x0 }, + { 0x1100c1, 0x0 }, + { 0x2100c1, 0x0 }, + { 0x101c1, 0x0 }, + { 0x1101c1, 0x0 }, + { 0x2101c1, 0x0 }, + { 0x102c1, 0x0 }, + { 0x1102c1, 0x0 }, + { 0x2102c1, 0x0 }, + { 0x103c1, 0x0 }, + { 0x1103c1, 0x0 }, + { 0x2103c1, 0x0 }, + { 0x104c1, 0x0 }, + { 0x1104c1, 0x0 }, + { 0x2104c1, 0x0 }, + { 0x105c1, 0x0 }, + { 0x1105c1, 0x0 }, + { 0x2105c1, 0x0 }, + { 0x106c1, 0x0 }, + { 0x1106c1, 0x0 }, + { 0x2106c1, 0x0 }, + { 0x107c1, 0x0 }, + { 0x1107c1, 0x0 }, + { 0x2107c1, 0x0 }, + { 0x108c1, 0x0 }, + { 0x1108c1, 0x0 }, + { 0x2108c1, 0x0 }, + { 0x110c1, 0x0 }, + { 0x1110c1, 0x0 }, + { 0x2110c1, 0x0 }, + { 0x111c1, 0x0 }, + { 0x1111c1, 0x0 }, + { 0x2111c1, 0x0 }, + { 0x112c1, 0x0 }, + { 0x1112c1, 0x0 }, + { 0x2112c1, 0x0 }, + { 0x113c1, 0x0 }, + { 0x1113c1, 0x0 }, + { 0x2113c1, 0x0 }, + { 0x114c1, 0x0 }, + { 0x1114c1, 0x0 }, + { 0x2114c1, 0x0 }, + { 0x115c1, 0x0 }, + { 0x1115c1, 0x0 }, + { 0x2115c1, 0x0 }, + { 0x116c1, 0x0 }, + { 0x1116c1, 0x0 }, + { 0x2116c1, 0x0 }, + { 0x117c1, 0x0 }, + { 0x1117c1, 0x0 }, + { 0x2117c1, 0x0 }, + { 0x118c1, 0x0 }, + { 0x1118c1, 0x0 }, + { 0x2118c1, 0x0 }, + { 0x120c1, 0x0 }, + { 0x1120c1, 0x0 }, + { 0x2120c1, 0x0 }, + { 0x121c1, 0x0 }, + { 0x1121c1, 0x0 }, + { 0x2121c1, 0x0 }, + { 0x122c1, 0x0 }, + { 0x1122c1, 0x0 }, + { 0x2122c1, 0x0 }, + { 0x123c1, 0x0 }, + { 0x1123c1, 0x0 }, + { 0x2123c1, 0x0 }, + { 0x124c1, 0x0 }, + { 0x1124c1, 0x0 }, + { 0x2124c1, 0x0 }, + { 0x125c1, 0x0 }, + { 0x1125c1, 0x0 }, + { 0x2125c1, 0x0 }, + { 0x126c1, 0x0 }, + { 0x1126c1, 0x0 }, + { 0x2126c1, 0x0 }, + { 0x127c1, 0x0 }, + { 0x1127c1, 0x0 }, + { 0x2127c1, 0x0 }, + { 0x128c1, 0x0 }, + { 0x1128c1, 0x0 }, + { 0x2128c1, 0x0 }, + { 0x130c1, 0x0 }, + { 0x1130c1, 0x0 }, + { 0x2130c1, 0x0 }, + { 0x131c1, 0x0 }, + { 0x1131c1, 0x0 }, + { 0x2131c1, 0x0 }, + { 0x132c1, 0x0 }, + { 0x1132c1, 0x0 }, + { 0x2132c1, 0x0 }, + { 0x133c1, 0x0 }, + { 0x1133c1, 0x0 }, + { 0x2133c1, 0x0 }, + { 0x134c1, 0x0 }, + { 0x1134c1, 0x0 }, + { 0x2134c1, 0x0 }, + { 0x135c1, 0x0 }, + { 0x1135c1, 0x0 }, + { 0x2135c1, 0x0 }, + { 0x136c1, 0x0 }, + { 0x1136c1, 0x0 }, + { 0x2136c1, 0x0 }, + { 0x137c1, 0x0 }, + { 0x1137c1, 0x0 }, + { 0x2137c1, 0x0 }, + { 0x138c1, 0x0 }, + { 0x1138c1, 0x0 }, + { 0x2138c1, 0x0 }, + { 0x10020, 0x0 }, + { 0x110020, 0x0 }, + { 0x210020, 0x0 }, + { 0x11020, 0x0 }, + { 0x111020, 0x0 }, + { 0x211020, 0x0 }, + { 0x12020, 0x0 }, + { 0x112020, 0x0 }, + { 0x212020, 0x0 }, + { 0x13020, 0x0 }, + { 0x113020, 0x0 }, + { 0x213020, 0x0 }, + { 0x20072, 0x0 }, + { 0x20073, 0x0 }, + { 0x20074, 0x0 }, + { 0x100aa, 0x0 }, + { 0x110aa, 0x0 }, + { 0x120aa, 0x0 }, + { 0x130aa, 0x0 }, + { 0x20010, 0x0 }, + { 0x120010, 0x0 }, + { 0x220010, 0x0 }, + { 0x20011, 0x0 }, + { 0x120011, 0x0 }, + { 0x220011, 0x0 }, + { 0x100ae, 0x0 }, + { 0x1100ae, 0x0 }, + { 0x2100ae, 0x0 }, + { 0x100af, 0x0 }, + { 0x1100af, 0x0 }, + { 0x2100af, 0x0 }, + { 0x110ae, 0x0 }, + { 0x1110ae, 0x0 }, + { 0x2110ae, 0x0 }, + { 0x110af, 0x0 }, + { 0x1110af, 0x0 }, + { 0x2110af, 0x0 }, + { 0x120ae, 0x0 }, + { 0x1120ae, 0x0 }, + { 0x2120ae, 0x0 }, + { 0x120af, 0x0 }, + { 0x1120af, 0x0 }, + { 0x2120af, 0x0 }, + { 0x130ae, 0x0 }, + { 0x1130ae, 0x0 }, + { 0x2130ae, 0x0 }, + { 0x130af, 0x0 }, + { 0x1130af, 0x0 }, + { 0x2130af, 0x0 }, + { 0x20020, 0x0 }, + { 0x120020, 0x0 }, + { 0x220020, 0x0 }, + { 0x100a0, 0x0 }, + { 0x100a1, 0x0 }, + { 0x100a2, 0x0 }, + { 0x100a3, 0x0 }, + { 0x100a4, 0x0 }, + { 0x100a5, 0x0 }, + { 0x100a6, 0x0 }, + { 0x100a7, 0x0 }, + { 0x110a0, 0x0 }, + { 0x110a1, 0x0 }, + { 0x110a2, 0x0 }, + { 0x110a3, 0x0 }, + { 0x110a4, 0x0 }, + { 0x110a5, 0x0 }, + { 0x110a6, 0x0 }, + { 0x110a7, 0x0 }, + { 0x120a0, 0x0 }, + { 0x120a1, 0x0 }, + { 0x120a2, 0x0 }, + { 0x120a3, 0x0 }, + { 0x120a4, 0x0 }, + { 0x120a5, 0x0 }, + { 0x120a6, 0x0 }, + { 0x120a7, 0x0 }, + { 0x130a0, 0x0 }, + { 0x130a1, 0x0 }, + { 0x130a2, 0x0 }, + { 0x130a3, 0x0 }, + { 0x130a4, 0x0 }, + { 0x130a5, 0x0 }, + { 0x130a6, 0x0 }, + { 0x130a7, 0x0 }, + { 0x2007c, 0x0 }, + { 0x12007c, 0x0 }, + { 0x22007c, 0x0 }, + { 0x2007d, 0x0 }, + { 0x12007d, 0x0 }, + { 0x22007d, 0x0 }, + { 0x400fd, 0x0 }, + { 0x400c0, 0x0 }, + { 0x90201, 0x0 }, + { 0x190201, 0x0 }, + { 0x290201, 0x0 }, + { 0x90202, 0x0 }, + { 0x190202, 0x0 }, + { 0x290202, 0x0 }, + { 0x90203, 0x0 }, + { 0x190203, 0x0 }, + { 0x290203, 0x0 }, + { 0x90204, 0x0 }, + { 0x190204, 0x0 }, + { 0x290204, 0x0 }, + { 0x90205, 0x0 }, + { 0x190205, 0x0 }, + { 0x290205, 0x0 }, + { 0x90206, 0x0 }, + { 0x190206, 0x0 }, + { 0x290206, 0x0 }, + { 0x90207, 0x0 }, + { 0x190207, 0x0 }, + { 0x290207, 0x0 }, + { 0x90208, 0x0 }, + { 0x190208, 0x0 }, + { 0x290208, 0x0 }, + { 0x10062, 0x0 }, + { 0x10162, 0x0 }, + { 0x10262, 0x0 }, + { 0x10362, 0x0 }, + { 0x10462, 0x0 }, + { 0x10562, 0x0 }, + { 0x10662, 0x0 }, + { 0x10762, 0x0 }, + { 0x10862, 0x0 }, + { 0x11062, 0x0 }, + { 0x11162, 0x0 }, + { 0x11262, 0x0 }, + { 0x11362, 0x0 }, + { 0x11462, 0x0 }, + { 0x11562, 0x0 }, + { 0x11662, 0x0 }, + { 0x11762, 0x0 }, + { 0x11862, 0x0 }, + { 0x12062, 0x0 }, + { 0x12162, 0x0 }, + { 0x12262, 0x0 }, + { 0x12362, 0x0 }, + { 0x12462, 0x0 }, + { 0x12562, 0x0 }, + { 0x12662, 0x0 }, + { 0x12762, 0x0 }, + { 0x12862, 0x0 }, + { 0x13062, 0x0 }, + { 0x13162, 0x0 }, + { 0x13262, 0x0 }, + { 0x13362, 0x0 }, + { 0x13462, 0x0 }, + { 0x13562, 0x0 }, + { 0x13662, 0x0 }, + { 0x13762, 0x0 }, + { 0x13862, 0x0 }, + { 0x20077, 0x0 }, + { 0x10001, 0x0 }, + { 0x11001, 0x0 }, + { 0x12001, 0x0 }, + { 0x13001, 0x0 }, + { 0x10040, 0x0 }, + { 0x10140, 0x0 }, + { 0x10240, 0x0 }, + { 0x10340, 0x0 }, + { 0x10440, 0x0 }, + { 0x10540, 0x0 }, + { 0x10640, 0x0 }, + { 0x10740, 0x0 }, + { 0x10840, 0x0 }, + { 0x10030, 0x0 }, + { 0x10130, 0x0 }, + { 0x10230, 0x0 }, + { 0x10330, 0x0 }, + { 0x10430, 0x0 }, + { 0x10530, 0x0 }, + { 0x10630, 0x0 }, + { 0x10730, 0x0 }, + { 0x10830, 0x0 }, + { 0x11040, 0x0 }, + { 0x11140, 0x0 }, + { 0x11240, 0x0 }, + { 0x11340, 0x0 }, + { 0x11440, 0x0 }, + { 0x11540, 0x0 }, + { 0x11640, 0x0 }, + { 0x11740, 0x0 }, + { 0x11840, 0x0 }, + { 0x11030, 0x0 }, + { 0x11130, 0x0 }, + { 0x11230, 0x0 }, + { 0x11330, 0x0 }, + { 0x11430, 0x0 }, + { 0x11530, 0x0 }, + { 0x11630, 0x0 }, + { 0x11730, 0x0 }, + { 0x11830, 0x0 }, + { 0x12040, 0x0 }, + { 0x12140, 0x0 }, + { 0x12240, 0x0 }, + { 0x12340, 0x0 }, + { 0x12440, 0x0 }, + { 0x12540, 0x0 }, + { 0x12640, 0x0 }, + { 0x12740, 0x0 }, + { 0x12840, 0x0 }, + { 0x12030, 0x0 }, + { 0x12130, 0x0 }, + { 0x12230, 0x0 }, + { 0x12330, 0x0 }, + { 0x12430, 0x0 }, + { 0x12530, 0x0 }, + { 0x12630, 0x0 }, + { 0x12730, 0x0 }, + { 0x12830, 0x0 }, + { 0x13040, 0x0 }, + { 0x13140, 0x0 }, + { 0x13240, 0x0 }, + { 0x13340, 0x0 }, + { 0x13440, 0x0 }, + { 0x13540, 0x0 }, + { 0x13640, 0x0 }, + { 0x13740, 0x0 }, + { 0x13840, 0x0 }, + { 0x13030, 0x0 }, + { 0x13130, 0x0 }, + { 0x13230, 0x0 }, + { 0x13330, 0x0 }, + { 0x13430, 0x0 }, + { 0x13530, 0x0 }, + { 0x13630, 0x0 }, + { 0x13730, 0x0 }, + { 0x13830, 0x0 }, +}; + +/* P0 message block parameter for training firmware */ +static struct dram_cfg_param ddr_fsp0_cfg[] = { + { 0xd0000, 0x0 }, + { 0x54003, 0xe94 }, + { 0x54004, 0x4 }, + { 0x54006, 0x15 }, + { 0x54008, 0x131f }, + { 0x54009, 0xff }, + { 0x5400b, 0x4 }, + { 0x5400c, 0x1 }, + { 0x5400d, 0x100 }, + { 0x5400f, 0x100 }, + { 0x54012, 0x110 }, + { 0x54019, 0x36e4 }, + { 0x5401a, 0x32 }, + { 0x5401b, 0x1146 }, + { 0x5401c, 0x1108 }, + { 0x5401e, 0x6 }, + { 0x5401f, 0x36e4 }, + { 0x54020, 0x32 }, + { 0x54021, 0x1146 }, + { 0x54022, 0x1108 }, + { 0x54024, 0x6 }, + { 0x54032, 0xe400 }, + { 0x54033, 0x3236 }, + { 0x54034, 0x4600 }, + { 0x54035, 0x811 }, + { 0x54036, 0x11 }, + { 0x54037, 0x600 }, + { 0x54038, 0xe400 }, + { 0x54039, 0x3236 }, + { 0x5403a, 0x4600 }, + { 0x5403b, 0x811 }, + { 0x5403c, 0x11 }, + { 0x5403d, 0x600 }, + { 0xd0000, 0x1 }, +}; + +/* P0 2D message block paremeter for training firmware */ +static struct dram_cfg_param ddr_fsp0_2d_cfg[] = { + { 0xd0000, 0x0 }, + { 0x54003, 0xe94 }, + { 0x54004, 0x4 }, + { 0x54006, 0x15 }, + { 0x54008, 0x61 }, + { 0x54009, 0xff }, + { 0x5400b, 0x4 }, + { 0x5400c, 0x1 }, + { 0x5400d, 0x100 }, + { 0x5400f, 0x100 }, + { 0x54010, 0x2080 }, + { 0x54012, 0x110 }, + { 0x54019, 0x36e4 }, + { 0x5401a, 0x32 }, + { 0x5401b, 0x1146 }, + { 0x5401c, 0x1108 }, + { 0x5401e, 0x6 }, + { 0x5401f, 0x36e4 }, + { 0x54020, 0x32 }, + { 0x54021, 0x1146 }, + { 0x54022, 0x1108 }, + { 0x54024, 0x6 }, + { 0x54032, 0xe400 }, + { 0x54033, 0x3236 }, + { 0x54034, 0x4600 }, + { 0x54035, 0x811 }, + { 0x54036, 0x11 }, + { 0x54037, 0x600 }, + { 0x54038, 0xe400 }, + { 0x54039, 0x3236 }, + { 0x5403a, 0x4600 }, + { 0x5403b, 0x811 }, + { 0x5403c, 0x11 }, + { 0x5403d, 0x600 }, + { 0xd0000, 0x1 }, +}; + +/* DRAM PHY init engine image */ +static struct dram_cfg_param ddr_phy_pie[] = { + { 0xd0000, 0x0 }, + { 0x90000, 0x10 }, + { 0x90001, 0x400 }, + { 0x90002, 0x10e }, + { 0x90003, 0x0 }, + { 0x90004, 0x0 }, + { 0x90005, 0x8 }, + { 0x90029, 0xb }, + { 0x9002a, 0x480 }, + { 0x9002b, 0x109 }, + { 0x9002c, 0x8 }, + { 0x9002d, 0x448 }, + { 0x9002e, 0x139 }, + { 0x9002f, 0x8 }, + { 0x90030, 0x478 }, + { 0x90031, 0x109 }, + { 0x90032, 0x0 }, + { 0x90033, 0xe8 }, + { 0x90034, 0x109 }, + { 0x90035, 0x2 }, + { 0x90036, 0x10 }, + { 0x90037, 0x139 }, + { 0x90038, 0xb }, + { 0x90039, 0x7c0 }, + { 0x9003a, 0x139 }, + { 0x9003b, 0x44 }, + { 0x9003c, 0x633 }, + { 0x9003d, 0x159 }, + { 0x9003e, 0x14f }, + { 0x9003f, 0x630 }, + { 0x90040, 0x159 }, + { 0x90041, 0x47 }, + { 0x90042, 0x633 }, + { 0x90043, 0x149 }, + { 0x90044, 0x4f }, + { 0x90045, 0x633 }, + { 0x90046, 0x179 }, + { 0x90047, 0x8 }, + { 0x90048, 0xe0 }, + { 0x90049, 0x109 }, + { 0x9004a, 0x0 }, + { 0x9004b, 0x7c8 }, + { 0x9004c, 0x109 }, + { 0x9004d, 0x0 }, + { 0x9004e, 0x1 }, + { 0x9004f, 0x8 }, + { 0x90050, 0x30 }, + { 0x90051, 0x65a }, + { 0x90052, 0x9 }, + { 0x90053, 0x0 }, + { 0x90054, 0x45a }, + { 0x90055, 0x9 }, + { 0x90056, 0x0 }, + { 0x90057, 0x448 }, + { 0x90058, 0x109 }, + { 0x90059, 0x40 }, + { 0x9005a, 0x633 }, + { 0x9005b, 0x179 }, + { 0x9005c, 0x1 }, + { 0x9005d, 0x618 }, + { 0x9005e, 0x109 }, + { 0x9005f, 0x40c0 }, + { 0x90060, 0x633 }, + { 0x90061, 0x149 }, + { 0x90062, 0x8 }, + { 0x90063, 0x4 }, + { 0x90064, 0x48 }, + { 0x90065, 0x4040 }, + { 0x90066, 0x633 }, + { 0x90067, 0x149 }, + { 0x90068, 0x0 }, + { 0x90069, 0x4 }, + { 0x9006a, 0x48 }, + { 0x9006b, 0x40 }, + { 0x9006c, 0x633 }, + { 0x9006d, 0x149 }, + { 0x9006e, 0x0 }, + { 0x9006f, 0x658 }, + { 0x90070, 0x109 }, + { 0x90071, 0x10 }, + { 0x90072, 0x4 }, + { 0x90073, 0x18 }, + { 0x90074, 0x0 }, + { 0x90075, 0x4 }, + { 0x90076, 0x78 }, + { 0x90077, 0x549 }, + { 0x90078, 0x633 }, + { 0x90079, 0x159 }, + { 0x9007a, 0xd49 }, + { 0x9007b, 0x633 }, + { 0x9007c, 0x159 }, + { 0x9007d, 0x94a }, + { 0x9007e, 0x633 }, + { 0x9007f, 0x159 }, + { 0x90080, 0x441 }, + { 0x90081, 0x633 }, + { 0x90082, 0x149 }, + { 0x90083, 0x42 }, + { 0x90084, 0x633 }, + { 0x90085, 0x149 }, + { 0x90086, 0x1 }, + { 0x90087, 0x633 }, + { 0x90088, 0x149 }, + { 0x90089, 0x0 }, + { 0x9008a, 0xe0 }, + { 0x9008b, 0x109 }, + { 0x9008c, 0xa }, + { 0x9008d, 0x10 }, + { 0x9008e, 0x109 }, + { 0x9008f, 0x9 }, + { 0x90090, 0x3c0 }, + { 0x90091, 0x149 }, + { 0x90092, 0x9 }, + { 0x90093, 0x3c0 }, + { 0x90094, 0x159 }, + { 0x90095, 0x18 }, + { 0x90096, 0x10 }, + { 0x90097, 0x109 }, + { 0x90098, 0x0 }, + { 0x90099, 0x3c0 }, + { 0x9009a, 0x109 }, + { 0x9009b, 0x18 }, + { 0x9009c, 0x4 }, + { 0x9009d, 0x48 }, + { 0x9009e, 0x18 }, + { 0x9009f, 0x4 }, + { 0x900a0, 0x58 }, + { 0x900a1, 0xb }, + { 0x900a2, 0x10 }, + { 0x900a3, 0x109 }, + { 0x900a4, 0x1 }, + { 0x900a5, 0x10 }, + { 0x900a6, 0x109 }, + { 0x900a7, 0x5 }, + { 0x900a8, 0x7c0 }, + { 0x900a9, 0x109 }, + { 0x40000, 0x811 }, + { 0x40020, 0x880 }, + { 0x40040, 0x0 }, + { 0x40060, 0x0 }, + { 0x40001, 0x4008 }, + { 0x40021, 0x83 }, + { 0x40041, 0x4f }, + { 0x40061, 0x0 }, + { 0x40002, 0x4040 }, + { 0x40022, 0x83 }, + { 0x40042, 0x51 }, + { 0x40062, 0x0 }, + { 0x40003, 0x811 }, + { 0x40023, 0x880 }, + { 0x40043, 0x0 }, + { 0x40063, 0x0 }, + { 0x40004, 0x720 }, + { 0x40024, 0xf }, + { 0x40044, 0x1740 }, + { 0x40064, 0x0 }, + { 0x40005, 0x16 }, + { 0x40025, 0x83 }, + { 0x40045, 0x4b }, + { 0x40065, 0x0 }, + { 0x40006, 0x716 }, + { 0x40026, 0xf }, + { 0x40046, 0x2001 }, + { 0x40066, 0x0 }, + { 0x40007, 0x716 }, + { 0x40027, 0xf }, + { 0x40047, 0x2800 }, + { 0x40067, 0x0 }, + { 0x40008, 0x716 }, + { 0x40028, 0xf }, + { 0x40048, 0xf00 }, + { 0x40068, 0x0 }, + { 0x40009, 0x720 }, + { 0x40029, 0xf }, + { 0x40049, 0x1400 }, + { 0x40069, 0x0 }, + { 0x4000a, 0xe08 }, + { 0x4002a, 0xc15 }, + { 0x4004a, 0x0 }, + { 0x4006a, 0x0 }, + { 0x4000b, 0x625 }, + { 0x4002b, 0x15 }, + { 0x4004b, 0x0 }, + { 0x4006b, 0x0 }, + { 0x4000c, 0x4028 }, + { 0x4002c, 0x80 }, + { 0x4004c, 0x0 }, + { 0x4006c, 0x0 }, + { 0x4000d, 0xe08 }, + { 0x4002d, 0xc1a }, + { 0x4004d, 0x0 }, + { 0x4006d, 0x0 }, + { 0x4000e, 0x625 }, + { 0x4002e, 0x1a }, + { 0x4004e, 0x0 }, + { 0x4006e, 0x0 }, + { 0x4000f, 0x4040 }, + { 0x4002f, 0x80 }, + { 0x4004f, 0x0 }, + { 0x4006f, 0x0 }, + { 0x40010, 0x2604 }, + { 0x40030, 0x15 }, + { 0x40050, 0x0 }, + { 0x40070, 0x0 }, + { 0x40011, 0x708 }, + { 0x40031, 0x5 }, + { 0x40051, 0x0 }, + { 0x40071, 0x2002 }, + { 0x40012, 0x8 }, + { 0x40032, 0x80 }, + { 0x40052, 0x0 }, + { 0x40072, 0x0 }, + { 0x40013, 0x2604 }, + { 0x40033, 0x1a }, + { 0x40053, 0x0 }, + { 0x40073, 0x0 }, + { 0x40014, 0x708 }, + { 0x40034, 0xa }, + { 0x40054, 0x0 }, + { 0x40074, 0x2002 }, + { 0x40015, 0x4040 }, + { 0x40035, 0x80 }, + { 0x40055, 0x0 }, + { 0x40075, 0x0 }, + { 0x40016, 0x60a }, + { 0x40036, 0x15 }, + { 0x40056, 0x1200 }, + { 0x40076, 0x0 }, + { 0x40017, 0x61a }, + { 0x40037, 0x15 }, + { 0x40057, 0x1300 }, + { 0x40077, 0x0 }, + { 0x40018, 0x60a }, + { 0x40038, 0x1a }, + { 0x40058, 0x1200 }, + { 0x40078, 0x0 }, + { 0x40019, 0x642 }, + { 0x40039, 0x1a }, + { 0x40059, 0x1300 }, + { 0x40079, 0x0 }, + { 0x4001a, 0x4808 }, + { 0x4003a, 0x880 }, + { 0x4005a, 0x0 }, + { 0x4007a, 0x0 }, + { 0x900aa, 0x0 }, + { 0x900ab, 0x790 }, + { 0x900ac, 0x11a }, + { 0x900ad, 0x8 }, + { 0x900ae, 0x7aa }, + { 0x900af, 0x2a }, + { 0x900b0, 0x10 }, + { 0x900b1, 0x7b2 }, + { 0x900b2, 0x2a }, + { 0x900b3, 0x0 }, + { 0x900b4, 0x7c8 }, + { 0x900b5, 0x109 }, + { 0x900b6, 0x10 }, + { 0x900b7, 0x10 }, + { 0x900b8, 0x109 }, + { 0x900b9, 0x10 }, + { 0x900ba, 0x2a8 }, + { 0x900bb, 0x129 }, + { 0x900bc, 0x8 }, + { 0x900bd, 0x370 }, + { 0x900be, 0x129 }, + { 0x900bf, 0xa }, + { 0x900c0, 0x3c8 }, + { 0x900c1, 0x1a9 }, + { 0x900c2, 0xc }, + { 0x900c3, 0x408 }, + { 0x900c4, 0x199 }, + { 0x900c5, 0x14 }, + { 0x900c6, 0x790 }, + { 0x900c7, 0x11a }, + { 0x900c8, 0x8 }, + { 0x900c9, 0x4 }, + { 0x900ca, 0x18 }, + { 0x900cb, 0xe }, + { 0x900cc, 0x408 }, + { 0x900cd, 0x199 }, + { 0x900ce, 0x8 }, + { 0x900cf, 0x8568 }, + { 0x900d0, 0x108 }, + { 0x900d1, 0x18 }, + { 0x900d2, 0x790 }, + { 0x900d3, 0x16a }, + { 0x900d4, 0x8 }, + { 0x900d5, 0x1d8 }, + { 0x900d6, 0x169 }, + { 0x900d7, 0x10 }, + { 0x900d8, 0x8558 }, + { 0x900d9, 0x168 }, + { 0x900da, 0x1ff8 }, + { 0x900db, 0x85a8 }, + { 0x900dc, 0x1e8 }, + { 0x900dd, 0x50 }, + { 0x900de, 0x798 }, + { 0x900df, 0x16a }, + { 0x900e0, 0x60 }, + { 0x900e1, 0x7a0 }, + { 0x900e2, 0x16a }, + { 0x900e3, 0x8 }, + { 0x900e4, 0x8310 }, + { 0x900e5, 0x168 }, + { 0x900e6, 0x8 }, + { 0x900e7, 0xa310 }, + { 0x900e8, 0x168 }, + { 0x900e9, 0xa }, + { 0x900ea, 0x408 }, + { 0x900eb, 0x169 }, + { 0x900ec, 0x6e }, + { 0x900ed, 0x0 }, + { 0x900ee, 0x68 }, + { 0x900ef, 0x0 }, + { 0x900f0, 0x408 }, + { 0x900f1, 0x169 }, + { 0x900f2, 0x0 }, + { 0x900f3, 0x8310 }, + { 0x900f4, 0x168 }, + { 0x900f5, 0x0 }, + { 0x900f6, 0xa310 }, + { 0x900f7, 0x168 }, + { 0x900f8, 0x1ff8 }, + { 0x900f9, 0x85a8 }, + { 0x900fa, 0x1e8 }, + { 0x900fb, 0x68 }, + { 0x900fc, 0x798 }, + { 0x900fd, 0x16a }, + { 0x900fe, 0x78 }, + { 0x900ff, 0x7a0 }, + { 0x90100, 0x16a }, + { 0x90101, 0x68 }, + { 0x90102, 0x790 }, + { 0x90103, 0x16a }, + { 0x90104, 0x8 }, + { 0x90105, 0x8b10 }, + { 0x90106, 0x168 }, + { 0x90107, 0x8 }, + { 0x90108, 0xab10 }, + { 0x90109, 0x168 }, + { 0x9010a, 0xa }, + { 0x9010b, 0x408 }, + { 0x9010c, 0x169 }, + { 0x9010d, 0x58 }, + { 0x9010e, 0x0 }, + { 0x9010f, 0x68 }, + { 0x90110, 0x0 }, + { 0x90111, 0x408 }, + { 0x90112, 0x169 }, + { 0x90113, 0x0 }, + { 0x90114, 0x8b10 }, + { 0x90115, 0x168 }, + { 0x90116, 0x1 }, + { 0x90117, 0xab10 }, + { 0x90118, 0x168 }, + { 0x90119, 0x0 }, + { 0x9011a, 0x1d8 }, + { 0x9011b, 0x169 }, + { 0x9011c, 0x80 }, + { 0x9011d, 0x790 }, + { 0x9011e, 0x16a }, + { 0x9011f, 0x18 }, + { 0x90120, 0x7aa }, + { 0x90121, 0x6a }, + { 0x90122, 0xa }, + { 0x90123, 0x0 }, + { 0x90124, 0x1e9 }, + { 0x90125, 0x8 }, + { 0x90126, 0x8080 }, + { 0x90127, 0x108 }, + { 0x90128, 0xf }, + { 0x90129, 0x408 }, + { 0x9012a, 0x169 }, + { 0x9012b, 0xc }, + { 0x9012c, 0x0 }, + { 0x9012d, 0x68 }, + { 0x9012e, 0x9 }, + { 0x9012f, 0x0 }, + { 0x90130, 0x1a9 }, + { 0x90131, 0x0 }, + { 0x90132, 0x408 }, + { 0x90133, 0x169 }, + { 0x90134, 0x0 }, + { 0x90135, 0x8080 }, + { 0x90136, 0x108 }, + { 0x90137, 0x8 }, + { 0x90138, 0x7aa }, + { 0x90139, 0x6a }, + { 0x9013a, 0x0 }, + { 0x9013b, 0x8568 }, + { 0x9013c, 0x108 }, + { 0x9013d, 0xb7 }, + { 0x9013e, 0x790 }, + { 0x9013f, 0x16a }, + { 0x90140, 0x1f }, + { 0x90141, 0x0 }, + { 0x90142, 0x68 }, + { 0x90143, 0x8 }, + { 0x90144, 0x8558 }, + { 0x90145, 0x168 }, + { 0x90146, 0xf }, + { 0x90147, 0x408 }, + { 0x90148, 0x169 }, + { 0x90149, 0xd }, + { 0x9014a, 0x0 }, + { 0x9014b, 0x68 }, + { 0x9014c, 0x0 }, + { 0x9014d, 0x408 }, + { 0x9014e, 0x169 }, + { 0x9014f, 0x0 }, + { 0x90150, 0x8558 }, + { 0x90151, 0x168 }, + { 0x90152, 0x8 }, + { 0x90153, 0x3c8 }, + { 0x90154, 0x1a9 }, + { 0x90155, 0x3 }, + { 0x90156, 0x370 }, + { 0x90157, 0x129 }, + { 0x90158, 0x20 }, + { 0x90159, 0x2aa }, + { 0x9015a, 0x9 }, + { 0x9015b, 0x8 }, + { 0x9015c, 0xe8 }, + { 0x9015d, 0x109 }, + { 0x9015e, 0x0 }, + { 0x9015f, 0x8140 }, + { 0x90160, 0x10c }, + { 0x90161, 0x10 }, + { 0x90162, 0x8138 }, + { 0x90163, 0x104 }, + { 0x90164, 0x8 }, + { 0x90165, 0x448 }, + { 0x90166, 0x109 }, + { 0x90167, 0xf }, + { 0x90168, 0x7c0 }, + { 0x90169, 0x109 }, + { 0x9016a, 0x0 }, + { 0x9016b, 0xe8 }, + { 0x9016c, 0x109 }, + { 0x9016d, 0x47 }, + { 0x9016e, 0x630 }, + { 0x9016f, 0x109 }, + { 0x90170, 0x8 }, + { 0x90171, 0x618 }, + { 0x90172, 0x109 }, + { 0x90173, 0x8 }, + { 0x90174, 0xe0 }, + { 0x90175, 0x109 }, + { 0x90176, 0x0 }, + { 0x90177, 0x7c8 }, + { 0x90178, 0x109 }, + { 0x90179, 0x8 }, + { 0x9017a, 0x8140 }, + { 0x9017b, 0x10c }, + { 0x9017c, 0x0 }, + { 0x9017d, 0x478 }, + { 0x9017e, 0x109 }, + { 0x9017f, 0x0 }, + { 0x90180, 0x1 }, + { 0x90181, 0x8 }, + { 0x90182, 0x8 }, + { 0x90183, 0x4 }, + { 0x90184, 0x0 }, + { 0x90006, 0x8 }, + { 0x90007, 0x7c8 }, + { 0x90008, 0x109 }, + { 0x90009, 0x0 }, + { 0x9000a, 0x400 }, + { 0x9000b, 0x106 }, + { 0xd00e7, 0x400 }, + { 0x90017, 0x0 }, + { 0x9001f, 0x2b }, + { 0x90026, 0x69 }, + { 0x400d0, 0x0 }, + { 0x400d1, 0x101 }, + { 0x400d2, 0x105 }, + { 0x400d3, 0x107 }, + { 0x400d4, 0x10f }, + { 0x400d5, 0x202 }, + { 0x400d6, 0x20a }, + { 0x400d7, 0x20b }, + { 0x2003a, 0x2 }, + { 0x200be, 0x3 }, + { 0x2000b, 0x75 }, + { 0x2000c, 0xe9 }, + { 0x2000d, 0x91c }, + { 0x2000e, 0x2c }, + { 0x9000c, 0x0 }, + { 0x9000d, 0x173 }, + { 0x9000e, 0x60 }, + { 0x9000f, 0x6110 }, + { 0x90010, 0x2152 }, + { 0x90011, 0xdfbd }, + { 0x90012, 0x2060 }, + { 0x90013, 0x6152 }, + { 0x20010, 0x5a }, + { 0x20011, 0x3 }, + { 0x40080, 0xe0 }, + { 0x40081, 0x12 }, + { 0x40082, 0xe0 }, + { 0x40083, 0x12 }, + { 0x40084, 0xe0 }, + { 0x40085, 0x12 }, + { 0x400fd, 0xf }, + { 0x400f1, 0xe }, + { 0x10011, 0x1 }, + { 0x10012, 0x1 }, + { 0x10013, 0x180 }, + { 0x10018, 0x1 }, + { 0x10002, 0x6209 }, + { 0x100b2, 0x1 }, + { 0x101b4, 0x1 }, + { 0x102b4, 0x1 }, + { 0x103b4, 0x1 }, + { 0x104b4, 0x1 }, + { 0x105b4, 0x1 }, + { 0x106b4, 0x1 }, + { 0x107b4, 0x1 }, + { 0x108b4, 0x1 }, + { 0x11011, 0x1 }, + { 0x11012, 0x1 }, + { 0x11013, 0x180 }, + { 0x11018, 0x1 }, + { 0x11002, 0x6209 }, + { 0x110b2, 0x1 }, + { 0x111b4, 0x1 }, + { 0x112b4, 0x1 }, + { 0x113b4, 0x1 }, + { 0x114b4, 0x1 }, + { 0x115b4, 0x1 }, + { 0x116b4, 0x1 }, + { 0x117b4, 0x1 }, + { 0x118b4, 0x1 }, + { 0x20089, 0x1 }, + { 0x20088, 0x19 }, + { 0xc0080, 0x0 }, + { 0xd0000, 0x1 }, +}; + +static struct dram_fsp_msg ddr_dram_fsp_msg[] = { + { + /* P0 3732mts 1D */ + .drate = 3732, + .fw_type = FW_1D_IMAGE, + .fsp_cfg = ddr_fsp0_cfg, + .fsp_cfg_num = ARRAY_SIZE(ddr_fsp0_cfg), + }, + { + /* P0 3732mts 2D */ + .drate = 3732, + .fw_type = FW_2D_IMAGE, + .fsp_cfg = ddr_fsp0_2d_cfg, + .fsp_cfg_num = ARRAY_SIZE(ddr_fsp0_2d_cfg), + }, +}; + +/* ddr timing config params */ +struct dram_timing_info tqma93xxla_dram_timing = { + .ddrc_cfg = ddr_ddrc_cfg, + .ddrc_cfg_num = ARRAY_SIZE(ddr_ddrc_cfg), + .ddrphy_cfg = ddr_ddrphy_cfg, + .ddrphy_cfg_num = ARRAY_SIZE(ddr_ddrphy_cfg), + .fsp_msg = ddr_dram_fsp_msg, + .fsp_msg_num = ARRAY_SIZE(ddr_dram_fsp_msg), + .ddrphy_trained_csr = ddr_ddrphy_trained_csr, + .ddrphy_trained_csr_num = ARRAY_SIZE(ddr_ddrphy_trained_csr), + .ddrphy_pie = ddr_phy_pie, + .ddrphy_pie_num = ARRAY_SIZE(ddr_phy_pie), + .fsp_table = { 3732, }, +}; diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 9b08fe5643..79f096d850 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -221,6 +221,7 @@ lwl-$(CONFIG_MACH_LS1021AIOT) += fsl-ls1021a-iot.dtb.o lwl-$(CONFIG_MACH_ZEDBOARD) += zynq-zed.dtb.o lwl-$(CONFIG_MACH_MNT_REFORM) += imx8mq-mnt-reform2.dtb.o lwl-$(CONFIG_MACH_VARISCITE_DT8MCUSTOMBOARD_IMX8MP) += imx8mp-var-dart-dt8mcustomboard.dtb.o -lwl-$(CONFIG_MACH_TQMA93XX) += imx93-tqma9352-mba93xxca.dtb.o +lwl-$(CONFIG_MACH_TQMA93XX) += imx93-tqma9352-mba93xxca.dtb.o \ + imx93-tqma9352-mba93xxla.dtb.o clean-files := *.dtb *.dtb.S .*.dtc .*.pre .*.dts *.dtb.z diff --git a/arch/arm/dts/imx93-tqma9352-mba93xxca.dts b/arch/arm/dts/imx93-tqma9352-mba93xxca.dts index ef56b15c75..b77f8b9f9a 100644 --- a/arch/arm/dts/imx93-tqma9352-mba93xxca.dts +++ b/arch/arm/dts/imx93-tqma9352-mba93xxca.dts @@ -1,41 +1,5 @@ // SPDX-License-Identifier: (GPL-2.0-or-later OR MIT) -// SPDX-License-Identifier: (GPL-2.0-or-later OR MIT) #include <arm64/freescale/imx93-tqma9352-mba93xxca.dts> #include "imx93.dtsi" - -/{ - chosen { - environment-spi-nor { - compatible = "barebox,environment"; - device-path = &environment_spi_nor; - }; - }; -}; - -&usbotg1 { - status = "okay"; -}; - -&usbotg2 { - status = "okay"; - dr_mode = "host"; -}; - -&{flexspi1/flash@0} { - partitions { - compatible = "fixed-partitions"; - #address-cells = <1>; - #size-cells = <1>; - - partition@0 { - label = "barebox"; - reg = <0x0 0x400000>; - }; - - environment_spi_nor: partition@400000 { - label = "barebox-environment"; - reg = <0x400000 0x100000>; - }; - }; -}; +#include "imx93-tqma93xx.dtsi" diff --git a/arch/arm/dts/imx93-tqma9352-mba93xxla.dts b/arch/arm/dts/imx93-tqma9352-mba93xxla.dts new file mode 100644 index 0000000000..d1d68a55e1 --- /dev/null +++ b/arch/arm/dts/imx93-tqma9352-mba93xxla.dts @@ -0,0 +1,5 @@ +// SPDX-License-Identifier: (GPL-2.0-or-later OR MIT) + +#include <arm64/freescale/imx93-tqma9352-mba93xxla.dts> +#include "imx93.dtsi" +#include "imx93-tqma93xx.dtsi" diff --git a/arch/arm/dts/imx93-tqma93xx.dtsi b/arch/arm/dts/imx93-tqma93xx.dtsi new file mode 100644 index 0000000000..5877290640 --- /dev/null +++ b/arch/arm/dts/imx93-tqma93xx.dtsi @@ -0,0 +1,37 @@ +// SPDX-License-Identifier: (GPL-2.0-or-later OR MIT) + +/{ + chosen { + environment-spi-nor { + compatible = "barebox,environment"; + device-path = &environment_spi_nor; + }; + }; +}; + +&usbotg1 { + status = "okay"; +}; + +&usbotg2 { + status = "okay"; + dr_mode = "host"; +}; + +&{flexspi1/flash@0} { + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "barebox"; + reg = <0x0 0x400000>; + }; + + environment_spi_nor: partition@400000 { + label = "barebox-environment"; + reg = <0x400000 0x100000>; + }; + }; +}; diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig index f52b7a4dd8..aa0603a8bd 100644 --- a/arch/arm/mach-imx/Kconfig +++ b/arch/arm/mach-imx/Kconfig @@ -736,6 +736,9 @@ config MACH_TQMA93XX bool "TQ i.MX93 on TQMA93XX Board" select ARCH_IMX93 select IMX9_DRAM + select BOARD_TQ + select I2C + select I2C_IMX_LPI2C select FIRMWARE_IMX93_ATF select FIRMWARE_IMX_LPDDR4_PMU_TRAIN -- 2.39.2 ^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH v2 0/8] ARM: i.MX93: TQMA93xx: Add LGA variant 2024-02-05 7:45 [PATCH v2 0/8] ARM: i.MX93: TQMA93xx: Add LGA variant Sascha Hauer ` (7 preceding siblings ...) 2024-02-05 7:45 ` [PATCH v2 8/8] ARM: i.MX: tqma93xx: Add LGA board variant Sascha Hauer @ 2024-02-08 7:19 ` Sascha Hauer 8 siblings, 0 replies; 12+ messages in thread From: Sascha Hauer @ 2024-02-08 7:19 UTC (permalink / raw) To: Barebox List, Sascha Hauer On Mon, 05 Feb 2024 08:45:45 +0100, Sascha Hauer wrote: > The TQ i.MX93 boards come in different variants. This series adds > support for the LGA variant. Fortunately the TQ boards all have a > EEPROM equipped from which the variant can be read, so this series > adds the necessary pieces to to I2C in PBL on i.MX93 and also the > common EEPROM parsing code. > The EEPROM parsing code could be reused on other TQ boards barebox > has support for, like the tqmls1046a, tqma6ul and tqma8mp. Doing so > is left for the future, for now the code is only used to detect the > i.MX93 board variant. > > [...] Applied, thanks! [1/8] i2c: lpi2c: determine clk rate during probe https://git.pengutronix.de/cgit/barebox/commit/?id=b28091f154ea (link may not be stable) [2/8] i2c: lpi2c: use udelay for timeout loops https://git.pengutronix.de/cgit/barebox/commit/?id=8dae33d9a5c0 (link may not be stable) [3/8] i2c: lpi2c: add PBL support https://git.pengutronix.de/cgit/barebox/commit/?id=8f05c6dbc287 (link may not be stable) [4/8] pbl: eeprom: return error from eeprom_read() https://git.pengutronix.de/cgit/barebox/commit/?id=2b273ff6e36d (link may not be stable) [5/8] common: add TQ EEPROM support https://git.pengutronix.de/cgit/barebox/commit/?id=225a2af33cd2 (link may not be stable) [6/8] ARM: i.MX9: add i2c base address defines https://git.pengutronix.de/cgit/barebox/commit/?id=1d3a4574f64b (link may not be stable) [7/8] ARM: i.MX9: rename TQ i.MX93 board to TQMA93XX https://git.pengutronix.de/cgit/barebox/commit/?id=f2c0715a47d1 (link may not be stable) [8/8] ARM: i.MX: tqma93xx: Add LGA board variant https://git.pengutronix.de/cgit/barebox/commit/?id=e5471b2b72fa (link may not be stable) Best regards, -- Sascha Hauer <s.hauer@pengutronix.de> ^ permalink raw reply [flat|nested] 12+ messages in thread
end of thread, other threads:[~2024-02-08 7:20 UTC | newest] Thread overview: 12+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2024-02-05 7:45 [PATCH v2 0/8] ARM: i.MX93: TQMA93xx: Add LGA variant Sascha Hauer 2024-02-05 7:45 ` [PATCH v2 1/8] i2c: lpi2c: determine clk rate during probe Sascha Hauer 2024-02-05 7:45 ` [PATCH v2 2/8] i2c: lpi2c: use udelay for timeout loops Sascha Hauer 2024-02-05 7:45 ` [PATCH v2 3/8] i2c: lpi2c: add PBL support Sascha Hauer 2024-02-05 7:45 ` [PATCH v2 4/8] pbl: eeprom: return error from eeprom_read() Sascha Hauer 2024-02-05 7:45 ` [PATCH v2 5/8] common: add TQ EEPROM support Sascha Hauer 2024-02-05 8:11 ` Marco Felsch 2024-02-05 8:18 ` Sascha Hauer 2024-02-05 7:45 ` [PATCH v2 6/8] ARM: i.MX9: add i2c base address defines Sascha Hauer 2024-02-05 7:45 ` [PATCH v2 7/8] ARM: i.MX9: rename TQ i.MX93 board to TQMA93XX Sascha Hauer 2024-02-05 7:45 ` [PATCH v2 8/8] ARM: i.MX: tqma93xx: Add LGA board variant Sascha Hauer 2024-02-08 7:19 ` [PATCH v2 0/8] ARM: i.MX93: TQMA93xx: Add LGA variant Sascha Hauer
This is a public inbox, see mirroring instructions for how to clone and mirror all data and code used for this inbox