* [PATCH v4 01/14] mci: atmel_mci: disable power save mode
2024-02-20 9:30 [PATCH v4 00/14] ARM: at91: skov-arm9cpu (SAM9263) first stage support Ahmad Fatoum
@ 2024-02-20 9:30 ` Ahmad Fatoum
2024-02-20 9:30 ` [PATCH v4 02/14] mci: atmel_mci: fix zeroing of block length on AT91SAM9263 Ahmad Fatoum
` (13 subsequent siblings)
14 siblings, 0 replies; 16+ messages in thread
From: Ahmad Fatoum @ 2024-02-20 9:30 UTC (permalink / raw)
To: barebox; +Cc: Sam Ravnborg, Ahmad Fatoum
Power saving mode will clock down the MCI clock according to the value
of the PWSDIV (Power Saving Divider) field of the mode register.
No where in Linux or barebox do we set a value for PWSDIV however, so
the safe thing to do is disabling power saving mode.
This aligns barebox with what AT91Bootstrap and the U-Boot driver are
doing and fixes SD-Card block write failures when using barebox as first
stage bootloader on the AT91SAM9263.
Without this change, writing the environment would fail in barebox,
an ext4 fsck in Linux would hang and barebox PBL chainloading of barebox
proper would hang when CONFIG_DEBUG_PBL is disabled.
Fixes: 6cf02124b10d ("mci: add Atmel AT91 MCI driver")
Reviewed-by: Sam Ravnborg <sam@ravnborg.org>
Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
---
drivers/mci/atmel_mci.c | 1 +
drivers/mci/atmel_mci_pbl.c | 1 +
2 files changed, 2 insertions(+)
diff --git a/drivers/mci/atmel_mci.c b/drivers/mci/atmel_mci.c
index 431331ddc310..9021dba0f89b 100644
--- a/drivers/mci/atmel_mci.c
+++ b/drivers/mci/atmel_mci.c
@@ -151,6 +151,7 @@ static int atmci_probe(struct device *hw_dev)
clk_enable(host->clk);
atmci_writel(host, ATMCI_CR, ATMCI_CR_SWRST);
+ atmci_writel(host, ATMCI_CR, ATMCI_CR_PWSDIS);
atmci_writel(host, ATMCI_IDR, ~0UL);
host->bus_hz = clk_get_rate(host->clk);
clk_disable(host->clk);
diff --git a/drivers/mci/atmel_mci_pbl.c b/drivers/mci/atmel_mci_pbl.c
index 7483e9375f1d..bd4faa4de5f0 100644
--- a/drivers/mci/atmel_mci_pbl.c
+++ b/drivers/mci/atmel_mci_pbl.c
@@ -106,6 +106,7 @@ int at91_mci_bio_init(struct pbl_bio *bio, void __iomem *base,
else
host->sdc_reg = ATMCI_SDCSEL_SLOT_A;
+ atmci_writel(host, ATMCI_CR, ATMCI_CR_PWSDIS);
atmci_writel(host, ATMCI_DTOR, 0x7f);
atmci_common_set_ios(host, &ios);
--
2.39.2
^ permalink raw reply [flat|nested] 16+ messages in thread* [PATCH v4 02/14] mci: atmel_mci: fix zeroing of block length on AT91SAM9263
2024-02-20 9:30 [PATCH v4 00/14] ARM: at91: skov-arm9cpu (SAM9263) first stage support Ahmad Fatoum
2024-02-20 9:30 ` [PATCH v4 01/14] mci: atmel_mci: disable power save mode Ahmad Fatoum
@ 2024-02-20 9:30 ` Ahmad Fatoum
2024-02-20 9:30 ` [PATCH v4 03/14] ARM: replace ENTRY_FUNCTION_HEAD with ENTRY_FUNCTION_WITHSTACK_HEAD Ahmad Fatoum
` (12 subsequent siblings)
14 siblings, 0 replies; 16+ messages in thread
From: Ahmad Fatoum @ 2024-02-20 9:30 UTC (permalink / raw)
To: barebox; +Cc: Sam Ravnborg, Ahmad Fatoum
We don't read back ATMCI_MR, but instead set up the value once and keep
writing it on every reset. On the SAM9263, but not on the later SAM9x5,
the ATMCI_MR register also includes a field for the block length. Not
taking that into account means that we zero the block length on every
reset.
While the effect of this zeroing is likely limited, because we set the
block length on every transfer via ATMCI_BLKR, it would be less surprising
and more robust against future change to not intermittently zero the block
length via the MR register.
Reviewed-by: Sam Ravnborg <sam@ravnborg.org>
Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
---
drivers/mci/atmel_mci_common.c | 12 +++++++++++-
1 file changed, 11 insertions(+), 1 deletion(-)
diff --git a/drivers/mci/atmel_mci_common.c b/drivers/mci/atmel_mci_common.c
index 098e90503a3a..7b11e9134e65 100644
--- a/drivers/mci/atmel_mci_common.c
+++ b/drivers/mci/atmel_mci_common.c
@@ -68,7 +68,17 @@ static void atmci_set_clk_rate(struct atmel_mci *host,
clock_min, host->bus_hz / (2 * 256));
clkdiv = 255;
}
- host->mode_reg = ATMCI_MR_CLKDIV(clkdiv);
+
+ /*
+ * Older Atmels without CLKODD have the block length
+ * in the upper 16 bits of both MCI_MR and MCI_BLKR
+ *
+ * To avoid intermittent zeroing of the block length,
+ * just hardcode 512 here and have atmci_setup_data()
+ * change it as necessary.
+ */
+
+ host->mode_reg = ATMCI_MR_CLKDIV(clkdiv) | ATMCI_BLKLEN(512);
}
dev_dbg(host->hw_dev, "atmel_set_clk_rate: clkIn=%ld clkIos=%d divider=%d\n",
--
2.39.2
^ permalink raw reply [flat|nested] 16+ messages in thread* [PATCH v4 03/14] ARM: replace ENTRY_FUNCTION_HEAD with ENTRY_FUNCTION_WITHSTACK_HEAD
2024-02-20 9:30 [PATCH v4 00/14] ARM: at91: skov-arm9cpu (SAM9263) first stage support Ahmad Fatoum
2024-02-20 9:30 ` [PATCH v4 01/14] mci: atmel_mci: disable power save mode Ahmad Fatoum
2024-02-20 9:30 ` [PATCH v4 02/14] mci: atmel_mci: fix zeroing of block length on AT91SAM9263 Ahmad Fatoum
@ 2024-02-20 9:30 ` Ahmad Fatoum
2024-02-20 9:30 ` [PATCH v4 04/14] ARM: at91: use AT91 header instead of generic barebox ARM's Ahmad Fatoum
` (11 subsequent siblings)
14 siblings, 0 replies; 16+ messages in thread
From: Ahmad Fatoum @ 2024-02-20 9:30 UTC (permalink / raw)
To: barebox; +Cc: Sam Ravnborg, Ahmad Fatoum
To allow SoC-specific entry functions that don't replicate the code in
ENTRY_FUNCTION, we provide a helper macro that support specifying
a custom HEAD, but only on arm32. Make this macro private by prefixing
with __ and implement the superset ENTRY_FUNCTION_WITHSTACK_HEAD for
both arm32 and arm64 that should be used instead.
Eventually, we will want to switch away from naked functions on arm32,
like we did on arm64 and then we could use the same implementation for
both platforms (and support clang on arm32!), but till then, this seems
the least ugly way to go about it.
Reviewed-by: Sam Ravnborg <sam@ravnborg.org>
Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
---
arch/arm/include/asm/barebox-arm.h | 20 ++++++++++++++------
include/mach/at91/barebox-arm.h | 2 +-
include/mach/mvebu/barebox-arm-head.h | 2 +-
3 files changed, 16 insertions(+), 8 deletions(-)
diff --git a/arch/arm/include/asm/barebox-arm.h b/arch/arm/include/asm/barebox-arm.h
index 382fa8505a66..361edcf37eef 100644
--- a/arch/arm/include/asm/barebox-arm.h
+++ b/arch/arm/include/asm/barebox-arm.h
@@ -165,7 +165,7 @@ static inline unsigned long arm_mem_barebox_image(unsigned long membase,
void __barebox_arm64_head(ulong x0, ulong x1, ulong x2);
-#define ENTRY_FUNCTION_WITHSTACK(name, stack_top, arg0, arg1, arg2) \
+#define ENTRY_FUNCTION_WITHSTACK_HEAD(name, stack_top, head, arg0, arg1, arg2) \
void name(ulong r0, ulong r1, ulong r2); \
\
static void __##name(ulong, ulong, ulong); \
@@ -175,20 +175,24 @@ void __barebox_arm64_head(ulong x0, ulong x1, ulong x2);
{ \
static __section(.pbl_board_stack_top_##name) \
const ulong __stack_top = (stack_top); \
- __keep_symbolref(__barebox_arm64_head); \
+ __keep_symbolref(head); \
__keep_symbolref(__stack_top); \
__##name(r0, r1, r2); \
} \
static void noinline __##name \
(ulong arg0, ulong arg1, ulong arg2)
+#define ENTRY_FUNCTION_WITHSTACK(name, stack_top, arg0, arg1, arg2) \
+ ENTRY_FUNCTION_WITHSTACK_HEAD(name, stack_top, \
+ __barebox_arm64_head, arg0, arg1, arg2)
+
#define ENTRY_FUNCTION(name, arg0, arg1, arg2) \
ENTRY_FUNCTION_WITHSTACK(name, 0, arg0, arg1, arg2)
#else
-#define ENTRY_FUNCTION_WITHSTACK(name, stack_top, arg0, arg1, arg2) \
+#define ENTRY_FUNCTION_WITHSTACK_HEAD(name, stack_top, head, arg0, arg1, arg2) \
static void ____##name(ulong, ulong, ulong); \
- ENTRY_FUNCTION(name, arg0, arg1, arg2) \
+ __ENTRY_FUNCTION_HEAD(name, head, arg0, arg1, arg2) \
{ \
if (stack_top) \
arm_setup_stack(stack_top); \
@@ -197,7 +201,7 @@ void __barebox_arm64_head(ulong x0, ulong x1, ulong x2);
static void noinline ____##name \
(ulong arg0, ulong arg1, ulong arg2)
-#define ENTRY_FUNCTION_HEAD(name, head, arg0, arg1, arg2) \
+#define __ENTRY_FUNCTION_HEAD(name, head, arg0, arg1, arg2) \
void name(ulong r0, ulong r1, ulong r2); \
\
static void __##name(ulong, ulong, ulong); \
@@ -212,7 +216,11 @@ void __barebox_arm64_head(ulong x0, ulong x1, ulong x2);
(ulong arg0, ulong arg1, ulong arg2)
#define ENTRY_FUNCTION(name, arg0, arg1, arg2) \
- ENTRY_FUNCTION_HEAD(name, __barebox_arm_head, arg0, arg1, arg2)
+ __ENTRY_FUNCTION_HEAD(name, __barebox_arm_head, arg0, arg1, arg2)
+
+#define ENTRY_FUNCTION_WITHSTACK(name, stack_top, arg0, arg1, arg2) \
+ ENTRY_FUNCTION_WITHSTACK_HEAD(name, stack_top, \
+ __barebox_arm_head, arg0, arg1, arg2)
#endif
/*
diff --git a/include/mach/at91/barebox-arm.h b/include/mach/at91/barebox-arm.h
index f1014542bee2..f82b82ebed8b 100644
--- a/include/mach/at91/barebox-arm.h
+++ b/include/mach/at91/barebox-arm.h
@@ -69,6 +69,6 @@ static __always_inline void __barebox_at91_head(void)
SAMA5_ENTRY_FUNCTION(name, SAMA5D4_SRAM_BASE + SAMA5D4_SRAM_SIZE, r4)
#define AT91_ENTRY_FUNCTION(fn, r0, r1, r2) \
- ENTRY_FUNCTION_HEAD(fn, __barebox_at91_head, r0, r1, r2)
+ ENTRY_FUNCTION_WITHSTACK_HEAD(fn, 0, __barebox_at91_head, r0, r1, r2)
#endif
diff --git a/include/mach/mvebu/barebox-arm-head.h b/include/mach/mvebu/barebox-arm-head.h
index 76e426e3b867..5afd900201c6 100644
--- a/include/mach/mvebu/barebox-arm-head.h
+++ b/include/mach/mvebu/barebox-arm-head.h
@@ -55,4 +55,4 @@ static inline void __barebox_mvebu_head(void)
}
#define ENTRY_FUNCTION_MVEBU(name, arg0, arg1, arg2) \
- ENTRY_FUNCTION_HEAD(name, __barebox_mvebu_head, arg0, arg1, arg2)
+ ENTRY_FUNCTION_WITHSTACK_HEAD(name, 0, __barebox_mvebu_head, arg0, arg1, arg2)
--
2.39.2
^ permalink raw reply [flat|nested] 16+ messages in thread* [PATCH v4 04/14] ARM: at91: use AT91 header instead of generic barebox ARM's
2024-02-20 9:30 [PATCH v4 00/14] ARM: at91: skov-arm9cpu (SAM9263) first stage support Ahmad Fatoum
` (2 preceding siblings ...)
2024-02-20 9:30 ` [PATCH v4 03/14] ARM: replace ENTRY_FUNCTION_HEAD with ENTRY_FUNCTION_WITHSTACK_HEAD Ahmad Fatoum
@ 2024-02-20 9:30 ` Ahmad Fatoum
2024-02-20 9:30 ` [PATCH v4 05/14] ARM: at91: implement SAM9_ENTRY_FUNCTION Ahmad Fatoum
` (10 subsequent siblings)
14 siblings, 0 replies; 16+ messages in thread
From: Ahmad Fatoum @ 2024-02-20 9:30 UTC (permalink / raw)
To: barebox; +Cc: Sam Ravnborg, Ahmad Fatoum
Prior to the multi-arch (really multi-platform) rework, ENTRY_FUNCTION
used to be overrideable according to selected machine/SoC family. Now
that there is no single selected family, board code needs to be explicit
in choosing the SoC-appropriate ENTRY_FUNCTION. This was done for nearly
all AT91 boards in-tree, but three were missed, which is what's fixed
here.
This breakage likewise affects all out-of-tree boards, which will
misbehave after an update to a newer barebox when used as first stage.
Fixing that might be more effort though, so let's just fix what we got
in-tree.
Fixes: 4331e488f363 ("ARM: at91: Use ENTRY_FUNCTION_HEAD")
Reviewed-by: Sam Ravnborg <sam@ravnborg.org>
Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
---
arch/arm/boards/at91sam9263ek/lowlevel_init.c | 5 ++---
arch/arm/boards/at91sam9x5ek/lowlevel.c | 5 ++---
arch/arm/boards/skov-arm9cpu/lowlevel.c | 4 ++--
3 files changed, 6 insertions(+), 8 deletions(-)
diff --git a/arch/arm/boards/at91sam9263ek/lowlevel_init.c b/arch/arm/boards/at91sam9263ek/lowlevel_init.c
index 3e1f471d8e5f..aea772c7431c 100644
--- a/arch/arm/boards/at91sam9263ek/lowlevel_init.c
+++ b/arch/arm/boards/at91sam9263ek/lowlevel_init.c
@@ -6,8 +6,7 @@
#include <linux/sizes.h>
-#include <asm/barebox-arm.h>
-
+#include <mach/at91/barebox-arm.h>
#include <mach/at91/at91sam926x_board_init.h>
#include <mach/at91/at91sam9263_matrix.h>
@@ -117,7 +116,7 @@ static void __bare_init at91sam9263ek_init(void *fdt)
extern char __dtb_z_at91sam9263ek_start[];
-ENTRY_FUNCTION(start_at91sam9263ek, r0, r1, r2)
+AT91_ENTRY_FUNCTION(start_at91sam9263ek, r0, r1, r2)
{
void *fdt;
diff --git a/arch/arm/boards/at91sam9x5ek/lowlevel.c b/arch/arm/boards/at91sam9x5ek/lowlevel.c
index 350c99100ee7..5dbac307acfd 100644
--- a/arch/arm/boards/at91sam9x5ek/lowlevel.c
+++ b/arch/arm/boards/at91sam9x5ek/lowlevel.c
@@ -3,14 +3,13 @@
#include <common.h>
#include <linux/sizes.h>
#include <mach/at91/at91_ddrsdrc.h>
-#include <asm/barebox-arm-head.h>
-#include <asm/barebox-arm.h>
+#include <mach/at91/barebox-arm.h>
#include <io.h>
#include <debug_ll.h>
extern char __dtb_z_at91sam9x5ek_start[];
-ENTRY_FUNCTION(start_at91sam9x5ek, r0, r1, r2)
+AT91_ENTRY_FUNCTION(start_at91sam9x5ek, r0, r1, r2)
{
void *fdt;
diff --git a/arch/arm/boards/skov-arm9cpu/lowlevel.c b/arch/arm/boards/skov-arm9cpu/lowlevel.c
index bde5b80e6c1c..82abfb4021a9 100644
--- a/arch/arm/boards/skov-arm9cpu/lowlevel.c
+++ b/arch/arm/boards/skov-arm9cpu/lowlevel.c
@@ -3,10 +3,10 @@
#include <linux/sizes.h>
-#include <asm/barebox-arm.h>
#include <mach/at91/at91sam926x_board_init.h>
#include <mach/at91/at91sam9263_matrix.h>
+#include <mach/at91/barebox-arm.h>
#define MASTER_PLL_MUL 171
#define MASTER_PLL_DIV 14
@@ -114,7 +114,7 @@ static void __bare_init skov_arm9cpu_init(void *fdt)
extern char __dtb_at91_skov_arm9cpu_start[];
-ENTRY_FUNCTION(start_skov_arm9cpu, r0, r1, r2)
+AT91_ENTRY_FUNCTION(start_skov_arm9cpu, r0, r1, r2)
{
void *fdt;
--
2.39.2
^ permalink raw reply [flat|nested] 16+ messages in thread* [PATCH v4 05/14] ARM: at91: implement SAM9_ENTRY_FUNCTION
2024-02-20 9:30 [PATCH v4 00/14] ARM: at91: skov-arm9cpu (SAM9263) first stage support Ahmad Fatoum
` (3 preceding siblings ...)
2024-02-20 9:30 ` [PATCH v4 04/14] ARM: at91: use AT91 header instead of generic barebox ARM's Ahmad Fatoum
@ 2024-02-20 9:30 ` Ahmad Fatoum
2024-02-20 9:30 ` [PATCH v4 06/14] ARM: at91: sam9263_ll: drop PLL charge pump initialization Ahmad Fatoum
` (9 subsequent siblings)
14 siblings, 0 replies; 16+ messages in thread
From: Ahmad Fatoum @ 2024-02-20 9:30 UTC (permalink / raw)
To: barebox; +Cc: Sam Ravnborg, Ahmad Fatoum
An On-chip SRAM is available at address 0x00300000 on all SAM9x
variants, so let's define a macro that sets up the stack to grow
down from its end. This will be useful for first stage barebox running
without previously setup stack.
Reviewed-by: Sam Ravnborg <sam@ravnborg.org>
Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
---
include/mach/at91/barebox-arm.h | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/include/mach/at91/barebox-arm.h b/include/mach/at91/barebox-arm.h
index f82b82ebed8b..652fd283a0af 100644
--- a/include/mach/at91/barebox-arm.h
+++ b/include/mach/at91/barebox-arm.h
@@ -6,6 +6,7 @@
#include <asm/common.h>
#include <mach/at91/sama5d3.h>
#include <mach/at91/sama5d4.h>
+#include <mach/at91/at91sam9261.h>
#ifdef CONFIG_AT91_LOAD_BAREBOX_SRAM
#define AT91_EXV6 ".word _barebox_image_size\n"
@@ -68,6 +69,10 @@ static __always_inline void __barebox_at91_head(void)
#define SAMA5D4_ENTRY_FUNCTION(name, r4) \
SAMA5_ENTRY_FUNCTION(name, SAMA5D4_SRAM_BASE + SAMA5D4_SRAM_SIZE, r4)
+#define SAM9_ENTRY_FUNCTION(name) \
+ ENTRY_FUNCTION_WITHSTACK_HEAD(name, AT91SAM9261_SRAM_BASE + AT91SAM9261_SRAM_SIZE, \
+ __barebox_at91_head, r0, r1, r2)
+
#define AT91_ENTRY_FUNCTION(fn, r0, r1, r2) \
ENTRY_FUNCTION_WITHSTACK_HEAD(fn, 0, __barebox_at91_head, r0, r1, r2)
--
2.39.2
^ permalink raw reply [flat|nested] 16+ messages in thread* [PATCH v4 06/14] ARM: at91: sam9263_ll: drop PLL charge pump initialization
2024-02-20 9:30 [PATCH v4 00/14] ARM: at91: skov-arm9cpu (SAM9263) first stage support Ahmad Fatoum
` (4 preceding siblings ...)
2024-02-20 9:30 ` [PATCH v4 05/14] ARM: at91: implement SAM9_ENTRY_FUNCTION Ahmad Fatoum
@ 2024-02-20 9:30 ` Ahmad Fatoum
2024-02-20 9:30 ` [PATCH v4 07/14] ARM: at91: sam9263_ll: pass AT91_PMC_LL_AT91SAM9263 to PMC functions Ahmad Fatoum
` (8 subsequent siblings)
14 siblings, 0 replies; 16+ messages in thread
From: Ahmad Fatoum @ 2024-02-20 9:30 UTC (permalink / raw)
To: barebox; +Cc: Sam Ravnborg, Ahmad Fatoum
The datasheet[1] described the PLL Charge Pump Current Register in 27.9.17
very sparingly by mandating that 0x10001 is to be written into it.
In the 28-Jan-16 revision of the datasheet the access mode for the
register was changed from Write-only to Read/Write. Indeed reading the
register is possible, but it seems to always return 0, even directly
after write.
Given that code for initializing the PLL charge pumps was added to
AT91Bootsrap only for SAMA5 support and that apparently no adverse effect
was observed on SAM9263 for not doing this for all these years, it follows
that the PLL charge pump has to be already initialized on POR or by BootROM
and we are better off playing it safe and not introducing code in the PMC
setup that didn't exist in Atmel's own AT91Bootstrap.
Therefore drop that line again. There are no upstream boards calling
this function yet anyway, so this should have very limited effect.
[1]: Atmel-6249N-ATARM-SAM9263-Datasheet_14-Mar-16
Reviewed-by: Sam Ravnborg <sam@ravnborg.org>
Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
---
arch/arm/mach-at91/sam9263_ll.c | 3 ---
1 file changed, 3 deletions(-)
diff --git a/arch/arm/mach-at91/sam9263_ll.c b/arch/arm/mach-at91/sam9263_ll.c
index 8855a679fdf2..7600391629af 100644
--- a/arch/arm/mach-at91/sam9263_ll.c
+++ b/arch/arm/mach-at91/sam9263_ll.c
@@ -11,9 +11,6 @@ static void sam9263_pmc_init(const struct sam92_pmc_config *config)
{
at91_pmc_init(IOMEM(AT91SAM926X_BASE_PMC), 0);
- /* Initialize PLL charge pump, must be done before PLLAR/PLLBR */
- at91_pmc_init_pll(IOMEM(AT91SAM926X_BASE_PMC), AT91SAM9_PMC_ICPPLLA | AT91SAM9_PMC_ICPPLLB);
-
/* Setting PLL A and divider A */
at91_pmc_cfg_plla(IOMEM(AT91SAM926X_BASE_PMC),
AT91_PMC_MUL_(config->mula) |
--
2.39.2
^ permalink raw reply [flat|nested] 16+ messages in thread* [PATCH v4 07/14] ARM: at91: sam9263_ll: pass AT91_PMC_LL_AT91SAM9263 to PMC functions
2024-02-20 9:30 [PATCH v4 00/14] ARM: at91: skov-arm9cpu (SAM9263) first stage support Ahmad Fatoum
` (5 preceding siblings ...)
2024-02-20 9:30 ` [PATCH v4 06/14] ARM: at91: sam9263_ll: drop PLL charge pump initialization Ahmad Fatoum
@ 2024-02-20 9:30 ` Ahmad Fatoum
2024-02-20 9:30 ` [PATCH v4 08/14] ARM: at91: sam9263_ll: refactor MCK switch to PLLA for clarity Ahmad Fatoum
` (7 subsequent siblings)
14 siblings, 0 replies; 16+ messages in thread
From: Ahmad Fatoum @ 2024-02-20 9:30 UTC (permalink / raw)
To: barebox; +Cc: Sam Ravnborg, Ahmad Fatoum
The low level PMC driver does things differently according to its flags
parameter that encodes what SoC is being used. The default case of flags
== 0 is appropriate for the AT91SAM9263, but we have a AT91_PMC_LL_AT91SAM9263
macro that expands to 0, which makes apparent that we take the necessary
precautions, so use that instead for documentation purposes.
No functional change.
Reviewed-by: Sam Ravnborg <sam@ravnborg.org>
Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
---
arch/arm/mach-at91/sam9263_ll.c | 10 ++++++----
1 file changed, 6 insertions(+), 4 deletions(-)
diff --git a/arch/arm/mach-at91/sam9263_ll.c b/arch/arm/mach-at91/sam9263_ll.c
index 7600391629af..ed56ad21cd89 100644
--- a/arch/arm/mach-at91/sam9263_ll.c
+++ b/arch/arm/mach-at91/sam9263_ll.c
@@ -9,14 +9,16 @@
static void sam9263_pmc_init(const struct sam92_pmc_config *config)
{
- at91_pmc_init(IOMEM(AT91SAM926X_BASE_PMC), 0);
+ unsigned flags = AT91_PMC_LL_AT91SAM9263;
+
+ at91_pmc_init(IOMEM(AT91SAM926X_BASE_PMC), flags);
/* Setting PLL A and divider A */
at91_pmc_cfg_plla(IOMEM(AT91SAM926X_BASE_PMC),
AT91_PMC_MUL_(config->mula) |
AT91_PMC_OUT_2 | // 190 to 240 MHz
config->diva, // Divider
- 0);
+ flags);
/* Selection of Master Clock and Processor Clock */
@@ -26,7 +28,7 @@ static void sam9263_pmc_init(const struct sam92_pmc_config *config)
| AT91_PMC_PRES_1
| AT91SAM9_PMC_MDIV_2
| AT91_PMC_PDIV_1,
- 0);
+ flags);
/* Switch MCK on PLLA output */
at91_pmc_cfg_mck(IOMEM(AT91SAM926X_BASE_PMC),
@@ -34,7 +36,7 @@ static void sam9263_pmc_init(const struct sam92_pmc_config *config)
| AT91_PMC_PRES_1
| AT91SAM9_PMC_MDIV_2
| AT91_PMC_PDIV_1,
- 0);
+ flags);
}
static inline void matrix_wr(unsigned int offset, const unsigned int value)
--
2.39.2
^ permalink raw reply [flat|nested] 16+ messages in thread* [PATCH v4 08/14] ARM: at91: sam9263_ll: refactor MCK switch to PLLA for clarity
2024-02-20 9:30 [PATCH v4 00/14] ARM: at91: skov-arm9cpu (SAM9263) first stage support Ahmad Fatoum
` (6 preceding siblings ...)
2024-02-20 9:30 ` [PATCH v4 07/14] ARM: at91: sam9263_ll: pass AT91_PMC_LL_AT91SAM9263 to PMC functions Ahmad Fatoum
@ 2024-02-20 9:30 ` Ahmad Fatoum
2024-02-20 9:30 ` [PATCH v4 09/14] ARM: at91: sam9263_ll: support configuration of PLLB Ahmad Fatoum
` (6 subsequent siblings)
14 siblings, 0 replies; 16+ messages in thread
From: Ahmad Fatoum @ 2024-02-20 9:30 UTC (permalink / raw)
To: barebox; +Cc: Sam Ravnborg, Ahmad Fatoum
Duplicating the bits being written to configure the MCK harms
readability, so factor that out into a new variable to make clear the
bits that change between the two calls to at91_pmc_cfg_mck().
Reviewed-by: Sam Ravnborg <sam@ravnborg.org>
Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
---
arch/arm/mach-at91/sam9263_ll.c | 14 ++++----------
1 file changed, 4 insertions(+), 10 deletions(-)
diff --git a/arch/arm/mach-at91/sam9263_ll.c b/arch/arm/mach-at91/sam9263_ll.c
index ed56ad21cd89..dd4ea7c938f7 100644
--- a/arch/arm/mach-at91/sam9263_ll.c
+++ b/arch/arm/mach-at91/sam9263_ll.c
@@ -10,6 +10,7 @@
static void sam9263_pmc_init(const struct sam92_pmc_config *config)
{
unsigned flags = AT91_PMC_LL_AT91SAM9263;
+ u32 mckr_settings;
at91_pmc_init(IOMEM(AT91SAM926X_BASE_PMC), flags);
@@ -21,22 +22,15 @@ static void sam9263_pmc_init(const struct sam92_pmc_config *config)
flags);
/* Selection of Master Clock and Processor Clock */
+ mckr_settings = AT91_PMC_PRES_1 | AT91SAM9_PMC_MDIV_2 | AT91_PMC_PDIV_1;
/* PCK = PLLA = 2 * MCK */
at91_pmc_cfg_mck(IOMEM(AT91SAM926X_BASE_PMC),
- AT91_PMC_CSS_SLOW
- | AT91_PMC_PRES_1
- | AT91SAM9_PMC_MDIV_2
- | AT91_PMC_PDIV_1,
- flags);
+ AT91_PMC_CSS_SLOW | mckr_settings, flags);
/* Switch MCK on PLLA output */
at91_pmc_cfg_mck(IOMEM(AT91SAM926X_BASE_PMC),
- AT91_PMC_CSS_PLLA
- | AT91_PMC_PRES_1
- | AT91SAM9_PMC_MDIV_2
- | AT91_PMC_PDIV_1,
- flags);
+ AT91_PMC_CSS_PLLA | mckr_settings, flags);
}
static inline void matrix_wr(unsigned int offset, const unsigned int value)
--
2.39.2
^ permalink raw reply [flat|nested] 16+ messages in thread* [PATCH v4 09/14] ARM: at91: sam9263_ll: support configuration of PLLB
2024-02-20 9:30 [PATCH v4 00/14] ARM: at91: skov-arm9cpu (SAM9263) first stage support Ahmad Fatoum
` (7 preceding siblings ...)
2024-02-20 9:30 ` [PATCH v4 08/14] ARM: at91: sam9263_ll: refactor MCK switch to PLLA for clarity Ahmad Fatoum
@ 2024-02-20 9:30 ` Ahmad Fatoum
2024-02-20 9:30 ` [PATCH v4 10/14] ARM: dts: AT91: skov-arm9cpu: remove barebox environment on NOR Ahmad Fatoum
` (5 subsequent siblings)
14 siblings, 0 replies; 16+ messages in thread
From: Ahmad Fatoum @ 2024-02-20 9:30 UTC (permalink / raw)
To: barebox; +Cc: Sam Ravnborg, Ahmad Fatoum
PLLB may be used as input to derive the USB's 48 MHz clock.
PLLA is already being setup by currently unused sam9263_lowlevel_init(),
so add an extra parameter for PLLB as well.
While at it, we change the API of sam9263_lowlevel_init(): AT91Bootstrap
code has PLLA_SETTINGS and PLLB_SETTINGS as hex values in the headers,
so it makes porting easier by just allowing low-level barebox code to
use the values as is without having to split them up to stuff into a
struct, only to have them ORed into a single value again.
Reviewed-by: Sam Ravnborg <sam@ravnborg.org>
Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
---
arch/arm/mach-at91/at91_pmc_ll.c | 11 +++++++++++
arch/arm/mach-at91/sam9263_ll.c | 15 +++++++--------
include/mach/at91/at91_pmc_ll.h | 1 +
include/mach/at91/sam92_ll.h | 7 +------
4 files changed, 20 insertions(+), 14 deletions(-)
diff --git a/arch/arm/mach-at91/at91_pmc_ll.c b/arch/arm/mach-at91/at91_pmc_ll.c
index 0d377b4ca720..0101623c8e39 100644
--- a/arch/arm/mach-at91/at91_pmc_ll.c
+++ b/arch/arm/mach-at91/at91_pmc_ll.c
@@ -157,6 +157,17 @@ void at91_pmc_cfg_plla(void __iomem *pmc_base, u32 pmc_pllar,
;
}
+void at91_pmc_cfg_pllb(void __iomem *pmc_base, u32 pmc_pllbr,
+ unsigned int __always_unused flags)
+{
+ /* Always disable PLL before configuring it */
+ at91_pmc_write(AT91_CKGR_PLLBR, 0);
+ at91_pmc_write(AT91_CKGR_PLLBR, pmc_pllbr);
+
+ while (!(at91_pmc_read(AT91_PMC_SR) & AT91_PMC_LOCKB))
+ ;
+}
+
void at91_pmc_cfg_mck(void __iomem *pmc_base, u32 pmc_mckr, unsigned int flags)
{
u32 tmp;
diff --git a/arch/arm/mach-at91/sam9263_ll.c b/arch/arm/mach-at91/sam9263_ll.c
index dd4ea7c938f7..a60d3c7a25be 100644
--- a/arch/arm/mach-at91/sam9263_ll.c
+++ b/arch/arm/mach-at91/sam9263_ll.c
@@ -7,7 +7,7 @@
#include <mach/at91/at91_wdt.h>
#include <mach/at91/sam92_ll.h>
-static void sam9263_pmc_init(const struct sam92_pmc_config *config)
+static void sam9263_pmc_init(u32 plla, u32 pllb)
{
unsigned flags = AT91_PMC_LL_AT91SAM9263;
u32 mckr_settings;
@@ -15,11 +15,7 @@ static void sam9263_pmc_init(const struct sam92_pmc_config *config)
at91_pmc_init(IOMEM(AT91SAM926X_BASE_PMC), flags);
/* Setting PLL A and divider A */
- at91_pmc_cfg_plla(IOMEM(AT91SAM926X_BASE_PMC),
- AT91_PMC_MUL_(config->mula) |
- AT91_PMC_OUT_2 | // 190 to 240 MHz
- config->diva, // Divider
- flags);
+ at91_pmc_cfg_plla(IOMEM(AT91SAM926X_BASE_PMC), plla, flags);
/* Selection of Master Clock and Processor Clock */
mckr_settings = AT91_PMC_PRES_1 | AT91SAM9_PMC_MDIV_2 | AT91_PMC_PDIV_1;
@@ -31,6 +27,9 @@ static void sam9263_pmc_init(const struct sam92_pmc_config *config)
/* Switch MCK on PLLA output */
at91_pmc_cfg_mck(IOMEM(AT91SAM926X_BASE_PMC),
AT91_PMC_CSS_PLLA | mckr_settings, flags);
+
+ if (pllb)
+ at91_pmc_cfg_pllb(IOMEM(AT91SAM926X_BASE_PMC), pllb, flags);
}
static inline void matrix_wr(unsigned int offset, const unsigned int value)
@@ -199,10 +198,10 @@ static void sam9263_rstc_init(void)
writel(AT91_RSTC_KEY | AT91_RSTC_URSTEN, IOMEM(AT91SAM926X_BASE_RSTC + AT91_RSTC_MR));
}
-void sam9263_lowlevel_init(const struct sam92_pmc_config *config)
+void sam9263_lowlevel_init(u32 plla, u32 pllb)
{
at91_wdt_disable(IOMEM(AT91SAM9263_BASE_WDT));
- sam9263_pmc_init(config);
+ sam9263_pmc_init(plla, pllb);
sam9263_matrix_init();
sam9263_rstc_init();
}
diff --git a/include/mach/at91/at91_pmc_ll.h b/include/mach/at91/at91_pmc_ll.h
index 9832712fe5ca..ceb7510144d8 100644
--- a/include/mach/at91/at91_pmc_ll.h
+++ b/include/mach/at91/at91_pmc_ll.h
@@ -45,6 +45,7 @@
void at91_pmc_init(void __iomem *pmc_base, unsigned int flags);
void at91_pmc_cfg_mck(void __iomem *pmc_base, u32 pmc_mckr, unsigned int flags);
void at91_pmc_cfg_plla(void __iomem *pmc_base, u32 pmc_pllar, unsigned int flags);
+void at91_pmc_cfg_pllb(void __iomem *pmc_base, u32 pmc_pllbr, unsigned int flags);
int at91_pmc_enable_generic_clock(void __iomem *pmc_base, void __iomem *sfr_base,
unsigned int periph_id,
diff --git a/include/mach/at91/sam92_ll.h b/include/mach/at91/sam92_ll.h
index 8cfccd640220..25c572bfb4f3 100644
--- a/include/mach/at91/sam92_ll.h
+++ b/include/mach/at91/sam92_ll.h
@@ -15,12 +15,7 @@
#include <mach/at91/early_udelay.h>
#include <mach/at91/iomux.h>
-struct sam92_pmc_config {
- unsigned int diva;
- unsigned int mula;
-};
-
-void sam9263_lowlevel_init(const struct sam92_pmc_config *config);
+void sam9263_lowlevel_init(u32 plla, u32 pllb);
static inline void sam92_pmc_enable_periph_clock(int clk)
{
--
2.39.2
^ permalink raw reply [flat|nested] 16+ messages in thread* [PATCH v4 10/14] ARM: dts: AT91: skov-arm9cpu: remove barebox environment on NOR
2024-02-20 9:30 [PATCH v4 00/14] ARM: at91: skov-arm9cpu (SAM9263) first stage support Ahmad Fatoum
` (8 preceding siblings ...)
2024-02-20 9:30 ` [PATCH v4 09/14] ARM: at91: sam9263_ll: support configuration of PLLB Ahmad Fatoum
@ 2024-02-20 9:30 ` Ahmad Fatoum
2024-02-20 9:30 ` [PATCH v4 11/14] ARM: at91: skov-arm9cpu: Add SD-Card xload support Ahmad Fatoum
` (4 subsequent siblings)
14 siblings, 0 replies; 16+ messages in thread
From: Ahmad Fatoum @ 2024-02-20 9:30 UTC (permalink / raw)
To: barebox; +Cc: Sam Ravnborg, Ahmad Fatoum
The NOR-Flash for ARM9CPUs in the field has U-Boot, so it's not a good
idea to overwrite its environment with barebox'. We'll add a SD-Card
environment for barebox in recovery case in a later commit, but for now
remove the NOR flash environment footgun.
Reviewed-by: Sam Ravnborg <sam@ravnborg.org>
Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
---
arch/arm/dts/at91-skov-arm9cpu.dts | 9 ++-------
1 file changed, 2 insertions(+), 7 deletions(-)
diff --git a/arch/arm/dts/at91-skov-arm9cpu.dts b/arch/arm/dts/at91-skov-arm9cpu.dts
index 5e2541f2fa76..ac1d5c0c2e6e 100644
--- a/arch/arm/dts/at91-skov-arm9cpu.dts
+++ b/arch/arm/dts/at91-skov-arm9cpu.dts
@@ -16,11 +16,6 @@ / {
chosen {
stdout-path = "serial0:115200n8";
-
- environment {
- compatible = "barebox,environment";
- device-path = &environment_nor;
- };
};
flash: nor_flash@10000000 {
@@ -36,12 +31,12 @@ partitions {
#address-cells = <1>;
#size-cells = <1>;
- barebox@0 {
+ u-boot@0 {
label = "bootloader";
reg = <0x00000 0x80000>;
};
- environment_nor: env@80000 {
+ env@80000 {
label = "environment";
reg = <0x80000 0x20000>;
};
--
2.39.2
^ permalink raw reply [flat|nested] 16+ messages in thread* [PATCH v4 11/14] ARM: at91: skov-arm9cpu: Add SD-Card xload support
2024-02-20 9:30 [PATCH v4 00/14] ARM: at91: skov-arm9cpu (SAM9263) first stage support Ahmad Fatoum
` (9 preceding siblings ...)
2024-02-20 9:30 ` [PATCH v4 10/14] ARM: dts: AT91: skov-arm9cpu: remove barebox environment on NOR Ahmad Fatoum
@ 2024-02-20 9:30 ` Ahmad Fatoum
2024-02-20 9:30 ` [PATCH v4 12/14] ARM: at91: skov-arm9cpu: configure SMC for NOR flash use Ahmad Fatoum
` (3 subsequent siblings)
14 siblings, 0 replies; 16+ messages in thread
From: Ahmad Fatoum @ 2024-02-20 9:30 UTC (permalink / raw)
To: barebox; +Cc: Sam Ravnborg, Ahmad Fatoum
From: Sam Ravnborg <sam@ravnborg.org>
This updates skov-arm9cpu with xload support, and we can now
use barebox as a replacement for at91bootstrap
Only boot via SD card is supported.
Signed-off-by: Sam Ravnborg <sam@ravnborg.org>
Reviewed-by: Sam Ravnborg <sam@ravnborg.org>
Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
---
v3 -> v4:
- use macro definitions for PLLA_SETTINGS/PLLB_SETTINGS (Sam)
- add Sam's r-b
v2 -> v3:
- rename skov-arm9cpu-xload.img to skov-arm9cpu-xload-mmc.img
- move code after relocation into separate noinline function
- fix PLLA configuration and add PLLB configuration
- add support for 64M SDRAM variant
- remove erroneous pull-up setting from DRAM lines
- read AT91SAM9263_MATRIX_EBI0CSA, so we only set the
relevant bits
v1 -> v2:
- Use ENTRY_FUNCTION_WITHSTACK
- Reshuffeled order in early init
- SD card in not highcapacity
- Drop irrelevant max image size in
images/Makefile.at91
---
arch/arm/boards/skov-arm9cpu/lowlevel.c | 202 ++++++++++++------------
arch/arm/mach-at91/Kconfig | 4 +-
images/Makefile.at91 | 6 +-
include/mach/at91/at91_pmc.h | 2 +
4 files changed, 112 insertions(+), 102 deletions(-)
diff --git a/arch/arm/boards/skov-arm9cpu/lowlevel.c b/arch/arm/boards/skov-arm9cpu/lowlevel.c
index 82abfb4021a9..baf0b7bfc990 100644
--- a/arch/arm/boards/skov-arm9cpu/lowlevel.c
+++ b/arch/arm/boards/skov-arm9cpu/lowlevel.c
@@ -1,115 +1,119 @@
// SPDX-License-Identifier: GPL-2.0
-// PDX-FileCopyrightText: 2018 Sam Ravnborg <sam@ravnborg.org>
-
-#include <linux/sizes.h>
-
+// SPDX-FileCopyrightText: 2022 Sam Ravnborg <sam@ravnborg.org>
#include <mach/at91/at91sam926x_board_init.h>
#include <mach/at91/at91sam9263_matrix.h>
+#include <mach/at91/sam92_ll.h>
+#include <mach/at91/xload.h>
#include <mach/at91/barebox-arm.h>
+#include <linux/build_bug.h>
-#define MASTER_PLL_MUL 171
-#define MASTER_PLL_DIV 14
+/* MCK = 20 MHz */
+#define MAIN_CLOCK 200000000
+#define MASTER_CLOCK (MAIN_CLOCK / 2) /* PMC_MCKR divides by 2 */
-static void __bare_init skovarm9cpu_board_config(struct at91sam926x_board_cfg *cfg)
+#define PLLA_SETTINGS (AT91_PMC_PLLA_WR_ERRATA | AT91_PMC_MUL_(49) | AT91_PMC_OUT_2 | \
+ AT91_PMC_PLLCOUNT_(48) | AT91_PMC_DIV_(4))
+static_assert(PLLA_SETTINGS == 0x2031B004);
+
+#define PLLB_SETTINGS (AT91_PMC_USBDIV_2 | AT91_PMC_MUL_(5) | AT91_PMC_OUT_0 | \
+ AT91_PMC_PLLCOUNT_(48) | AT91_PMC_DIV_BYPASS)
+static_assert(PLLB_SETTINGS == 0x10053001);
+
+/*
+ * Check if target is 64 or 128 MB and adjust AT91_SDRAMC_CR
+ * accordingly.
+ * Size Start Size(hex)
+ * 64 MB => 0x20000000 0x4000000
+ * 128 MB => 0x20000000 0x8000000
+ *
+ * If 64 MiB RAM with NC_10 set, then we see holes in the memory, which
+ * is how we detect if memory is 64 or 128 MiB
+ */
+static int check_if_128mb(void)
{
- /* Disable Watchdog */
- cfg->wdt_mr =
- AT91_WDT_WDIDLEHLT | AT91_WDT_WDDBGHLT |
- AT91_WDT_WDV |
- AT91_WDT_WDDIS |
- AT91_WDT_WDD;
+ unsigned int *test_adr = (unsigned int *)AT91_CHIPSELECT_1;
+ unsigned int test_val = 0xdeadbee0;
+ unsigned int *p;
+ int i;
- /* define PDC[31:16] as DATA[31:16] */
- cfg->ebi_pio_pdr = 0xFFFF0000;
- /* no pull-up for D[31:16] */
- cfg->ebi_pio_ppudr = 0xFFFF0000;
- /* EBI0_CSA, CS1 SDRAM, CS3 NAND Flash, 3.3V memories */
- cfg->ebi_csa =
- AT91SAM9263_MATRIX_EBI0_DBPUC | AT91SAM9263_MATRIX_EBI0_VDDIOMSEL_3_3V |
- AT91SAM9263_MATRIX_EBI0_CS1A_SDRAMC;
+ /* Fill up memory with a known pattern */
+ p = test_adr;
+ for (i = 0; i < 0xb00; i++)
+ *p++ = test_val + i;
- cfg->smc_cs = 0;
- cfg->smc_mode =
- AT91_SMC_READMODE | AT91_SMC_WRITEMODE |
- AT91_SMC_DBW_16 |
- AT91_SMC_TDFMODE |
- AT91_SMC_TDF_(6);
- cfg->smc_cycle =
- AT91_SMC_NWECYCLE_(22) | AT91_SMC_NRDCYCLE_(22);
- cfg->smc_pulse =
- AT91_SMC_NWEPULSE_(11) | AT91_SMC_NCS_WRPULSE_(11) |
- AT91_SMC_NRDPULSE_(11) | AT91_SMC_NCS_RDPULSE_(11);
- cfg->smc_setup =
- AT91_SMC_NWESETUP_(10) | AT91_SMC_NCS_WRSETUP_(10) |
- AT91_SMC_NRDSETUP_(10) | AT91_SMC_NCS_RDSETUP_(10);
+ /*
+ * Check that we can read back the values just written
+ * If one or more fails, we have only 64 MB
+ */
+ p = test_adr;
+ for (i = 0; i < 0xb00; i++)
+ if (*p++ != (test_val + i))
+ return false;
- cfg->pmc_mor =
- AT91_PMC_MOSCEN |
- (255 << 8); /* Main Oscillator Start-up Time */
- cfg->pmc_pllar =
- AT91_PMC_PLLA_WR_ERRATA | /* Bit 29 must be 1 when prog */
- AT91_PMC_OUT |
- AT91_PMC_PLLCOUNT | /* PLL Counter */
- (2 << 28) | /* PLL Clock Frequency Range */
- ((MASTER_PLL_MUL - 1) << 16) | (MASTER_PLL_DIV);
- /* PCK/2 = MCK Master Clock from PLLA */
- cfg->pmc_mckr1 =
- AT91_PMC_CSS_SLOW |
- AT91_PMC_PRES_1 |
- AT91SAM9_PMC_MDIV_2 |
- AT91_PMC_PDIV_1;
- /* PCK/2 = MCK Master Clock from PLLA */
- cfg->pmc_mckr2 =
- AT91_PMC_CSS_PLLA |
- AT91_PMC_PRES_1 |
- AT91SAM9_PMC_MDIV_2 |
- AT91_PMC_PDIV_1;
-
- /* SDRAM */
- /* SDRAMC_TR - Refresh Timer register */
- cfg->sdrc_tr1 = 0x13C;
- /* SDRAMC_CR - Configuration register*/
- cfg->sdrc_cr =
- AT91_SDRAMC_NC_10 | /* Assume 128MiB */
- AT91_SDRAMC_NR_13 |
- AT91_SDRAMC_NB_4 |
- AT91_SDRAMC_CAS_3 |
- AT91_SDRAMC_DBW_32 |
- (1 << 8) | /* Write Recovery Delay */
- (7 << 12) | /* Row Cycle Delay */
- (2 << 16) | /* Row Precharge Delay */
- (2 << 20) | /* Row to Column Delay */
- (5 << 24) | /* Active to Precharge Delay */
- (1 << 28); /* Exit Self Refresh to Active Delay */
-
- /* Memory Device Register -> SDRAM */
- cfg->sdrc_mdr = AT91_SDRAMC_MD_SDRAM;
- /* SDRAM_TR */
- cfg->sdrc_tr2 = 1200;
-
- /* user reset enable */
- cfg->rstc_rmr =
- AT91_RSTC_KEY |
- AT91_RSTC_PROCRST |
- AT91_RSTC_RSTTYP_WAKEUP |
- AT91_RSTC_RSTTYP_WATCHDOG;
+ return true;
}
-static void __bare_init skov_arm9cpu_init(void *fdt)
+static void sam9263_sdramc_init(void)
{
- struct at91sam926x_board_cfg cfg;
+ void __iomem *piod = IOMEM(AT91SAM9263_BASE_PIOD);
+ static struct at91sam9_sdramc_config config = {
+ .sdramc = IOMEM(AT91SAM9263_BASE_SDRAMC0),
+ .mr = 0,
+ .tr = (MASTER_CLOCK * 7) / 1000000, // TODO 140 versus 0x13c (316)?
+ .cr = AT91_SDRAMC_NC_10 | AT91_SDRAMC_NR_13 | AT91_SDRAMC_CAS_2
+ | AT91_SDRAMC_NB_4 | AT91_SDRAMC_DBW_32
+ | AT91_SDRAMC_TWR_2 | AT91_SDRAMC_TRC_7
+ | AT91_SDRAMC_TRP_2 | AT91_SDRAMC_TRCD_2
+ | AT91_SDRAMC_TRAS_5 | AT91_SDRAMC_TXSR_8,
+ .lpr = 0,
+ .mdr = AT91_SDRAMC_MD_SDRAM,
+ };
- cfg.pio = IOMEM(AT91SAM9263_BASE_PIOD);
- cfg.sdramc = IOMEM(AT91SAM9263_BASE_SDRAMC0);
- cfg.ebi_pio_is_peripha = true;
- cfg.matrix_csa = IOMEM(AT91SAM9263_BASE_MATRIX + AT91SAM9263_MATRIX_EBI0CSA);
+ /* Define PD[31:16] as DATA[31:16] */
+ at91_mux_gpio_disable(piod, GENMASK(31, 16));
+ /* No pull-up for D[31:16] */
+ at91_mux_set_pullup(piod, GENMASK(31, 16), false);
+ /* PD16 to PD31 are pheripheral A */
+ at91_mux_set_A_periph(piod, GENMASK(31, 16));
- skovarm9cpu_board_config(&cfg);
- at91sam9263_board_init(&cfg);
+ /* EBI0_CSA, CS1 SDRAM, 3.3V memories */
+ setbits_le32(IOMEM(AT91SAM9263_BASE_MATRIX + AT91SAM9263_MATRIX_EBI0CSA),
+ AT91SAM9263_MATRIX_EBI0_VDDIOMSEL_3_3V | AT91SAM9263_MATRIX_EBI0_CS1A_SDRAMC);
- barebox_arm_entry(AT91_CHIPSELECT_1, at91_get_sdram_size(cfg.sdramc),
- fdt);
+ at91sam9_sdramc_initialize(&config, AT91SAM9263_BASE_EBI0_CS1);
+
+ if (!check_if_128mb()) {
+ /* Change number of columns to 9 for 64MB ram. */
+ /* Other parameters does not need to be changed due to chip size. */
+
+ pr_debug("64M variant detected\n");
+
+ /* Clear NC bits */
+ config.cr &= ~AT91_SDRAMC_NC;
+ config.cr |= AT91_SDRAMC_NC_9;
+ at91sam9_sdramc_initialize(&config, AT91SAM9263_BASE_EBI0_CS1);
+ }
+}
+
+static noinline void continue_skov_arm9cpu_xload_mmc(void)
+{
+ sam9263_lowlevel_init(PLLA_SETTINGS, PLLB_SETTINGS);
+ sam92_dbgu_setup_ll(MASTER_CLOCK);
+
+ sam92_udelay_init(MASTER_CLOCK);
+ sam9263_sdramc_init();
+ sam9263_atmci_start_image(1, MASTER_CLOCK, 0);
+}
+
+SAM9_ENTRY_FUNCTION(start_skov_arm9cpu_xload_mmc)
+{
+ /* Configure system so we are less constrained */
+ arm_cpu_lowlevel_init();
+ relocate_to_current_adr();
+ setup_c();
+
+ continue_skov_arm9cpu_xload_mmc();
}
extern char __dtb_at91_skov_arm9cpu_start[];
@@ -118,10 +122,12 @@ AT91_ENTRY_FUNCTION(start_skov_arm9cpu, r0, r1, r2)
{
void *fdt;
+ /*
+ * We may be running after at91bootstrap, so redo the initialization to
+ * be sure, everything is as we expect it.
+ */
arm_cpu_lowlevel_init();
- arm_setup_stack(AT91SAM9263_SRAM0_BASE + AT91SAM9263_SRAM0_SIZE);
fdt = __dtb_at91_skov_arm9cpu_start + get_runtime_offset();
-
- skov_arm9cpu_init(fdt);
+ barebox_arm_entry(AT91_CHIPSELECT_1, at91sam9263_get_sdram_size(0), fdt);
}
diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig
index 69edf3dbdc4e..0e89916c9c32 100644
--- a/arch/arm/mach-at91/Kconfig
+++ b/arch/arm/mach-at91/Kconfig
@@ -603,9 +603,7 @@ config MACH_SKOV_ARM9CPU
select SOC_AT91SAM9263
select OFDEVICE
select COMMON_CLK_OF_PROVIDER
- select HAVE_AT91_USB_CLK
- select HAVE_AT91_BOOTSTRAP
- select AT91SAM926X_BOARD_INIT
+ select MCI_ATMEL_PBL
help
Say y here if you are using SKOV's ARM9 CPU board
diff --git a/images/Makefile.at91 b/images/Makefile.at91
index 523dc5f499f0..06f8936893ae 100644
--- a/images/Makefile.at91
+++ b/images/Makefile.at91
@@ -56,9 +56,13 @@ FILE_barebox-groboards-sama5d27-giantboard-xload-mmc.img = start_sama5d27_giantb
MAX_PBL_IMAGE_SIZE_start_sama5d27_giantboard_xload_mmc = 0xffff
image-$(CONFIG_MACH_SAMA5D27_GIANTBOARD) += barebox-groboards-sama5d27-giantboard-xload-mmc.img
+pblb-$(CONFIG_MACH_SKOV_ARM9CPU) += start_skov_arm9cpu_xload_mmc
+FILE_barebox-skov-arm9cpu-xload-mmc.img = start_skov_arm9cpu_xload_mmc.pblb
+MAX_PBL_MEMORY_SIZE_start_skov_arm9cpu = 0x12000
+image-$(CONFIG_MACH_SKOV_ARM9CPU) += barebox-skov-arm9cpu-xload-mmc.img
+
pblb-$(CONFIG_MACH_SKOV_ARM9CPU) += start_skov_arm9cpu
FILE_barebox-skov-arm9cpu.img = start_skov_arm9cpu.pblb
-MAX_PBL_MEMORY_SIZE_start_skov_arm9cpu = 0x12000
image-$(CONFIG_MACH_SKOV_ARM9CPU) += barebox-skov-arm9cpu.img
pblb-$(CONFIG_MACH_SAMA5D4_WIFX) += start_sama5d4_wifx_l1
diff --git a/include/mach/at91/at91_pmc.h b/include/mach/at91/at91_pmc.h
index c5ce0f82a1de..46ca0d746dfb 100644
--- a/include/mach/at91/at91_pmc.h
+++ b/include/mach/at91/at91_pmc.h
@@ -63,8 +63,10 @@
#define AT91_CKGR_PLLAR 0x28 /* PLL A Register */
#define AT91_CKGR_PLLBR 0x2c /* PLL B Register */
#define AT91_PMC_DIV (0xff << 0) /* Divider */
+#define AT91_PMC_DIV_(n) (((n) << 0) & AT91_PMC_DIV)
#define AT91_PMC_DIV_BYPASS (1 << 0) /* Divider bypass */
#define AT91_PMC_PLLCOUNT (0x3f << 8) /* PLL Counter */
+#define AT91_PMC_PLLCOUNT_(n) (((n) << 8) & AT91_PMC_PLLCOUNT)
#define AT91_PMC_OUT (3 << 14) /* PLL Clock Frequency Range */
#define AT91_PMC_OUT_0 (0 << 14)
#define AT91_PMC_OUT_1 (1 << 14)
--
2.39.2
^ permalink raw reply [flat|nested] 16+ messages in thread* [PATCH v4 12/14] ARM: at91: skov-arm9cpu: configure SMC for NOR flash use
2024-02-20 9:30 [PATCH v4 00/14] ARM: at91: skov-arm9cpu (SAM9263) first stage support Ahmad Fatoum
` (10 preceding siblings ...)
2024-02-20 9:30 ` [PATCH v4 11/14] ARM: at91: skov-arm9cpu: Add SD-Card xload support Ahmad Fatoum
@ 2024-02-20 9:30 ` Ahmad Fatoum
2024-02-20 9:30 ` [PATCH v4 13/14] ARM: at91: skov-arm9cpu: configure more appropriate hostname Ahmad Fatoum
` (2 subsequent siblings)
14 siblings, 0 replies; 16+ messages in thread
From: Ahmad Fatoum @ 2024-02-20 9:30 UTC (permalink / raw)
To: barebox; +Cc: Sam Ravnborg, Ahmad Fatoum
Deployed ARM9CPU's boots from NOR, not NAND. Replace the EBI NAND configuration
taken from the EK with one appropriate for the NOR chip we have.
As this needs to happen earlier than the cfi-flash driver probe, we also
move the board code to coredevice initlevel.
Reviewed-by: Sam Ravnborg <sam@ravnborg.org>
Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
---
arch/arm/boards/skov-arm9cpu/board.c | 45 +++++++++++++++-------------
1 file changed, 24 insertions(+), 21 deletions(-)
diff --git a/arch/arm/boards/skov-arm9cpu/board.c b/arch/arm/boards/skov-arm9cpu/board.c
index ddf6b68bcc6f..1d0ecb247d8e 100644
--- a/arch/arm/boards/skov-arm9cpu/board.c
+++ b/arch/arm/boards/skov-arm9cpu/board.c
@@ -16,23 +16,32 @@
#include <mach/at91/hardware.h>
#include <mach/at91/iomux.h>
-static struct sam9_smc_config ek_nand_smc_config = {
- .ncs_read_setup = 0,
- .nrd_setup = 1,
+static struct sam9_smc_config skov_nor_smc_config = {
+ /* Setup time is 2 cycles after the CS signal */
+ .nwe_setup = 2,
.ncs_write_setup = 0,
- .nwe_setup = 1,
+ .nrd_setup = 2,
+ .ncs_read_setup = 0,
- .ncs_read_pulse = 3,
- .nrd_pulse = 3,
- .ncs_write_pulse = 3,
- .nwe_pulse = 3,
+ /* Set pulse long enough - pulse should be a bit shorter than the cycle */
+ .nwe_pulse = 10,
+ .ncs_write_pulse = 12,
+ .nrd_pulse = 10,
+ .ncs_read_pulse = 12,
- .read_cycle = 5,
- .write_cycle = 5,
+ /* Set cycle long enougth at least 12 Cycles->120ns plus a little extra */
+ .write_cycle = 0x13,
+ .read_cycle = 0x13,
+ /* Set mode: 16Bit bus width, enable read and write
+ * Note: pagemode + 32 byte pages do not work with the 29GL512P flash
+ */
.mode = AT91_SMC_READMODE | AT91_SMC_WRITEMODE |
- AT91_SMC_EXNWMODE_DISABLE,
- .tdf_cycles = 2,
+ AT91_SMC_EXNWMODE_DISABLE |
+ AT91_SMC_BAT_WRITE |
+ AT91_SMC_DBW_16 |
+ AT91_SMC_TDFMODE,
+ .tdf_cycles = 1,
};
BAREBOX_MAGICVAR(board.mem, "The detected memory size in MiB");
@@ -47,19 +56,13 @@ static int mem;
*/
static int skov_arm9_probe(struct device *dev)
{
- unsigned long csa;
-
add_generic_device("at91sam9-smc", 0, NULL, AT91SAM9263_BASE_SMC0, 0x200,
IORESOURCE_MEM, NULL);
add_generic_device("at91sam9-smc", 1, NULL, AT91SAM9263_BASE_SMC1, 0x200,
IORESOURCE_MEM, NULL);
- csa = readl(AT91SAM9263_BASE_MATRIX + AT91SAM9263_MATRIX_EBI0CSA);
- csa |= AT91SAM9263_MATRIX_EBI0_CS3A_SMC_SMARTMEDIA;
- writel(csa, AT91SAM9263_BASE_MATRIX + AT91SAM9263_MATRIX_EBI0CSA);
-
- /* configure chip-select 3 (NAND) */
- sam9_smc_configure(0, 3, &ek_nand_smc_config);
+ /* configure chip-select 0 (NOR) */
+ sam9_smc_configure(0, 0, &skov_nor_smc_config);
mem = at91_get_sdram_size(IOMEM(AT91SAM9263_BASE_SDRAMC0));
mem = mem / SZ_1M;
@@ -82,4 +85,4 @@ static struct driver skov_arm9_driver = {
.probe = skov_arm9_probe,
.of_compatible = DRV_OF_COMPAT(skov_arm9_ids),
};
-device_platform_driver(skov_arm9_driver);
+coredevice_platform_driver(skov_arm9_driver);
--
2.39.2
^ permalink raw reply [flat|nested] 16+ messages in thread* [PATCH v4 13/14] ARM: at91: skov-arm9cpu: configure more appropriate hostname
2024-02-20 9:30 [PATCH v4 00/14] ARM: at91: skov-arm9cpu (SAM9263) first stage support Ahmad Fatoum
` (11 preceding siblings ...)
2024-02-20 9:30 ` [PATCH v4 12/14] ARM: at91: skov-arm9cpu: configure SMC for NOR flash use Ahmad Fatoum
@ 2024-02-20 9:30 ` Ahmad Fatoum
2024-02-20 9:31 ` [PATCH v4 14/14] ARM: AT91: skov-arm9cpu: support environment on SD-Card Ahmad Fatoum
2024-02-23 7:32 ` [PATCH v4 00/14] ARM: at91: skov-arm9cpu (SAM9263) first stage support Sascha Hauer
14 siblings, 0 replies; 16+ messages in thread
From: Ahmad Fatoum @ 2024-02-20 9:30 UTC (permalink / raw)
To: barebox; +Cc: Sam Ravnborg, Ahmad Fatoum
The default logic would set the hostname to arm9-cpu, which isn't very
descriptive. Set our own hostname that contains the vendor name.
Reviewed-by: Sam Ravnborg <sam@ravnborg.org>
Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
---
arch/arm/boards/skov-arm9cpu/board.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/boards/skov-arm9cpu/board.c b/arch/arm/boards/skov-arm9cpu/board.c
index 1d0ecb247d8e..db6813c0e726 100644
--- a/arch/arm/boards/skov-arm9cpu/board.c
+++ b/arch/arm/boards/skov-arm9cpu/board.c
@@ -56,6 +56,8 @@ static int mem;
*/
static int skov_arm9_probe(struct device *dev)
{
+ barebox_set_hostname("skov-arm9cpu");
+
add_generic_device("at91sam9-smc", 0, NULL, AT91SAM9263_BASE_SMC0, 0x200,
IORESOURCE_MEM, NULL);
add_generic_device("at91sam9-smc", 1, NULL, AT91SAM9263_BASE_SMC1, 0x200,
--
2.39.2
^ permalink raw reply [flat|nested] 16+ messages in thread* [PATCH v4 14/14] ARM: AT91: skov-arm9cpu: support environment on SD-Card
2024-02-20 9:30 [PATCH v4 00/14] ARM: at91: skov-arm9cpu (SAM9263) first stage support Ahmad Fatoum
` (12 preceding siblings ...)
2024-02-20 9:30 ` [PATCH v4 13/14] ARM: at91: skov-arm9cpu: configure more appropriate hostname Ahmad Fatoum
@ 2024-02-20 9:31 ` Ahmad Fatoum
2024-02-23 7:32 ` [PATCH v4 00/14] ARM: at91: skov-arm9cpu (SAM9263) first stage support Sascha Hauer
14 siblings, 0 replies; 16+ messages in thread
From: Ahmad Fatoum @ 2024-02-20 9:31 UTC (permalink / raw)
To: barebox; +Cc: Sam Ravnborg, Ahmad Fatoum
barebox is meant to boot from SD-Card on this platform, so support a
barebox environment in this case for easier handling.
Reviewed-by: Sam Ravnborg <sam@ravnborg.org>
Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
---
arch/arm/boards/skov-arm9cpu/board.c | 8 ++++++++
arch/arm/dts/at91-skov-arm9cpu.dts | 6 ++++++
2 files changed, 14 insertions(+)
diff --git a/arch/arm/boards/skov-arm9cpu/board.c b/arch/arm/boards/skov-arm9cpu/board.c
index db6813c0e726..20507922cb24 100644
--- a/arch/arm/boards/skov-arm9cpu/board.c
+++ b/arch/arm/boards/skov-arm9cpu/board.c
@@ -7,6 +7,7 @@
#include <envfs.h>
#include <init.h>
#include <gpio.h>
+#include <bootsource.h>
#include <linux/sizes.h>
@@ -70,6 +71,13 @@ static int skov_arm9_probe(struct device *dev)
mem = mem / SZ_1M;
globalvar_add_simple_int("board.mem", &mem, "%u");
+ /*
+ * NOR first stage bootloader is at91bootstrap, so if we find traces
+ * of barebox in on-chip SRAM, it must mean we have booted from SD
+ */
+ if (is_barebox_arm_head((void *)AT91SAM9263_SRAM0_BASE))
+ bootsource_set_raw(BOOTSOURCE_MMC, BOOTSOURCE_INSTANCE_UNKNOWN);
+
return 0;
}
diff --git a/arch/arm/dts/at91-skov-arm9cpu.dts b/arch/arm/dts/at91-skov-arm9cpu.dts
index ac1d5c0c2e6e..d04d031f4053 100644
--- a/arch/arm/dts/at91-skov-arm9cpu.dts
+++ b/arch/arm/dts/at91-skov-arm9cpu.dts
@@ -16,6 +16,12 @@ / {
chosen {
stdout-path = "serial0:115200n8";
+
+ environment-sd {
+ compatible = "barebox,environment";
+ device-path = &mmc1;
+ file-path = "barebox.env";
+ };
};
flash: nor_flash@10000000 {
--
2.39.2
^ permalink raw reply [flat|nested] 16+ messages in thread* Re: [PATCH v4 00/14] ARM: at91: skov-arm9cpu (SAM9263) first stage support
2024-02-20 9:30 [PATCH v4 00/14] ARM: at91: skov-arm9cpu (SAM9263) first stage support Ahmad Fatoum
` (13 preceding siblings ...)
2024-02-20 9:31 ` [PATCH v4 14/14] ARM: AT91: skov-arm9cpu: support environment on SD-Card Ahmad Fatoum
@ 2024-02-23 7:32 ` Sascha Hauer
14 siblings, 0 replies; 16+ messages in thread
From: Sascha Hauer @ 2024-02-23 7:32 UTC (permalink / raw)
To: barebox, Ahmad Fatoum; +Cc: Sam Ravnborg
On Tue, 20 Feb 2024 10:30:46 +0100, Ahmad Fatoum wrote:
> SDRAM setup and SD-Card chainloading support were previously added[1]
> by Sam as well as a WIP patch to enable them for Skov ARM9CPU.
>
> I reworked his final WIP patch and fixed some smaller and bigger issues
> that I ran into. Now barebox can replace at91bootstrap on this platform
> when booted from SD.
>
> [...]
Applied, thanks!
[01/14] mci: atmel_mci: disable power save mode
https://git.pengutronix.de/cgit/barebox/commit/?id=b9c420653af2 (link may not be stable)
[02/14] mci: atmel_mci: fix zeroing of block length on AT91SAM9263
https://git.pengutronix.de/cgit/barebox/commit/?id=f6c56c2011c3 (link may not be stable)
[03/14] ARM: replace ENTRY_FUNCTION_HEAD with ENTRY_FUNCTION_WITHSTACK_HEAD
https://git.pengutronix.de/cgit/barebox/commit/?id=8b95ed2a0f6b (link may not be stable)
[04/14] ARM: at91: use AT91 header instead of generic barebox ARM's
https://git.pengutronix.de/cgit/barebox/commit/?id=7800d1136236 (link may not be stable)
[05/14] ARM: at91: implement SAM9_ENTRY_FUNCTION
https://git.pengutronix.de/cgit/barebox/commit/?id=2807d3f3e341 (link may not be stable)
[06/14] ARM: at91: sam9263_ll: drop PLL charge pump initialization
https://git.pengutronix.de/cgit/barebox/commit/?id=d0e17e91e6a5 (link may not be stable)
[07/14] ARM: at91: sam9263_ll: pass AT91_PMC_LL_AT91SAM9263 to PMC functions
https://git.pengutronix.de/cgit/barebox/commit/?id=ead3bd2c6db6 (link may not be stable)
[08/14] ARM: at91: sam9263_ll: refactor MCK switch to PLLA for clarity
https://git.pengutronix.de/cgit/barebox/commit/?id=824801f1309e (link may not be stable)
[09/14] ARM: at91: sam9263_ll: support configuration of PLLB
https://git.pengutronix.de/cgit/barebox/commit/?id=8761a451da82 (link may not be stable)
[10/14] ARM: dts: AT91: skov-arm9cpu: remove barebox environment on NOR
https://git.pengutronix.de/cgit/barebox/commit/?id=6ef2a22a0b26 (link may not be stable)
[11/14] ARM: at91: skov-arm9cpu: Add SD-Card xload support
https://git.pengutronix.de/cgit/barebox/commit/?id=e369be6b3276 (link may not be stable)
[12/14] ARM: at91: skov-arm9cpu: configure SMC for NOR flash use
https://git.pengutronix.de/cgit/barebox/commit/?id=433b8dce29c7 (link may not be stable)
[13/14] ARM: at91: skov-arm9cpu: configure more appropriate hostname
https://git.pengutronix.de/cgit/barebox/commit/?id=66e62c636f37 (link may not be stable)
[14/14] ARM: AT91: skov-arm9cpu: support environment on SD-Card
https://git.pengutronix.de/cgit/barebox/commit/?id=7645601a1fb6 (link may not be stable)
Best regards,
--
Sascha Hauer <s.hauer@pengutronix.de>
^ permalink raw reply [flat|nested] 16+ messages in thread