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From: Ahmad Fatoum <a.fatoum@pengutronix.de>
To: barebox@lists.infradead.org
Cc: Ahmad Fatoum <a.fatoum@pengutronix.de>
Subject: [PATCH 1/5] ARM: i.MX8M: pass cpu_type parameter to __imx8m_early_clock_init
Date: Fri, 19 Apr 2024 08:13:27 +0200	[thread overview]
Message-ID: <20240419061331.2592739-2-a.fatoum@pengutronix.de> (raw)
In-Reply-To: <20240419061331.2592739-1-a.fatoum@pengutronix.de>

We do some limited clock tree configuration in PBL and do the proper
configuration later in the barebox proper drivers.

The clock tree of the i.MX8MP is a bit different though than that of the
i.MX8MM and i.MX8MN and we'll want to add some more SoC-specific
configuration in the follow-up commit. Prepare for that by giving the
function a cpu_type parameter that can be checked.

Note that we can't use imx_cpu_type here, because it has not been set
yet.

No functional change intended.

Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
---
 arch/arm/mach-imx/imx8m.c | 14 ++++++++++----
 1 file changed, 10 insertions(+), 4 deletions(-)

diff --git a/arch/arm/mach-imx/imx8m.c b/arch/arm/mach-imx/imx8m.c
index 52e42ee9ef63..d798c52c6a6e 100644
--- a/arch/arm/mach-imx/imx8m.c
+++ b/arch/arm/mach-imx/imx8m.c
@@ -56,8 +56,9 @@ void imx8m_ccgr_clock_disable(int index)
 #define IMX8MM_CCM_ANALOG_SYS_PLL2_GEN_CTRL	0x104
 #define IMX8MM_CCM_ANALOG_SYS_PLL3_GEN_CTRL	0x114
 
-static void __imx8m_early_clock_init(unsigned long pll3_freq) /* and later */
+static void __imx8m_early_clock_init(int cpu_type)
 {
+	unsigned long pll3_freq;
 	void __iomem *ana = IOMEM(MX8M_ANATOP_BASE_ADDR);
 	void __iomem *ccm = IOMEM(MX8M_CCM_BASE_ADDR);
 	u32 val;
@@ -99,6 +100,11 @@ static void __imx8m_early_clock_init(unsigned long pll3_freq) /* and later */
 				   IMX8M_CCM_TARGET_ROOTn_MUX(3));
 	imx8m_ccgr_clock_enable(IMX8M_CCM_CCGR_GIC);
 
+	if (cpu_type == IMX_CPU_IMX8MN)
+		pll3_freq = 600000000UL;
+	else
+		pll3_freq = 750000000UL;
+
 	/* Configure SYS_PLL3 */
 	clk_pll1416x_early_set_rate(ana + IMX8MM_CCM_ANALOG_SYS_PLL3_GEN_CTRL,
 				    pll3_freq, 25000000UL);
@@ -126,17 +132,17 @@ static void __imx8m_early_clock_init(unsigned long pll3_freq) /* and later */
 
 void imx8mm_early_clock_init(void)
 {
-	__imx8m_early_clock_init(750000000UL);
+	__imx8m_early_clock_init(IMX_CPU_IMX8MM);
 }
 
 void imx8mn_early_clock_init(void)
 {
-	__imx8m_early_clock_init(600000000UL);
+	__imx8m_early_clock_init(IMX_CPU_IMX8MN);
 }
 
 void imx8mp_early_clock_init(void)
 {
-	__imx8m_early_clock_init(750000000UL);
+	__imx8m_early_clock_init(IMX_CPU_IMX8MP);
 }
 
 
-- 
2.39.2




  reply	other threads:[~2024-04-19  6:14 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-04-19  6:13 [PATCH 0/5] ARM: i.MX8MP: add nominal drive mode support Ahmad Fatoum
2024-04-19  6:13 ` Ahmad Fatoum [this message]
2024-04-19  6:13 ` [PATCH 2/5] ARM: i.MX8MP: configure PLL3 as 600MHz Ahmad Fatoum
2024-04-19  6:13 ` [PATCH 3/5] ARM: i.MX8MP: configure PLL3 as noc_io parent Ahmad Fatoum
2024-04-19  6:13 ` [PATCH 4/5] ARM: i.MX8MP: don't reparent GIC from BootROM default Ahmad Fatoum
2024-04-22  8:52   ` Lucas Stach
2024-04-19  6:13 ` [PATCH 5/5] ARM: dts: i.MX8MP: Add optional nominal drive mode DTSI Ahmad Fatoum
2024-04-22  8:54   ` Lucas Stach

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