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X-BeenThere: barebox@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "barebox" X-SA-Exim-Connect-IP: 2607:7c80:54:3::133 X-SA-Exim-Mail-From: barebox-bounces+lore=pengutronix.de@lists.infradead.org X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on metis.whiteo.stw.pengutronix.de X-Spam-Level: X-Spam-Status: No, score=-5.2 required=4.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,RCVD_IN_DNSWL_MED,SPF_HELO_NONE,SPF_NONE, T_SCC_BODY_TEXT_LINE autolearn=unavailable autolearn_force=no version=3.4.2 Subject: [PATCH 3/5] kvx: robustify i/d cache startup X-SA-Exim-Version: 4.2.1 (built Wed, 08 May 2019 21:11:16 +0000) X-SA-Exim-Scanned: Yes (on metis.whiteo.stw.pengutronix.de) From: Julian Hascoet Make sure the i/d caches start clean after enabling them. Also, make sure there are no outstanding loads and/or stores before enabling them. This might fix incoherency issues between caches and memory during the boot of barebox. Signed-off-by: Julien Hascoet Signed-off-by: Julian Vetter Reviewed-by: Yann Sionneau Reviewed-by: Jonathan Borne --- arch/kvx/cpu/start.S | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/arch/kvx/cpu/start.S b/arch/kvx/cpu/start.S index 342c7d38a5..853676a836 100644 --- a/arch/kvx/cpu/start.S +++ b/arch/kvx/cpu/start.S @@ -50,10 +50,21 @@ ENTRY(kvx_start) ;; /* Setup default processor status */ make $r25 = PS_WFXL_START_VALUE + /* Make sure there is no outstanding + * load(s)/store(s) before dcache enable + */ + fence ;; wfxl $ps, $r25 ;; + /* Make sure icache starts clean */ + i1inval + ;; + barrier + ;; make $r25 = PCR_WFXM_START_VALUE + /* Make sure dcache starts clean */ + d1inval ;; wfxm $pcr, $r25 ;; -- 2.34.1