[PATCH v2] net: designware-imx: add fix_reset callback

[Steffen Trumtrar <s.trumtrar@pengutronix.de>]

The i.MX93 needs to set the RMII speed to successfully reset. Add a
callback that does this inspired by the linux patch:

    net: stmmac: dwmac-imx: use platform specific reset for imx93 SoCs
    commit b536f32b5b034f592df0f0ba129ad59fa0f3e532

    net: stmmac: dwmac-imx: use platform specific reset for imx93 SoCs

    The patch addresses an issue with the reset logic on the i.MX93 SoC, which
    requires configuration of the correct interface speed under RMII mode to
    complete the reset. The patch implements a fix_soc_reset function and uses
    it specifically for the i.MX93 SoCs.

Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
---
Changes in v2:
- dropped TX_CLK patch from series
- Link to v1: https://lore.barebox.org/20240417-v2024-03-0-topic-imx93-designware-imx-v1-0-c532c18f9ba5@pengutronix.de
---
 drivers/net/designware_eqos.c |  3 +++
 drivers/net/designware_eqos.h |  1 +
 drivers/net/designware_imx.c  | 21 +++++++++++++++++++++
 3 files changed, 25 insertions(+)

diff --git a/drivers/net/designware_eqos.c b/drivers/net/designware_eqos.c
index ccce51b6af..4a97cbb75e 100644
--- a/drivers/net/designware_eqos.c
+++ b/drivers/net/designware_eqos.c
@@ -431,6 +431,9 @@ static int eqos_start(struct eth_device *edev)
 	 */
 	setbits_le32(&eqos->dma_regs->mode, EQOS_DMA_MODE_SWR);
 
+	if (eqos->ops->fix_reset)
+		eqos->ops->fix_reset(eqos, &eqos->mac_regs->config);
+
 	ret = readl_poll_timeout(&eqos->dma_regs->mode, mode_set,
 				 !(mode_set & EQOS_DMA_MODE_SWR),
 				 100 * USEC_PER_MSEC);
diff --git a/drivers/net/designware_eqos.h b/drivers/net/designware_eqos.h
index 951565e8f9..9f2fc2fe6d 100644
--- a/drivers/net/designware_eqos.h
+++ b/drivers/net/designware_eqos.h
@@ -14,6 +14,7 @@ struct eqos_ops {
 	int (*get_ethaddr)(struct eth_device *dev, unsigned char *mac);
 	int (*set_ethaddr)(struct eth_device *edev, const unsigned char *mac);
 	void (*adjust_link)(struct eth_device *edev);
+	void (*fix_reset)(struct eqos *, unsigned int *reg);
 	unsigned long (*get_csr_clk_rate)(struct eqos *);
 
 	bool enh_desc;
diff --git a/drivers/net/designware_imx.c b/drivers/net/designware_imx.c
index c281d3b64b..ab60d98298 100644
--- a/drivers/net/designware_imx.c
+++ b/drivers/net/designware_imx.c
@@ -24,8 +24,11 @@
 #define MX93_GPR_ENET_QOS_INTF_SEL_RGMII	(0x1 << 1)
 #define MX93_GPR_ENET_QOS_CLK_GEN_EN		(0x1 << 0)
 
+#define RMII_RESET_SPEED			(0x3 << 14)
+
 struct eqos_imx_soc_data {
 	int (*set_interface_mode)(struct eqos *eqos);
+	void (*fix_soc_reset)(struct eqos *eqos, u32 *mac_regs);
 	bool mac_rgmii_txclk_auto_adj;
 };
 
@@ -82,6 +85,22 @@ static int eqos_set_txclk(struct eqos *eqos, int speed)
 	return ret;
 }
 
+static void eqos_fix_reset(struct eqos *eqos, u32 *reg)
+{
+	struct eqos_imx_priv *priv = eqos->priv;
+
+	if (priv->soc_data->fix_soc_reset)
+		priv->soc_data->fix_soc_reset(eqos, reg);
+}
+
+static void eqos_imx93_reset(struct eqos *eqos, u32 *mac_reg)
+{
+	if (eqos->interface == PHY_INTERFACE_MODE_RMII) {
+		udelay(200);
+		setbits_le32(mac_reg, RMII_RESET_SPEED);
+	}
+}
+
 static void eqos_adjust_link_imx(struct eth_device *edev)
 {
 	struct eqos *eqos = edev->priv;
@@ -184,6 +203,7 @@ static struct eqos_ops imx_ops = {
 	.set_ethaddr = eqos_set_ethaddr,
 	.adjust_link = eqos_adjust_link_imx,
 	.get_csr_clk_rate = eqos_get_csr_clk_rate_imx,
+	.fix_reset = eqos_fix_reset,
 
 	.clk_csr = EQOS_MDIO_ADDR_CR_250_300,
 	.config_mac = EQOS_MAC_RXQ_CTRL0_RXQ0EN_ENABLED_DCB,
@@ -240,6 +260,7 @@ static void eqos_remove_imx(struct device *dev)
 
 static struct eqos_imx_soc_data imx93_soc_data = {
 	.set_interface_mode = eqos_imx93_set_interface_mode,
+	.fix_soc_reset = eqos_imx93_reset,
 	.mac_rgmii_txclk_auto_adj = true,
 };
 

---
base-commit: bafdf4b35d777d159ac4058efc86d36622ce5ccf
change-id: 20240417-v2024-03-0-topic-imx93-designware-imx-825d80e68fb7

Best regards,
-- 
Steffen Trumtrar <s.trumtrar@pengutronix.de>