From: Sascha Hauer <s.hauer@pengutronix.de>
To: "open list:BAREBOX" <barebox@lists.infradead.org>
Subject: [PATCH 7/9] ARM: Layerscape: TQMLS1046a: Switch to TF-A support
Date: Mon, 21 Oct 2024 09:21:21 +0200 [thread overview]
Message-ID: <20241021-arm-layerscape-tfa-v1-7-0980697b6f66@pengutronix.de> (raw)
In-Reply-To: <20241021-arm-layerscape-tfa-v1-0-0980697b6f66@pengutronix.de>
Now that we can start TF-A on LS1046a based boards switch the TQMLS1046a
over to use this rather than deprecated PPA.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
arch/arm/boards/tqmls1046a/board.c | 8 ++++----
arch/arm/boards/tqmls1046a/lowlevel.c | 32 ++++++++++++++++++++++++++++++--
arch/arm/boards/tqmls1046a/start.S | 14 +++++++++++++-
3 files changed, 47 insertions(+), 7 deletions(-)
diff --git a/arch/arm/boards/tqmls1046a/board.c b/arch/arm/boards/tqmls1046a/board.c
index df49d0f780..99344e6e95 100644
--- a/arch/arm/boards/tqmls1046a/board.c
+++ b/arch/arm/boards/tqmls1046a/board.c
@@ -15,9 +15,9 @@
static void ls1046a_add_memory(void)
{
+ struct resource *res;
u32 cs0_bnds;
unsigned long long memsize, lower, upper;
- int ret;
cs0_bnds = in_be32(LS1046A_DDRC_BASE);
switch (cs0_bnds) {
@@ -41,9 +41,9 @@ static void ls1046a_add_memory(void)
arm_add_mem_device("ram1", 0x880000000, upper);
}
- ret = ls1046a_ppa_init(0x100000000 - SZ_64M, SZ_64M);
- if (ret)
- pr_err("Failed to initialize PPA firmware: %s\n", strerror(-ret));
+ res = reserve_sdram_region("tfa", 0xfbe00000, 0x4200000);
+
+ of_register_fixup(of_fixup_reserved_memory, res);
}
static int tqmls1046a_postcore_init(void)
diff --git a/arch/arm/boards/tqmls1046a/lowlevel.c b/arch/arm/boards/tqmls1046a/lowlevel.c
index 5ccafb2d77..e139fe19a1 100644
--- a/arch/arm/boards/tqmls1046a/lowlevel.c
+++ b/arch/arm/boards/tqmls1046a/lowlevel.c
@@ -300,15 +300,41 @@ static int tqmls1046a_get_variant(void)
return variant;
}
+static struct dram_regions_info dram_info_2g = {
+ .num_dram_regions = 1,
+ .total_dram_size = SZ_2G,
+ .region = {
+ {
+ .addr = SZ_2G,
+ .size = SZ_2G,
+ },
+ },
+};
+
+static struct dram_regions_info dram_info_8g = {
+ .num_dram_regions = 2,
+ .total_dram_size = SZ_8G,
+ .region = {
+ {
+ .addr = SZ_2G,
+ .size = SZ_2G,
+ }, {
+ .addr = SZ_32G + SZ_2G,
+ .size = SZ_4G + SZ_2G,
+ },
+ },
+};
+
extern char __dtb_z_fsl_ls1046a_tqmls1046a_mbls10xxa_start[];
static noinline __noreturn void tqmls1046a_r_entry(bool is_8g)
{
unsigned long membase = LS1046A_DDR_SDRAM_BASE;
int board_variant = 0;
+ struct dram_regions_info *dram_info;
if (get_pc() >= membase)
- barebox_arm_entry(membase, 0x80000000 - SZ_64M,
+ barebox_arm_entry(membase, 0x80000000 - SZ_128M,
__dtb_z_fsl_ls1046a_tqmls1046a_mbls10xxa_start);
arm_cpu_lowlevel_init();
@@ -321,17 +347,19 @@ static noinline __noreturn void tqmls1046a_r_entry(bool is_8g)
if (is_8g) {
board_variant = tqmls1046a_get_variant();
+ dram_info = &dram_info_8g;
if (board_variant == TQ_VARIANT_TQMLS1046A_CA)
fsl_ddr_set_memctl_regs(&tqmls1046a_ddrc_8g_ca[0], 0, false);
else
fsl_ddr_set_memctl_regs(&tqmls1046a_ddrc_8g[0], 0, false);
} else {
+ dram_info = &dram_info_2g;
fsl_ddr_set_memctl_regs(&tqmls1046a_ddrc[0], 0, false);
}
ls1046a_errata_post_ddr();
- ls1046a_xload_start_image(NULL);
+ ls1046a_xload_start_image(dram_info);
pr_err("Booting failed\n");
diff --git a/arch/arm/boards/tqmls1046a/start.S b/arch/arm/boards/tqmls1046a/start.S
index 84c4626880..c812a35768 100644
--- a/arch/arm/boards/tqmls1046a/start.S
+++ b/arch/arm/boards/tqmls1046a/start.S
@@ -1,8 +1,13 @@
/* SPDX-License-Identifier: GPL-2.0-or-later */
#include <linux/linkage.h>
#include <asm/barebox-arm64.h>
+#include <asm/assembler64.h>
-#define STACK_TOP 0x10020000
+/*
+ * OCRAM is occupied by TF-A, so in EL2 and EL1 use a temporary stack in SDRAM
+ */
+#define STACK_TOP 0x10020000
+#define STACK_TOP_TMP_SDRAM 0x90000000
ENTRY_PROC(start_tqmls1046a)
mov x3, #STACK_TOP
@@ -11,7 +16,14 @@ ENTRY_PROC(start_tqmls1046a)
ENTRY_PROC_END(start_tqmls1046a)
ENTRY_PROC(start_tqmls1046a_8g)
+ switch_el x3, 3f, 2f, 1f
+3:
mov x3, #STACK_TOP
mov sp, x3
b tqmls1046a_8g_entry
+2:
+1:
+ mov x3, STACK_TOP_TMP_SDRAM
+ mov sp, x3
+ b tqmls1046a_8g_entry
ENTRY_PROC_END(start_tqmls1046a_8g)
--
2.39.5
next prev parent reply other threads:[~2024-10-21 8:30 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-10-21 7:21 [PATCH 0/9] ARM: Layerscape: LS1046a: switch to TF-A Sascha Hauer
2024-10-21 7:21 ` [PATCH 1/9] ARM: Layerscape: TQMLS1046a: Update DDR timings Sascha Hauer
2024-10-21 7:21 ` [PATCH 2/9] ARM: Layerscape: TQMLS1046a: add support for 8GiB variant Sascha Hauer
2024-10-21 9:06 ` Ahmad Fatoum
2024-10-21 11:20 ` Sascha Hauer
2024-10-21 11:20 ` Ahmad Fatoum
2024-10-21 7:21 ` [PATCH 3/9] ARM: Layerscape: ls1046ardb: remove unused variable Sascha Hauer
2024-10-21 7:21 ` [PATCH 4/9] ARM: Layerscape: remove register arguments Sascha Hauer
2024-10-21 7:21 ` [PATCH 5/9] ARM: Layerscape: LS1046a: add TF-A support Sascha Hauer
2024-10-21 9:12 ` Ahmad Fatoum
2024-10-21 7:21 ` [PATCH 6/9] ARM: Layerscape: LS1046a-rdb: Switch to " Sascha Hauer
2024-10-21 7:21 ` Sascha Hauer [this message]
2024-10-21 7:21 ` [PATCH 8/9] ARM: Layerscape: LS1046a: remove PPA support Sascha Hauer
2024-10-21 8:55 ` Ahmad Fatoum
2024-10-21 14:18 ` Sascha Hauer
2024-10-22 7:46 ` Sascha Hauer
2024-10-21 7:21 ` [PATCH 9/9] ARM: Layerscape: LS1046a: add PSCI node Sascha Hauer
2024-10-21 7:33 ` Ahmad Fatoum
2024-10-21 7:57 ` Sascha Hauer
2024-10-21 8:02 ` Ahmad Fatoum
2024-10-21 8:03 ` Ahmad Fatoum
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