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From: Sascha Hauer <s.hauer@pengutronix.de>
To: "open list:BAREBOX" <barebox@lists.infradead.org>
Subject: [PATCH v2 08/12] ARM: Layerscape: LS1046a-rdb: Switch to TF-A support
Date: Tue, 22 Oct 2024 09:46:32 +0200	[thread overview]
Message-ID: <20241022-arm-layerscape-tfa-v2-8-69ac70ceb0ff@pengutronix.de> (raw)
In-Reply-To: <20241022-arm-layerscape-tfa-v2-0-69ac70ceb0ff@pengutronix.de>

Now that we can start TF-A on LS1046a based boards switch the LS1046ardb
over to use this rather than deprecated PPA.

Unlike the PPA the TF-A needs information about the amount of SDRAM
installed on the board. The LS1046a-rdb has a DDR4 DIMM connector, so
the SDRAM configuration must be runtime detected. The board support has
8GiB hardcoded in other places, so hardcode 8GiB for TF-A as well.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
 arch/arm/boards/ls1046ardb/board.c    |  6 ------
 arch/arm/boards/ls1046ardb/lowlevel.c | 16 +++++++++++++++-
 arch/arm/boards/ls1046ardb/start.S    | 14 +++++++++++++-
 3 files changed, 28 insertions(+), 8 deletions(-)

diff --git a/arch/arm/boards/ls1046ardb/board.c b/arch/arm/boards/ls1046ardb/board.c
index ee70171ca3..507fb0bfe1 100644
--- a/arch/arm/boards/ls1046ardb/board.c
+++ b/arch/arm/boards/ls1046ardb/board.c
@@ -133,18 +133,12 @@ late_initcall(rdb_late_init);
 
 static int rdb_mem_init(void)
 {
-	int ret;
-
 	if (!of_machine_is_compatible("fsl,ls1046a-rdb"))
 		return 0;
 
 	arm_add_mem_device("ram0", 0x80000000, 0x80000000);
 	arm_add_mem_device("ram1", 0x880000000, 3ULL * SZ_2G);
 
-	ret = ls1046a_ppa_init(0x100000000 - SZ_64M, SZ_64M);
-	if (ret)
-		pr_err("Failed to initialize PPA firmware: %s\n", strerror(-ret));
-
 	return 0;
 }
 mem_initcall(rdb_mem_init);
diff --git a/arch/arm/boards/ls1046ardb/lowlevel.c b/arch/arm/boards/ls1046ardb/lowlevel.c
index bcc95cc59d..7965e84a34 100644
--- a/arch/arm/boards/ls1046ardb/lowlevel.c
+++ b/arch/arm/boards/ls1046ardb/lowlevel.c
@@ -184,6 +184,20 @@ static struct fsl_ddr_info ls1046a_info = {
 	.c = ddrc,
 };
 
+static struct dram_regions_info dram_info = {
+	.num_dram_regions = 2,
+	.total_dram_size = SZ_8G,
+	.region = {
+		{
+			.addr = SZ_2G,
+			.size = SZ_2G,
+		}, {
+			.addr = SZ_32G + SZ_2G,
+			.size = SZ_4G + SZ_2G,
+		},
+	},
+};
+
 static noinline __noreturn void ls1046ardb_r_entry(void)
 {
 	unsigned long membase = LS1046A_DDR_SDRAM_BASE;
@@ -210,7 +224,7 @@ static noinline __noreturn void ls1046ardb_r_entry(void)
 
 	ls1046a_errata_post_ddr();
 
-	ls1046a_esdhc_start_image(NULL);
+	ls1046a_esdhc_start_image(&dram_info);
 
 err:
 	pr_err("Booting failed\n");
diff --git a/arch/arm/boards/ls1046ardb/start.S b/arch/arm/boards/ls1046ardb/start.S
index 466782b278..571fa78163 100644
--- a/arch/arm/boards/ls1046ardb/start.S
+++ b/arch/arm/boards/ls1046ardb/start.S
@@ -1,11 +1,23 @@
 /* SPDX-License-Identifier: GPL-2.0-or-later */
 #include <linux/linkage.h>
 #include <asm/barebox-arm64.h>
+#include <asm/assembler64.h>
 
-#define STACK_TOP 0x10020000
+/*
+ * OCRAM is occupied by TF-A, so in EL2 and EL1 use a temporary stack in SDRAM
+ */
+#define STACK_TOP		0x10020000
+#define STACK_TOP_TMP_SDRAM	0x90000000
 
 ENTRY_PROC(start_ls1046ardb)
+	switch_el x3, 3f, 2f, 1f
+3:
 	mov x3, #STACK_TOP
 	mov sp, x3
 	b ls1046ardb_entry
+2:
+1:
+	mov x3, STACK_TOP_TMP_SDRAM
+	mov sp, x3
+	b ls1046ardb_entry
 ENTRY_PROC_END(start_ls1046ardb)

-- 
2.39.5




  parent reply	other threads:[~2024-10-22  7:49 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-10-22  7:46 [PATCH v2 00/12] ARM: Layerscape: LS1046a: switch to TF-A Sascha Hauer
2024-10-22  7:46 ` [PATCH v2 01/12] ARM: Layerscape: TQMLS1046a: Update DDR timings Sascha Hauer
2024-10-22  7:46 ` [PATCH v2 02/12] ARM: Layerscape: images: fix variable name Sascha Hauer
2024-10-22  7:46 ` [PATCH v2 03/12] ARM: Layerscape: images: add missing FORCE Sascha Hauer
2024-10-22  7:46 ` [PATCH v2 04/12] ARM: Layerscape: TQMLS1046a: add support for 8GiB variant Sascha Hauer
2024-10-22  7:46 ` [PATCH v2 05/12] ARM: Layerscape: ls1046ardb: remove unused variable Sascha Hauer
2024-10-22  7:46 ` [PATCH v2 06/12] ARM: Layerscape: remove register arguments Sascha Hauer
2024-10-22  7:46 ` [PATCH v2 07/12] ARM: Layerscape: LS1046a: add TF-A support Sascha Hauer
2024-10-22  7:46 ` Sascha Hauer [this message]
2024-10-22  7:46 ` [PATCH v2 09/12] ARM: Layerscape: TQMLS1046a: Switch to " Sascha Hauer
2024-10-22  7:46 ` [PATCH v2 10/12] ARM: Layerscape: LS1046a: remove PPA support Sascha Hauer
2024-10-22  7:46 ` [PATCH v2 11/12] ARM: Layerscape: LS1046a: add PSCI node Sascha Hauer
2024-10-22  7:46 ` [PATCH v2 12/12] ARM: Layerscape: Update Documentation for TF-A Sascha Hauer
2024-10-22  8:16   ` Ahmad Fatoum
2024-10-23 12:42 ` [PATCH v2 00/12] ARM: Layerscape: LS1046a: switch to TF-A Sascha Hauer

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