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Fri, 29 Nov 2024 12:44:25 +0100 Received: from localhost ([::1] helo=dude02.red.stw.pengutronix.de) by dude02.red.stw.pengutronix.de with esmtp (Exim 4.96) (envelope-from ) id 1tGzQ9-000vyS-2B; Fri, 29 Nov 2024 12:44:25 +0100 From: Sascha Hauer Date: Fri, 29 Nov 2024 12:44:19 +0100 MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20241129-k3-r5-v1-4-67c4bb42a5c7@pengutronix.de> References: <20241129-k3-r5-v1-0-67c4bb42a5c7@pengutronix.de> In-Reply-To: <20241129-k3-r5-v1-0-67c4bb42a5c7@pengutronix.de> To: "open list:BAREBOX" X-Mailer: b4 0.12.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1732880665; l=1974; i=s.hauer@pengutronix.de; s=20230412; h=from:subject:message-id; bh=fx/NQB3v6H9K+NPAKX7S9rFnQQGF590nrZURalXdRaw=; b=1VFXfjPEVHomj/SjfxyQBYcuYM67iLQiADtQpirMC7Obyyn9ysDtjl9u/r6gj2e5IkFD9D/Mb LQig/0lTwabBfWBR+LnXWchd5s4eGAFhwaXgab+1tOTp0ZbtPsttuup X-Developer-Key: i=s.hauer@pengutronix.de; a=ed25519; pk=4kuc9ocmECiBJKWxYgqyhtZOHj5AWi7+d0n/UjhkwTg= X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20241129_114434_539293_9DA19BDD X-CRM114-Status: GOOD ( 11.00 ) X-BeenThere: barebox@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "barebox" X-SA-Exim-Connect-IP: 2607:7c80:54:3::133 X-SA-Exim-Mail-From: barebox-bounces+lore=pengutronix.de@lists.infradead.org X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on metis.whiteo.stw.pengutronix.de X-Spam-Level: X-Spam-Status: No, score=-5.2 required=4.0 tests=AWL,BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,RCVD_IN_DNSWL_MED,SPF_HELO_NONE,SPF_NONE autolearn=unavailable autolearn_force=no version=3.4.2 Subject: [PATCH 04/20] ARM: move ARM_CPU_PART_* defines to header X-SA-Exim-Version: 4.2.1 (built Wed, 08 May 2019 21:11:16 +0000) X-SA-Exim-Scanned: Yes (on metis.whiteo.stw.pengutronix.de) Move the ARM_CPU_PART_* defines to arch/arm/include/asm/cputype.h where they are located in Linux as well so they become reusable by other code. Signed-off-by: Sascha Hauer --- arch/arm/cpu/cpuinfo.c | 11 +---------- arch/arm/include/asm/cputype.h | 11 +++++++++++ 2 files changed, 12 insertions(+), 10 deletions(-) diff --git a/arch/arm/cpu/cpuinfo.c b/arch/arm/cpu/cpuinfo.c index 7dca57248b..3137b9924f 100644 --- a/arch/arm/cpu/cpuinfo.c +++ b/arch/arm/cpu/cpuinfo.c @@ -10,6 +10,7 @@ #include #include #include +#include #define CPU_ARCH_UNKNOWN 0 #define CPU_ARCH_ARMv3 1 @@ -23,16 +24,6 @@ #define CPU_ARCH_ARMv7 9 #define CPU_ARCH_ARMv8 10 -#define ARM_CPU_PART_CORTEX_A5 0xC050 -#define ARM_CPU_PART_CORTEX_A7 0xC070 -#define ARM_CPU_PART_CORTEX_A8 0xC080 -#define ARM_CPU_PART_CORTEX_A9 0xC090 -#define ARM_CPU_PART_CORTEX_A15 0xC0F0 -#define ARM_CPU_PART_CORTEX_A53 0xD030 -#define ARM_CPU_PART_CORTEX_A55 0xD050 -#define ARM_CPU_PART_CORTEX_A57 0xD070 -#define ARM_CPU_PART_CORTEX_A72 0xD080 - static void decode_cache(unsigned long size) { int linelen = 1 << ((size & 0x3) + 3); diff --git a/arch/arm/include/asm/cputype.h b/arch/arm/include/asm/cputype.h index c3fc057650..38012fb1ec 100644 --- a/arch/arm/include/asm/cputype.h +++ b/arch/arm/include/asm/cputype.h @@ -117,4 +117,15 @@ static inline int cpu_is_xsc3(void) #define cpu_is_xscale() 1 #endif +#define ARM_CPU_PART_CORTEX_A5 0xC050 +#define ARM_CPU_PART_CORTEX_A7 0xC070 +#define ARM_CPU_PART_CORTEX_A8 0xC080 +#define ARM_CPU_PART_CORTEX_A9 0xC090 +#define ARM_CPU_PART_CORTEX_A15 0xC0F0 +#define ARM_CPU_PART_CORTEX_A53 0xD030 +#define ARM_CPU_PART_CORTEX_A55 0xD050 +#define ARM_CPU_PART_CORTEX_A57 0xD070 +#define ARM_CPU_PART_CORTEX_A72 0xD080 +#define ARM_CPU_PART_CORTEX_R5 0xc150 + #endif -- 2.39.5