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From: Sascha Hauer <s.hauer@pengutronix.de>
To: "open list:BAREBOX" <barebox@lists.infradead.org>
Subject: [PATCH 05/20] nommu_v7_vectors_init: disable for r5
Date: Fri, 29 Nov 2024 12:44:20 +0100	[thread overview]
Message-ID: <20241129-k3-r5-v1-5-67c4bb42a5c7@pengutronix.de> (raw)
In-Reply-To: <20241129-k3-r5-v1-0-67c4bb42a5c7@pengutronix.de>

Some ARMv7 cores like the Cortex-R5 do not have a VBAR register for
setting up the vector table. This patch disables the vector table
setup specifically for the Cortex-R5.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
 arch/arm/cpu/no-mmu.c | 20 ++++++++++++++++++++
 1 file changed, 20 insertions(+)

diff --git a/arch/arm/cpu/no-mmu.c b/arch/arm/cpu/no-mmu.c
index be3cfaf12b..c4ef5d1f9d 100644
--- a/arch/arm/cpu/no-mmu.c
+++ b/arch/arm/cpu/no-mmu.c
@@ -19,9 +19,26 @@
 #include <asm/system_info.h>
 #include <debug_ll.h>
 #include <asm/sections.h>
+#include <asm/cputype.h>
 
 #define __exceptions_size (__exceptions_stop - __exceptions_start)
 
+static bool has_vbar(void)
+{
+	u32 mainid;
+
+	__asm__ __volatile__(
+		"mrc    p15, 0, %0, c0, c0, 0   @ read control reg\n"
+		: "=r" (mainid)
+		:
+		: "memory");
+
+	if ((mainid & 0xfff0) == ARM_CPU_PART_CORTEX_R5)
+		return false;
+
+	return true;
+}
+
 static int nommu_v7_vectors_init(void)
 {
 	void *vectors;
@@ -30,6 +47,9 @@ static int nommu_v7_vectors_init(void)
 	if (cpu_architecture() < CPU_ARCH_ARMv7)
 		return 0;
 
+	if (!has_vbar())
+		return 0;
+
 	/*
 	 * High vectors cannot be re-mapped, so we have to use normal
 	 * vectors

-- 
2.39.5




  parent reply	other threads:[~2024-11-29 12:52 UTC|newest]

Thread overview: 21+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-11-29 11:44 [PATCH 00/20] ARM: K3: Add R5 boot support Sascha Hauer
2024-11-29 11:44 ` [PATCH 01/20] ARM: add ARMv7R MPU support Sascha Hauer
2024-11-29 11:44 ` [PATCH 02/20] lib/rationale: compile for pbl Sascha Hauer
2024-11-29 11:44 ` [PATCH 03/20] DDR: Add k3 DDR driver Sascha Hauer
2024-11-29 11:44 ` [PATCH 04/20] ARM: move ARM_CPU_PART_* defines to header Sascha Hauer
2024-11-29 11:44 ` Sascha Hauer [this message]
2024-11-29 11:44 ` [PATCH 06/20] clocksource: timer-ti-dm: add support for K3 SoCs Sascha Hauer
2024-11-29 11:44 ` [PATCH 07/20] ARM: K3: mount /boot even with env handling disabled Sascha Hauer
2024-11-29 11:44 ` [PATCH 08/20] clk: add K3 clk driver Sascha Hauer
2024-11-29 11:44 ` [PATCH 09/20] pmdomain: add K3 driver Sascha Hauer
2024-11-29 11:44 ` [PATCH 10/20] rproc: add K3 arm64 rproc driver Sascha Hauer
2024-11-29 11:44 ` [PATCH 11/20] ARM: k3: add k3_debug_ll_init() Sascha Hauer
2024-11-29 11:44 ` [PATCH 12/20] ARM: K3: use debug_ll code for regular PBL console Sascha Hauer
2024-11-29 11:44 ` [PATCH 13/20] elf: use iomem regions as fallback when loading to non-sdram memory Sascha Hauer
2024-11-29 11:44 ` [PATCH 14/20] rproc: add K3 system_controller Sascha Hauer
2024-11-29 11:44 ` [PATCH 15/20] firmware: ti_sci: add function to get global handle Sascha Hauer
2024-11-29 11:44 ` [PATCH 16/20] ARM: k3: Add initial r5 support Sascha Hauer
2024-11-29 11:44 ` [PATCH 17/20] ARM: k3: Add k3img tool Sascha Hauer
2024-11-29 11:44 ` [PATCH 18/20] ARM: beagleplay: add binary files Sascha Hauer
2024-11-29 11:44 ` [PATCH 19/20] ARM: beagleplay: add Cortex-R5 boot support Sascha Hauer
2024-11-29 11:44 ` [PATCH 20/20] Documentation: add build documentation for TI K3 SoCs Sascha Hauer

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