From: Alexander Shiyan <eagle.alexander923@gmail.com>
To: barebox@lists.infradead.org
Cc: Alexander Shiyan <eagle.alexander923@gmail.com>
Subject: [PATCH 4/5] ARM: at91: sama5: Unify xx_start_image() calls
Date: Tue, 18 Mar 2025 10:43:26 +0300 [thread overview]
Message-ID: <20250318074327.37730-4-eagle.alexander923@gmail.com> (raw)
In-Reply-To: <20250318074327.37730-1-eagle.alexander923@gmail.com>
This unifies the xload.c start_image() code for both sama5d2() and
sama5d3() CPU variants.
Signed-off-by: Alexander Shiyan <eagle.alexander923@gmail.com>
---
.../arm/boards/sama5d27-giantboard/lowlevel.c | 2 +-
arch/arm/boards/sama5d27-som1/lowlevel.c | 2 +-
arch/arm/mach-at91/xload.c | 102 ++++++++++--------
include/mach/at91/xload.h | 2 +-
4 files changed, 62 insertions(+), 46 deletions(-)
diff --git a/arch/arm/boards/sama5d27-giantboard/lowlevel.c b/arch/arm/boards/sama5d27-giantboard/lowlevel.c
index 49540bede0..c266af6357 100644
--- a/arch/arm/boards/sama5d27-giantboard/lowlevel.c
+++ b/arch/arm/boards/sama5d27-giantboard/lowlevel.c
@@ -31,7 +31,7 @@ SAMA5D2_ENTRY_FUNCTION(start_sama5d27_giantboard_xload_mmc, r4)
sama5d2_udelay_init(MASTER_CLOCK);
sama5d2_d1g_ddrconf();
- sama5d2_sdhci_start_image(r4);
+ sama5d2_start_image(r4);
}
extern char __dtb_z_at91_sama5d27_giantboard_start[];
diff --git a/arch/arm/boards/sama5d27-som1/lowlevel.c b/arch/arm/boards/sama5d27-som1/lowlevel.c
index 67300587fe..e74502244b 100644
--- a/arch/arm/boards/sama5d27-som1/lowlevel.c
+++ b/arch/arm/boards/sama5d27-som1/lowlevel.c
@@ -55,7 +55,7 @@ SAMA5D2_ENTRY_FUNCTION(start_sama5d27_som1_ek_xload_mmc, r4)
ek_turn_led(RGB_LED_RED | RGB_LED_GREEN); /* Yellow */
sama5d2_udelay_init(MASTER_CLOCK);
sama5d2_d1g_ddrconf();
- sama5d2_sdhci_start_image(r4);
+ sama5d2_start_image(r4);
}
extern char __dtb_z_at91_sama5d27_som1_ek_start[];
diff --git a/arch/arm/mach-at91/xload.c b/arch/arm/mach-at91/xload.c
index 9c03d2119c..e417223b31 100644
--- a/arch/arm/mach-at91/xload.c
+++ b/arch/arm/mach-at91/xload.c
@@ -11,39 +11,50 @@
#include <asm/cache.h>
#include <pbl/bio.h>
-static void at91_fat_start_image(struct pbl_bio *bio,
- void *buf, unsigned int len,
- u32 r4)
+struct xload_instance {
+ void __iomem *base;
+ unsigned id;
+ u8 periph;
+ s8 pins[15];
+};
+
+static void at91_fat_start_image(struct pbl_bio *bio, u32 r4)
{
- void __noreturn (*bb)(void);
+ void *buf = (void *)SAMA5_DDRCS;
int ret;
- ret = pbl_fat_load(bio, "barebox.bin", buf, len);
+ ret = pbl_fat_load(bio, "barebox.bin", buf, SZ_2M);
if (ret < 0) {
pr_err("pbl_fat_load: error %d\n", ret);
return;
}
- bb = buf;
-
sync_caches_for_execution();
- sama5_boot_xload(bb, r4);
+ sama5_boot_xload(buf, r4);
}
-static const struct sdhci_instance {
- void __iomem *base;
- unsigned id;
- u8 periph;
- s8 pins[15];
-} sdhci_instances[] = {
+static const struct xload_instance sama5d2_mci_instances[] = {
[0] = {
- .base = SAMA5D2_BASE_SDHC0, .id = SAMA5D2_ID_SDMMC0, .periph = AT91_MUX_PERIPH_A,
- .pins = { 2, 3, 4, 5, 6, 7, 8, 9, 0, 1, 13, 10, 11, 12, -1 }
+ .base = SAMA5D2_BASE_SDHC0,
+ .id = SAMA5D2_ID_SDMMC0,
+ .periph = AT91_MUX_PERIPH_A,
+ .pins = {
+ AT91_PIN_PA2, AT91_PIN_PA3, AT91_PIN_PA4, AT91_PIN_PA5,
+ AT91_PIN_PA6, AT91_PIN_PA7, AT91_PIN_PA8, AT91_PIN_PA9,
+ AT91_PIN_PA0, AT91_PIN_PA1, AT91_PIN_PA13, AT91_PIN_PA10,
+ AT91_PIN_PA11, AT91_PIN_PA12, -1
+ }
},
[1] = {
- .base = SAMA5D2_BASE_SDHC1, .id = SAMA5D2_ID_SDMMC1, .periph = AT91_MUX_PERIPH_E,
- .pins = { 18, 19, 20, 21, 22, 28, 30, -1 }
+ .base = SAMA5D2_BASE_SDHC1,
+ .id = SAMA5D2_ID_SDMMC1,
+ .periph = AT91_MUX_PERIPH_E,
+ .pins = {
+ AT91_PIN_PA18, AT91_PIN_PA19, AT91_PIN_PA20,
+ AT91_PIN_PA21, AT91_PIN_PA22, AT91_PIN_PA28,
+ AT91_PIN_PA30, -1
+ }
},
};
@@ -51,25 +62,23 @@ static const struct sdhci_instance {
* sama5d2_sdhci_start_image - Load and start an image from FAT-formatted SDHCI
* @r4: value of r4 passed by BootROM
*/
-void __noreturn sama5d2_sdhci_start_image(u32 r4)
+static void __noreturn sama5d2_sdhci_start_image(u32 r4)
{
- void *buf = (void *)SAMA5_DDRCS;
- const struct sdhci_instance *instance;
+ const struct xload_instance *instance;
struct pbl_bio bio;
const s8 *pin;
int ret;
ret = sama5_bootsource_instance(r4);
- if (ret > 1)
+ if (ret > ARRAY_SIZE(sama5d2_mci_instances) - 1)
panic("Couldn't determine boot MCI instance\n");
- instance = &sdhci_instances[ret];
+ instance = &sama5d2_mci_instances[ret];
sama5d2_pmc_enable_periph_clock(SAMA5D2_ID_PIOA);
- for (pin = instance->pins; *pin >= 0; pin++) {
+ for (pin = instance->pins; *pin >= 0; pin++)
at91_mux_pio4_set_periph(SAMA5D2_BASE_PIOA,
BIT(*pin), instance->periph);
- }
sama5d2_pmc_enable_periph_clock(instance->id);
sama5d2_pmc_enable_generic_clock(instance->id, AT91_PMC_GCKCSS_UPLL_CLK, 1);
@@ -80,18 +89,26 @@ void __noreturn sama5d2_sdhci_start_image(u32 r4)
/* TODO: eMMC boot partition handling: they are not FAT-formatted */
- at91_fat_start_image(&bio, buf, SZ_16M, r4);
+ at91_fat_start_image(&bio, r4);
out_panic:
panic("FAT chainloading failed\n");
}
-static const struct atmci_instance {
- void __iomem *base;
- unsigned id;
- u8 periph;
- s8 pins[15];
-} sama5d3_atmci_instances[] = {
+void __noreturn sama5d2_start_image(u32 r4)
+{
+ switch (sama5_bootsource(r4)) {
+ case BOOTSOURCE_MMC:
+ sama5d2_sdhci_start_image(r4);
+ break;
+ default:
+ break;
+ }
+
+ panic("Unsupported boot configuration!\n");
+}
+
+static const struct xload_instance sama5d3_mci_instances[] = {
[0] = {
.base = IOMEM(SAMA5D3_BASE_HSMCI0),
.id = SAMA5D3_ID_HSMCI0,
@@ -99,30 +116,29 @@ static const struct atmci_instance {
.pins = {
AT91_PIN_PD0, AT91_PIN_PD1, AT91_PIN_PD2, AT91_PIN_PD3,
AT91_PIN_PD4, AT91_PIN_PD5, AT91_PIN_PD6, AT91_PIN_PD7,
- AT91_PIN_PD8, AT91_PIN_PD9, -1 }
+ AT91_PIN_PD8, AT91_PIN_PD9, -1
+ }
},
};
-void __noreturn sama5d3_atmci_start_image(u32 boot_src, unsigned int clock,
+void __noreturn sama5d3_atmci_start_image(u32 r4, unsigned int clock,
unsigned int slot)
{
- void *buf = (void *)SAMA5_DDRCS;
- const struct atmci_instance *instance;
+ const struct xload_instance *instance;
struct pbl_bio bio;
const s8 *pin;
int ret;
- ret = sama5_bootsource_instance(boot_src);
- if (ret > ARRAY_SIZE(sama5d3_atmci_instances) - 1)
+ ret = sama5_bootsource_instance(r4);
+ if (ret > ARRAY_SIZE(sama5d3_mci_instances) - 1)
panic("Couldn't determine boot MCI instance\n");
- instance = &sama5d3_atmci_instances[boot_src];
+ instance = &sama5d3_mci_instances[r4];
sama5d3_pmc_enable_periph_clock(SAMA5D3_ID_PIOD);
- for (pin = instance->pins; *pin >= 0; pin++) {
+ for (pin = instance->pins; *pin >= 0; pin++)
at91_mux_pio3_pin(IOMEM(SAMA5D3_BASE_PIOD),
- pin_to_mask(*pin), instance->periph, 0);
- }
+ pin_to_mask(*pin), instance->periph, 0);
sama5d3_pmc_enable_periph_clock(instance->id);
@@ -130,7 +146,7 @@ void __noreturn sama5d3_atmci_start_image(u32 boot_src, unsigned int clock,
if (ret)
goto out_panic;
- at91_fat_start_image(&bio, buf, SZ_16M, boot_src);
+ at91_fat_start_image(&bio, r4);
out_panic:
panic("FAT chainloading failed\n");
diff --git a/include/mach/at91/xload.h b/include/mach/at91/xload.h
index 2886490246..d5fc7596fd 100644
--- a/include/mach/at91/xload.h
+++ b/include/mach/at91/xload.h
@@ -6,7 +6,7 @@
#include <linux/compiler.h>
#include <pbl/bio.h>
-void __noreturn sama5d2_sdhci_start_image(u32 r4);
+void __noreturn sama5d2_start_image(u32 r4);
void __noreturn sama5d3_atmci_start_image(u32 r4, unsigned int clock,
unsigned int slot);
--
2.39.1
next prev parent reply other threads:[~2025-03-18 7:44 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-03-18 7:43 [PATCH 1/5] ARM: at91: Add PBL_BREAK support Alexander Shiyan
2025-03-18 7:43 ` [PATCH 2/5] ARM: at91: Merge sama5_boot_xload() asm code Alexander Shiyan
2025-03-18 7:43 ` [PATCH 3/5] ARM: at91: Rename xload-mmc.c Alexander Shiyan
2025-03-18 7:43 ` Alexander Shiyan [this message]
2025-03-18 10:55 ` [PATCH 4/5] ARM: at91: sama5: Unify xx_start_image() calls Sascha Hauer
2025-03-18 11:49 ` Alexander Shiyan
2025-03-18 7:43 ` [PATCH 5/5] ARM: at91: sama5d2: Add QSPI boot support Alexander Shiyan
2025-03-18 14:49 ` (subset) [PATCH 1/5] ARM: at91: Add PBL_BREAK support Sascha Hauer
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