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From: Ahmad Fatoum <a.fatoum@pengutronix.de>
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Subject: [PATCH 5/7] clk: gate: add bit_idx member as in Linux
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From: Ahmad Fatoum <a.fatoum@barebox.org>
Linux calls our shift bit_idx, but they are otherwise identical. Alias
them inside a union to make code a little bit easier to port.
Signed-off-by: Ahmad Fatoum <a.fatoum@barebox.org>
---
include/linux/clk.h | 27 ++++++++++++++++++++++++++-
1 file changed, 26 insertions(+), 1 deletion(-)
diff --git a/include/linux/clk.h b/include/linux/clk.h
index 9f4e97d37a3a..7ae4c48ca27f 100644
--- a/include/linux/clk.h
+++ b/include/linux/clk.h
@@ -685,10 +685,35 @@ unsigned int clk_mux_index_to_val(u32 *table, unsigned int flags, u8 index);
long clk_mux_round_rate(struct clk_hw *hw, unsigned long rate,
unsigned long *prate);
+/**
+ * struct clk_gate - gating clock
+ *
+ * @hw: handle between common and hardware-specific interfaces
+ * @reg: register controlling gate
+ * @bit_idx: single bit controlling gate
+ * @shift: Alias for @shift
+ * @flags: hardware-specific flags
+ * @lock: register lock
+ * @_parent: for barebox-internal use
+ *
+ * Clock which can gate its output. Implements .enable & .disable
+ *
+ * Flags:
+ * CLK_GATE_SET_TO_DISABLE - by default this clock sets the bit at bit_idx to
+ * enable the clock. Setting this flag does the opposite: setting the bit
+ * disable the clock and clearing it enables the clock
+ * CLK_GATE_HIWORD_MASK - The gate settings are only in lower 16-bit
+ * of this register, and mask of gate bits are in higher 16-bit of this
+ * register. While setting the gate bits, higher 16-bit should also be
+ * updated to indicate changing gate bits.
+ */
struct clk_gate {
struct clk_hw hw;
void __iomem *reg;
- int shift;
+ union {
+ u8 bit_idx;
+ u8 shift;
+ };
unsigned flags;
spinlock_t *lock;
const char *_parent;
--
2.39.5