From: Ahmad Fatoum <a.fatoum@pengutronix.de>
To: barebox@lists.infradead.org
Subject: [PATCH 6/7] clk: composite: change mux/rate/gate members to clk_hw
Date: Tue, 22 Apr 2025 09:56:36 +0200 [thread overview]
Message-ID: <20250422075637.220688-6-a.fatoum@pengutronix.de> (raw)
In-Reply-To: <20250422075637.220688-1-a.fatoum@pengutronix.de>
From: Ahmad Fatoum <a.fatoum@barebox.org>
In preparation for struct clk_composite being public API, change the
members to struct clk_hw type for compatibility with Linux.
Signed-off-by: Ahmad Fatoum <a.fatoum@barebox.org>
---
drivers/clk/clk-composite.c | 86 +++++++++++++++++--------------------
1 file changed, 39 insertions(+), 47 deletions(-)
diff --git a/drivers/clk/clk-composite.c b/drivers/clk/clk-composite.c
index fdf53ce75e62..f69d90e72b4f 100644
--- a/drivers/clk/clk-composite.c
+++ b/drivers/clk/clk-composite.c
@@ -14,9 +14,9 @@
struct clk_composite {
struct clk_hw hw;
- struct clk *mux_clk;
- struct clk *rate_clk;
- struct clk *gate_clk;
+ struct clk_hw *mux_hw;
+ struct clk_hw *rate_hw;
+ struct clk_hw *gate_hw;
};
#define to_clk_composite(_hw) container_of(_hw, struct clk_composite, hw)
@@ -24,30 +24,27 @@ struct clk_composite {
static int clk_composite_get_parent(struct clk_hw *hw)
{
struct clk_composite *composite = to_clk_composite(hw);
- struct clk *mux_clk = composite->mux_clk;
- struct clk_hw *mux_hw = clk_to_clk_hw(mux_clk);
+ struct clk_hw *mux_hw = composite->mux_hw;
- return mux_clk ? mux_clk->ops->get_parent(mux_hw) : 0;
+ return mux_hw ? mux_hw->clk.ops->get_parent(mux_hw) : 0;
}
static int clk_composite_set_parent(struct clk_hw *hw, u8 index)
{
struct clk_composite *composite = to_clk_composite(hw);
- struct clk *mux_clk = composite->mux_clk;
- struct clk_hw *mux_hw = clk_to_clk_hw(mux_clk);
+ struct clk_hw *mux_hw = composite->mux_hw;
- return mux_clk ? mux_clk->ops->set_parent(mux_hw, index) : 0;
+ return mux_hw ? mux_hw->clk.ops->set_parent(mux_hw, index) : 0;
}
static unsigned long clk_composite_recalc_rate(struct clk_hw *hw,
unsigned long parent_rate)
{
struct clk_composite *composite = to_clk_composite(hw);
- struct clk *rate_clk = composite->rate_clk;
- struct clk_hw *rate_hw = clk_to_clk_hw(rate_clk);
+ struct clk_hw *rate_hw = composite->rate_hw;
- if (rate_clk)
- return rate_clk->ops->recalc_rate(rate_hw, parent_rate);
+ if (rate_hw)
+ return rate_hw->clk.ops->recalc_rate(rate_hw, parent_rate);
return parent_rate;
}
@@ -56,17 +53,16 @@ static long clk_composite_round_rate(struct clk_hw *hw, unsigned long rate,
unsigned long *prate)
{
struct clk_composite *composite = to_clk_composite(hw);
- struct clk *rate_clk = composite->rate_clk;
- struct clk *mux_clk = composite->mux_clk;
- struct clk_hw *rate_hw = clk_to_clk_hw(rate_clk);
+ struct clk_hw *rate_hw = composite->rate_hw;
+ struct clk_hw *mux_hw = composite->mux_hw;
- if (rate_clk)
- return rate_clk->ops->round_rate(rate_hw, rate, prate);
+ if (rate_hw)
+ return rate_hw->clk.ops->round_rate(rate_hw, rate, prate);
if (!(hw->clk.flags & CLK_SET_RATE_NO_REPARENT) &&
- mux_clk &&
- mux_clk->ops->round_rate)
- return mux_clk->ops->round_rate(clk_to_clk_hw(mux_clk), rate, prate);
+ mux_hw &&
+ mux_hw->clk.ops->round_rate)
+ return mux_hw->clk.ops->round_rate(mux_hw, rate, prate);
return *prate;
}
@@ -75,29 +71,28 @@ static int clk_composite_set_rate(struct clk_hw *hw, unsigned long rate,
unsigned long parent_rate)
{
struct clk_composite *composite = to_clk_composite(hw);
- struct clk *rate_clk = composite->rate_clk;
- struct clk *mux_clk = composite->mux_clk;
- struct clk_hw *rate_hw = clk_to_clk_hw(rate_clk);
+ struct clk_hw *rate_hw = composite->rate_hw;
+ struct clk_hw *mux_hw = composite->mux_hw;
/*
* When the rate clock is present use that to set the rate,
* otherwise try the mux clock. We currently do not support
* to find the best rate using a combination of both.
*/
- if (rate_clk)
- return rate_clk->ops->set_rate(rate_hw, rate, parent_rate);
+ if (rate_hw)
+ return rate_hw->clk.ops->set_rate(rate_hw, rate, parent_rate);
if (!(hw->clk.flags & CLK_SET_RATE_NO_REPARENT) &&
- mux_clk &&
- mux_clk->ops->set_rate) {
+ mux_hw &&
+ mux_hw->clk.ops->set_rate) {
/*
* We'll call set_rate on the mux clk which in turn results
* in reparenting the mux clk. Make sure the enable count
* (which is stored in the composite clk, not the mux clk)
* is transferred correctly.
*/
- mux_clk->enable_count = hw->clk.enable_count;
- return mux_clk->ops->set_rate(clk_to_clk_hw(mux_clk), rate, parent_rate);
+ mux_hw->clk.enable_count = hw->clk.enable_count;
+ return mux_hw->clk.ops->set_rate(mux_hw, rate, parent_rate);
}
return 0;
@@ -106,29 +101,26 @@ static int clk_composite_set_rate(struct clk_hw *hw, unsigned long rate,
static int clk_composite_is_enabled(struct clk_hw *hw)
{
struct clk_composite *composite = to_clk_composite(hw);
- struct clk *gate_clk = composite->gate_clk;
- struct clk_hw *gate_hw = clk_to_clk_hw(gate_clk);
+ struct clk_hw *gate_hw = composite->gate_hw;
- return gate_clk ? gate_clk->ops->is_enabled(gate_hw) : 0;
+ return gate_hw ? gate_hw->clk.ops->is_enabled(gate_hw) : 0;
}
static int clk_composite_enable(struct clk_hw *hw)
{
struct clk_composite *composite = to_clk_composite(hw);
- struct clk *gate_clk = composite->gate_clk;
- struct clk_hw *gate_hw = clk_to_clk_hw(gate_clk);
+ struct clk_hw *gate_hw = composite->gate_hw;
- return gate_clk ? gate_clk->ops->enable(gate_hw) : 0;
+ return gate_hw ? gate_hw->clk.ops->enable(gate_hw) : 0;
}
static void clk_composite_disable(struct clk_hw *hw)
{
struct clk_composite *composite = to_clk_composite(hw);
- struct clk *gate_clk = composite->gate_clk;
- struct clk_hw *gate_hw = clk_to_clk_hw(gate_clk);
+ struct clk_hw *gate_hw = composite->gate_hw;
- if (gate_clk)
- gate_clk->ops->disable(gate_hw);
+ if (gate_hw)
+ gate_hw->clk.ops->disable(gate_hw);
}
static struct clk_ops clk_composite_ops = {
@@ -159,18 +151,18 @@ struct clk *clk_register_composite(const char *name,
composite->hw.clk.flags = flags;
composite->hw.clk.parent_names = parent_names;
composite->hw.clk.num_parents = num_parents;
- composite->mux_clk = mux_clk;
- composite->rate_clk = rate_clk;
- composite->gate_clk = gate_clk;
+ composite->mux_hw = clk_to_clk_hw(mux_clk);
+ composite->rate_hw = clk_to_clk_hw(rate_clk);
+ composite->gate_hw = clk_to_clk_hw(gate_clk);
ret = bclk_register(&composite->hw.clk);
if (ret)
goto err;
- if (composite->mux_clk) {
- composite->mux_clk->parents = composite->hw.clk.parents;
- composite->mux_clk->parent_names = composite->hw.clk.parent_names;
- composite->mux_clk->num_parents = composite->hw.clk.num_parents;
+ if (composite->mux_hw) {
+ composite->mux_hw->clk.parents = composite->hw.clk.parents;
+ composite->mux_hw->clk.parent_names = composite->hw.clk.parent_names;
+ composite->mux_hw->clk.num_parents = composite->hw.clk.num_parents;
}
return &composite->hw.clk;
--
2.39.5
next prev parent reply other threads:[~2025-04-22 8:39 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-04-22 7:56 [PATCH 1/7] clk: add compatibility for prepare/unprepare/is_prepared Ahmad Fatoum
2025-04-22 7:56 ` [PATCH 2/7] clk: mux: replace width member with mask as in Linux Ahmad Fatoum
2025-04-22 7:56 ` [PATCH 3/7] clk: mux: fix mask/width confusion in clk_hw_register_mux Ahmad Fatoum
2025-04-22 7:56 ` [PATCH 4/7] clk: gate: underscore-prefix barebox-specific parent member Ahmad Fatoum
2025-04-22 7:56 ` [PATCH 5/7] clk: gate: add bit_idx member as in Linux Ahmad Fatoum
2025-04-22 7:56 ` Ahmad Fatoum [this message]
2025-04-22 7:56 ` [PATCH 7/7] clk: move struct clk_composite definition to header Ahmad Fatoum
2025-04-22 9:18 ` [PATCH 1/7] clk: add compatibility for prepare/unprepare/is_prepared Sascha Hauer
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