Porting Cora Z7 Board to barebox

Porting Cora Z7 Board to barebox

[johannes]

I have a Cora Z7 board which I want to port to barebox. The Cora Z7 embeds an
Zynq 7000 SoC with a single core Cortex-A9 and 512 MB DDR3 memory. Barebox
already supports the Zynq 7000 and the Avnet Zedboard.

I have some questions and maybe you can point me in the right direction:

When I am compiling barebox with the zynq_defconfig, as an output I get the file
barebox-avnet-zedboard.img. This file contains the PBL, barebox proper and the
device tree, right?

The Cora Z7 uses a different memory configuration compared to the Zedboard. My
first idea was to use Xilinx FSBL and let the FSBL start barebox. The FSBL can
start an ELF file. But if I use just the compiled barebox file, the device tree
is missing, right? Is there a way to hard code the UART to use for the barebox
console for barebox proper?

The Zynq on the Cora Z7 only embeds a single core Cortex A9 while the SoC on the
Zedboard embeds a dual core Cortex A9. Does this affect the cores initialization
in arch/arm/mach_zynq? 

I am looking forward to your replies. 

Thank you and best regards,
Johannes Roith