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From: Ahmad Fatoum <a.fatoum@pengutronix.de>
To: barebox@lists.infradead.org
Cc: Ahmad Fatoum <a.fatoum@pengutronix.de>
Subject: [PATCH] fixup! net: add support for Designware XGMAC (10gb) ethernet
Date: Wed,  6 Aug 2025 14:22:59 +0200	[thread overview]
Message-ID: <20250806122259.650027-1-a.fatoum@pengutronix.de> (raw)

net: xgmac: fix COMPILE_TEST build

The socfpga_secure_reg_ helpers use SMC SIP calls and are only
compiled-on when CONFIG_ARCH_SOCFPGA_AGILEX5 is enabled.

Add stubs to fix sandbox allyes builds.

Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
---
 include/mach/socfpga/secure_reg_helper.h | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/include/mach/socfpga/secure_reg_helper.h b/include/mach/socfpga/secure_reg_helper.h
index d5a11122c723..3cac57b56f48 100644
--- a/include/mach/socfpga/secure_reg_helper.h
+++ b/include/mach/socfpga/secure_reg_helper.h
@@ -7,13 +7,22 @@
 #ifndef	_SECURE_REG_HELPER_H_
 #define	_SECURE_REG_HELPER_H_
 
+#include <linux/types.h>
+#include <linux/errno.h>
+
 #define SOCFPGA_SECURE_REG_SYSMGR_SOC64_SDMMC 1
 #define SOCFPGA_SECURE_REG_SYSMGR_SOC64_EMAC0 2
 #define SOCFPGA_SECURE_REG_SYSMGR_SOC64_EMAC1 3
 #define SOCFPGA_SECURE_REG_SYSMGR_SOC64_EMAC2 4
 
+#ifdef CONFIG_ARCH_SOCFPGA_AGILEX5
 int socfpga_secure_reg_read32(u32 id, u32 *val);
 int socfpga_secure_reg_write32(u32 id, u32 val);
 int socfpga_secure_reg_update32(u32 id, u32 mask, u32 val);
+#else
+static inline int socfpga_secure_reg_read32(u32 id, u32 *val) { return -ENOSYS; }
+static inline int socfpga_secure_reg_write32(u32 id, u32 val) { return -ENOSYS; }
+static inline int socfpga_secure_reg_update32(u32 id, u32 mask, u32 val) { return -ENOSYS; }
+#endif
 
 #endif /* _SECURE_REG_HELPER_H_ */
-- 
2.39.5




             reply	other threads:[~2025-08-06 12:23 UTC|newest]

Thread overview: 2+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-08-06 12:22 Ahmad Fatoum [this message]
2025-08-07  6:15 ` Sascha Hauer

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