From: Ahmad Fatoum <a.fatoum@pengutronix.de>
To: barebox@lists.infradead.org
Cc: Ahmad Fatoum <a.fatoum@pengutronix.de>
Subject: [PATCH 17/22] ARM: mmu32: rework find_pte to have ARM64 find_pte semantics
Date: Wed, 6 Aug 2025 14:37:09 +0200 [thread overview]
Message-ID: <20250806123714.2092620-18-a.fatoum@pengutronix.de> (raw)
In-Reply-To: <20250806123714.2092620-1-a.fatoum@pengutronix.de>
ARM32 find_pte can only look up a page and returns NULL when
encountering a section. The ARM64 find_pte, on the other hand, returns
the PTE at any level and stores the found level into a pointer supplied
by the caller.
Let's have the ARM32 version behave as the ARM64 version does to allow
reuse of code between them and to simplify maintenance.
Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
---
arch/arm/cpu/mmu_32.c | 48 ++++++++++++++++++++++++++++++-------------
1 file changed, 34 insertions(+), 14 deletions(-)
diff --git a/arch/arm/cpu/mmu_32.c b/arch/arm/cpu/mmu_32.c
index e43d9d0d4606..521e5f3a5769 100644
--- a/arch/arm/cpu/mmu_32.c
+++ b/arch/arm/cpu/mmu_32.c
@@ -94,16 +94,38 @@ static uint32_t *alloc_pte(void)
}
#endif
-static u32 *find_pte(unsigned long adr)
+/**
+ * find_pte - Find page table entry
+ * @ttb: Translation Table Base
+ * @addr: Virtual address to lookup
+ * @level: used to store the level at which the page table walk ended.
+ * if NULL, asserts that the smallest page was found
+ *
+ * This function walks the page table from the top down and finds the page
+ * table entry associated with the supplied virtual address.
+ * The level at which a page was found is saved into *level.
+ * if the level is NULL, a last level page must be found or the function
+ * panics.
+ *
+ * Returns a pointer to the page table entry
+ */
+static u32 *find_pte(uint32_t *ttb, uint32_t adr, unsigned *level)
{
+ u32 *pgd = &ttb[pgd_index(adr)];
u32 *table;
- uint32_t *ttb = get_ttb();
- if (!pgd_type_table(ttb[pgd_index(adr)]))
- return NULL;
+ if (!pgd_type_table(*pgd)) {
+ if (!level)
+ panic("Got level 1 page table entry, where level 2 expected\n");
+ *level = 1;
+ return pgd;
+ }
+
+ if (level)
+ *level = 2;
/* find the coarse page table base address */
- table = (u32 *)(ttb[pgd_index(adr)] & ~0x3ff);
+ table = (u32 *)(*pgd & ~0x3ff);
/* find second level descriptor */
return &table[(adr >> PAGE_SHIFT) & 0xff];
@@ -308,7 +330,7 @@ static void __arch_remap_range(void *_virt_addr, phys_addr_t phys_addr, size_t s
} else {
unsigned int num_ptes;
u32 *table = NULL;
- unsigned int i;
+ unsigned int i, level;
u32 *pte;
/*
* We only want to cover pages up until next
@@ -328,17 +350,15 @@ static void __arch_remap_range(void *_virt_addr, phys_addr_t phys_addr, size_t s
chunk = min(chunk, size);
num_ptes = chunk / PAGE_SIZE;
- pte = find_pte(virt_addr);
- if (!pte) {
+ pte = find_pte(ttb, virt_addr, &level);
+ if (level == 1) {
/*
- * If PTE is not found it means that
- * we needs to split this section and
- * create a new page table for it
+ * No PTE at level 2, so we needs to split this section
+ * and create a new page table for it
*/
table = arm_create_pte(virt_addr, phys_addr,
pmd_flags_to_pte(*pgd));
- pte = find_pte(virt_addr);
- BUG_ON(!pte);
+ pte = find_pte(ttb, virt_addr, NULL);
}
for (i = 0; i < num_ptes; i++) {
@@ -452,7 +472,7 @@ static void create_vector_table(unsigned long adr)
pr_debug("Creating vector table, virt = 0x%p, phys = 0x%08lx\n",
vectors, adr);
arm_create_pte(adr, adr, get_pte_flags(MAP_UNCACHED));
- pte = find_pte(adr);
+ pte = find_pte(get_ttb(), adr, NULL);
// TODO break-before-make missing
set_pte(pte, (u32)vectors | PTE_TYPE_SMALL |
get_pte_flags(MAP_CACHED));
--
2.39.5
next prev parent reply other threads:[~2025-08-06 13:06 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-08-06 12:36 [PATCH 00/22] ARM: mmu: refactor 32-bit and 64-bit code Ahmad Fatoum
2025-08-06 12:36 ` [PATCH 01/22] ARM: mmu: introduce new maptype_t type Ahmad Fatoum
2025-08-06 12:36 ` [PATCH 02/22] ARM: mmu: compare only lowest 16 bits for map type Ahmad Fatoum
2025-08-06 12:36 ` [PATCH 03/22] ARM: mmu: prefix pre-MMU functions with early_ Ahmad Fatoum
2025-08-06 12:36 ` [PATCH 04/22] ARM: mmu: panic when alloc_pte fails Ahmad Fatoum
2025-08-06 12:36 ` [PATCH 05/22] ARM: mmu32: introduce new mmu_addr_t type Ahmad Fatoum
2025-08-06 12:36 ` [PATCH 06/22] ARM: mmu: provide zero page control in PBL Ahmad Fatoum
2025-08-06 12:36 ` [PATCH 07/22] ARM: mmu: print map type as string Ahmad Fatoum
2025-08-06 12:37 ` [PATCH 08/22] ARM: mmu64: rename create_sections to __arch_remap_range Ahmad Fatoum
2025-08-06 12:37 ` [PATCH 09/22] ARM: mmu: move get_pte_attrs call into __arch_remap_range Ahmad Fatoum
2025-08-06 12:37 ` [PATCH 10/22] ARM: mmu64: print debug message in __arch_remap_range Ahmad Fatoum
2025-08-06 12:37 ` [PATCH 11/22] ARM: mmu: make force_pages a maptype_t flag Ahmad Fatoum
2025-08-06 12:37 ` [PATCH 12/22] ARM: mmu64: move granule_size to the top of the file Ahmad Fatoum
2025-08-06 12:37 ` [PATCH 13/22] ARM: mmu64: fix benign off-by-one in flush_cacheable_pages Ahmad Fatoum
2025-08-06 12:37 ` [PATCH 14/22] ARM: mmu64: make flush_cacheable_pages less 64-bit dependent Ahmad Fatoum
2025-08-06 12:37 ` [PATCH 15/22] ARM: mmu64: allow asserting last level page in __find_pte Ahmad Fatoum
2025-08-06 12:37 ` [PATCH 16/22] ARM: mmu64: rename __find_pte to find_pte Ahmad Fatoum
2025-08-06 12:37 ` Ahmad Fatoum [this message]
2025-08-06 12:37 ` [PATCH 18/22] ARM: mmu64: factor out flush_cacheable_pages for reusability Ahmad Fatoum
2025-08-06 12:37 ` [PATCH 19/22] ARM: mmu32: flush only cacheable pages on remap Ahmad Fatoum
2025-08-06 12:37 ` [PATCH 20/22] ARM: mmu32: factor out set_pte_range helper Ahmad Fatoum
2025-08-06 12:37 ` [PATCH 21/22] ARM: mmu64: " Ahmad Fatoum
2025-08-06 12:37 ` [PATCH 22/22] ARM: mmu: define dma_alloc_writecombine in common code Ahmad Fatoum
2025-08-07 7:24 ` [PATCH 00/22] ARM: mmu: refactor 32-bit and 64-bit code Sascha Hauer
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20250806123714.2092620-18-a.fatoum@pengutronix.de \
--to=a.fatoum@pengutronix.de \
--cc=barebox@lists.infradead.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox