From: David Picard <david.picard@clermont.in2p3.fr>
To: Sascha Hauer <s.hauer@pengutronix.de>,
BAREBOX <barebox@lists.infradead.org>
Cc: David Picard <david.picard@clermont.in2p3.fr>
Subject: [PATCH 02/11] Add Enclustra Mercury+ SA2 module
Date: Wed, 17 Sep 2025 17:22:05 +0200 [thread overview]
Message-ID: <20250917-boards-enclustra-sa2-add-support-v1-2-2de8f69107a1@clermont.in2p3.fr> (raw)
In-Reply-To: <20250917-boards-enclustra-sa2-add-support-v1-0-2de8f69107a1@clermont.in2p3.fr>
Signed-off-by: David Picard <david.picard@clermont.in2p3.fr>
---
arch/arm/boards/Makefile | 1 +
arch/arm/boards/enclustra-sa2/Makefile | 2 ++
arch/arm/boards/enclustra-sa2/board.c | 32 +++++++++++++++++++++++++++
arch/arm/boards/enclustra-sa2/lowlevel.c | 13 +++++++++++
arch/arm/configs/socfpga-xload_defconfig | 1 +
arch/arm/configs/socfpga_defconfig | 3 +--
arch/arm/dts/Makefile | 1 +
arch/arm/dts/socfpga_cyclone5_mercury_sa2.dts | 31 ++++++++++++++++++++++++++
arch/arm/mach-socfpga/Kconfig | 4 ++++
images/Makefile.socfpga | 8 +++++++
10 files changed, 94 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boards/Makefile b/arch/arm/boards/Makefile
index ac1fa74d4c03de7a462746cb93a061017cd2b64d..3c3801aaae8425689f2f070321d4ec2fd38ad90a 100644
--- a/arch/arm/boards/Makefile
+++ b/arch/arm/boards/Makefile
@@ -118,6 +118,7 @@ obj-$(CONFIG_MACH_SEEED_ODYSSEY) += seeed-odyssey/
obj-$(CONFIG_MACH_SOCFPGA_ALTERA_SOCDK) += altera-socdk/
obj-$(CONFIG_MACH_SOCFPGA_EBV_SOCRATES) += ebv-socrates/
obj-$(CONFIG_MACH_SOCFPGA_ENCLUSTRA_AA1) += enclustra-aa1/
+obj-$(CONFIG_MACH_SOCFPGA_ENCLUSTRA_SA2) += enclustra-sa2/
obj-$(CONFIG_MACH_SOCFPGA_REFLEX_ACHILLES) += reflex-achilles/
obj-$(CONFIG_MACH_SOCFPGA_TERASIC_DE0_NANO_SOC) += terasic-de0-nano-soc/
obj-$(CONFIG_MACH_SOCFPGA_TERASIC_DE10_NANO) += terasic-de10-nano/
diff --git a/arch/arm/boards/enclustra-sa2/Makefile b/arch/arm/boards/enclustra-sa2/Makefile
new file mode 100644
index 0000000000000000000000000000000000000000..8c927fe291a6b3eb20a32a2db96c73f231ab4697
--- /dev/null
+++ b/arch/arm/boards/enclustra-sa2/Makefile
@@ -0,0 +1,2 @@
+obj-y += lowlevel.o board.o
+pbl-y += lowlevel.o
diff --git a/arch/arm/boards/enclustra-sa2/board.c b/arch/arm/boards/enclustra-sa2/board.c
new file mode 100644
index 0000000000000000000000000000000000000000..834d0ab91871d0329af20f89a13af65e194b21c3
--- /dev/null
+++ b/arch/arm/boards/enclustra-sa2/board.c
@@ -0,0 +1,32 @@
+#include <common.h>
+#include <types.h>
+#include <driver.h>
+#include <init.h>
+#include <asm/armlinux.h>
+#include <linux/mdio.h>
+#include <linux/micrel_phy.h>
+#include <linux/phy.h>
+#include <linux/sizes.h>
+#include <fcntl.h>
+#include <fs.h>
+#include <mach/socfpga/cyclone5-regs.h>
+
+/*
+ * Ethernet PHY: Microchip/Micrel KSZ9031RNX
+ */
+static int phy_fixup(struct phy_device *dev)
+{
+ return 0;
+}
+
+static int socfpga_init(void)
+{
+ if (!of_machine_is_compatible("altr,socfpga-cyclone5"))
+ return 0;
+
+ if (IS_ENABLED(CONFIG_PHYLIB))
+ phy_register_fixup_for_uid(PHY_ID_KSZ9031, MICREL_PHY_ID_MASK, phy_fixup);
+
+ return 0;
+}
+console_initcall(socfpga_init);
diff --git a/arch/arm/boards/enclustra-sa2/lowlevel.c b/arch/arm/boards/enclustra-sa2/lowlevel.c
new file mode 100644
index 0000000000000000000000000000000000000000..a5065a4d89a82e7c048879488c9f441d32556f00
--- /dev/null
+++ b/arch/arm/boards/enclustra-sa2/lowlevel.c
@@ -0,0 +1,13 @@
+#include "sdram_config.h"
+#include "pinmux_config.c"
+#include "pll_config.h"
+#include "sequencer_defines.h"
+#include "sequencer_auto.h"
+#include "sequencer_auto_inst_init.c"
+#include "sequencer_auto_ac_init.c"
+#include "iocsr_config_cyclone5.c"
+
+#include <mach/socfpga/lowlevel.h>
+
+SOCFPGA_C5_ENTRY(start_socfpga_sa2, socfpga_cyclone5_mercury_sa2, SZ_1G);
+SOCFPGA_C5_XLOAD_ENTRY(start_socfpga_sa2_xload, SZ_1G);
diff --git a/arch/arm/configs/socfpga-xload_defconfig b/arch/arm/configs/socfpga-xload_defconfig
index 37e9ecec71876d6e6596faf0d4faf1ab9fa1c466..039196d4954ee32401c269a58d92e6c5cba602ed 100644
--- a/arch/arm/configs/socfpga-xload_defconfig
+++ b/arch/arm/configs/socfpga-xload_defconfig
@@ -2,6 +2,7 @@ CONFIG_ARCH_SOCFPGA=y
CONFIG_ARCH_SOCFPGA_XLOAD=y
CONFIG_MACH_SOCFPGA_ALTERA_SOCDK=y
CONFIG_MACH_SOCFPGA_EBV_SOCRATES=y
+CONFIG_MACH_SOCFPGA_ENCLUSTRA_SA2=y
CONFIG_MACH_SOCFPGA_TERASIC_DE0_NANO_SOC=y
CONFIG_MACH_SOCFPGA_TERASIC_DE10_NANO=y
CONFIG_MACH_SOCFPGA_TERASIC_SOCKIT=y
diff --git a/arch/arm/configs/socfpga_defconfig b/arch/arm/configs/socfpga_defconfig
index 0050dd2e4f4e4ae485e3cb0ca1f37ead0b947189..20d323017891531ad7a9f47b5dcf1334fd3534d8 100644
--- a/arch/arm/configs/socfpga_defconfig
+++ b/arch/arm/configs/socfpga_defconfig
@@ -1,8 +1,7 @@
CONFIG_ARCH_SOCFPGA=y
CONFIG_MACH_SOCFPGA_ALTERA_SOCDK=y
CONFIG_MACH_SOCFPGA_EBV_SOCRATES=y
-CONFIG_MACH_SOCFPGA_ENCLUSTRA_AA1=y
-CONFIG_MACH_SOCFPGA_REFLEX_ACHILLES=y
+CONFIG_MACH_SOCFPGA_ENCLUSTRA_SA2=y
CONFIG_MACH_SOCFPGA_TERASIC_DE0_NANO_SOC=y
CONFIG_MACH_SOCFPGA_TERASIC_DE10_NANO=y
CONFIG_MACH_SOCFPGA_TERASIC_SOCKIT=y
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 6612a514523103fdaaae026527f3441ebc57d228..5f624ea6f95fb15970bd6fe4b36515ff360544a3 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -141,6 +141,7 @@ lwl-$(CONFIG_MACH_FREESCALE_IMX6SX_SABRESDB) += imx6sx-sdb.dtb.o
lwl-$(CONFIG_MACH_SOCFPGA_ALTERA_SOCDK) += socfpga_cyclone5_socdk.dtb.o
lwl-$(CONFIG_MACH_SOCFPGA_EBV_SOCRATES) += socfpga_cyclone5_socrates.dtb.o
lwl-$(CONFIG_MACH_SOCFPGA_ENCLUSTRA_AA1) += socfpga_arria10_mercury_aa1.dtb.o
+lwl-$(CONFIG_MACH_SOCFPGA_ENCLUSTRA_SA2) += socfpga_cyclone5_mercury_sa2.dtb.o
lwl-$(CONFIG_MACH_SOCFPGA_REFLEX_ACHILLES) += socfpga_arria10_achilles.dtb.o
lwl-$(CONFIG_MACH_SOCFPGA_TERASIC_DE0_NANO_SOC) += socfpga_cyclone5_de0_nano_soc.dtb.o
lwl-$(CONFIG_MACH_SOCFPGA_TERASIC_DE10_NANO) += socfpga_cyclone5_de10_nano.dtb.o
diff --git a/arch/arm/dts/socfpga_cyclone5_mercury_sa2.dts b/arch/arm/dts/socfpga_cyclone5_mercury_sa2.dts
new file mode 100644
index 0000000000000000000000000000000000000000..9e2f2c1af19e68c0c662f62bc154856f75df2510
--- /dev/null
+++ b/arch/arm/dts/socfpga_cyclone5_mercury_sa2.dts
@@ -0,0 +1,31 @@
+/*
+ * Copyright (C) 2025 David Picard <david.picard@clermont.in2p3.fr>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include <arm/intel/socfpga/socfpga_cyclone5_mercury_sa2.dts>
+#include "socfpga.dtsi"
+
+/ {
+ chosen {
+ stdout-path = &uart0;
+
+ environment {
+ compatible = "barebox,environment";
+ device-path = &mmc, "partname:1";
+ file-path = "barebox.env";
+ };
+ };
+};
diff --git a/arch/arm/mach-socfpga/Kconfig b/arch/arm/mach-socfpga/Kconfig
index 4ec376056db8c07ad1d73041b079cde2cfeb9a17..a4f859ebf3d7956697d180e15f50b3495cd4c472 100644
--- a/arch/arm/mach-socfpga/Kconfig
+++ b/arch/arm/mach-socfpga/Kconfig
@@ -34,6 +34,10 @@ config MACH_SOCFPGA_ENCLUSTRA_AA1
select ARCH_SOCFPGA_ARRIA10
bool "Enclustra AA1"
+config MACH_SOCFPGA_ENCLUSTRA_SA2
+ select ARCH_SOCFPGA_CYCLONE5
+ bool "Enclustra SA2"
+
config MACH_SOCFPGA_REFLEX_ACHILLES
select ARCH_SOCFPGA_ARRIA10
bool "Reflex Achilles"
diff --git a/images/Makefile.socfpga b/images/Makefile.socfpga
index 7f95bed03297e616532ffb38cb36742b155146f5..e4c96801bee69910f7ce5e77ccdd3ac2766e1926 100644
--- a/images/Makefile.socfpga
+++ b/images/Makefile.socfpga
@@ -51,6 +51,14 @@ pblb-$(CONFIG_MACH_SOCFPGA_ENCLUSTRA_AA1) += start_socfpga_aa1_bringup
FILE_barebox-socfpga-aa1-bringup.img = start_socfpga_aa1_bringup.pblb
socfpga-barebox-$(CONFIG_MACH_SOCFPGA_ENCLUSTRA_AA1) += barebox-socfpga-aa1-bringup.img
+pblb-$(CONFIG_MACH_SOCFPGA_ENCLUSTRA_SA2) += start_socfpga_sa2_xload
+FILE_barebox-socfpga-sa2-xload.img = start_socfpga_sa2_xload.pblb.socfpgaimg
+socfpga-xload-$(CONFIG_MACH_SOCFPGA_ENCLUSTRA_SA2) += barebox-socfpga-sa2-xload.img
+
+pblb-$(CONFIG_MACH_SOCFPGA_ENCLUSTRA_SA2) += start_socfpga_sa2
+FILE_barebox-socfpga-sa2.img = start_socfpga_sa2.pblb
+socfpga-barebox-$(CONFIG_MACH_SOCFPGA_ENCLUSTRA_SA2) += barebox-socfpga-sa2.img
+
pblb-$(CONFIG_MACH_SOCFPGA_REFLEX_ACHILLES) += start_socfpga_achilles_xload
FILE_barebox-socfpga-achilles-xload.img = start_socfpga_achilles_xload.pblb.socfpgaimg
socfpga-barebox-$(CONFIG_MACH_SOCFPGA_REFLEX_ACHILLES) += barebox-socfpga-achilles-xload.img
--
2.43.0
next prev parent reply other threads:[~2025-09-17 15:51 UTC|newest]
Thread overview: 30+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-09-17 15:22 [PATCH 00/11] ARM: boards: add support for Enclustra Mercury SA2 David Picard
2025-09-17 15:22 ` [PATCH 01/11] Add handoff files David Picard
2025-09-17 15:22 ` David Picard [this message]
2025-09-18 6:21 ` [PATCH 02/11] Add Enclustra Mercury+ SA2 module Sascha Hauer
2025-09-17 15:22 ` [PATCH 03/11] Add Enclustra devicetree files David Picard
2025-09-17 15:22 ` [PATCH 04/11] ARM: dts: socfpga: use upstream SA2 device tree David Picard
2025-09-18 6:32 ` Sascha Hauer
2025-09-18 10:09 ` David Picard
2025-09-18 10:20 ` Ahmad Fatoum
2025-09-17 15:22 ` [PATCH 05/11] ARM: dts: socfpga: adapt " David Picard
2025-09-17 15:22 ` [PATCH 06/11] boards: enclustra-sa2: read MAC address from EEPROM David Picard
2025-09-17 17:06 ` Alexander Shiyan
2025-09-18 6:18 ` Sascha Hauer
2025-09-18 14:01 ` David Picard
2025-09-18 14:12 ` Sascha Hauer
2025-09-18 15:07 ` David Picard
2025-09-22 13:15 ` Sascha Hauer
2025-09-23 9:07 ` David Picard
2025-09-23 9:40 ` Sascha Hauer
2025-09-23 11:50 ` David Picard
2025-09-23 15:31 ` David Picard
2025-09-17 15:22 ` [PATCH 07/11] gpio: dw: support numbering via aliases David Picard
2025-09-18 6:35 ` Sascha Hauer
2025-09-17 15:22 ` [PATCH 08/11] gpio: dw: make deep probe compatible David Picard
2025-09-17 15:22 ` [PATCH 09/11] boards: enclustra-sa2: enable bridges David Picard
2025-09-18 6:37 ` Sascha Hauer
2025-09-17 15:22 ` [PATCH 10/11] boards: enclustra-sa2: configure SI5338 David Picard
2025-09-18 7:09 ` Sascha Hauer
2025-09-18 13:23 ` David Picard
2025-09-17 15:22 ` [PATCH 11/11] boards: enclustra-sa2: enable SI5338 David Picard
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20250917-boards-enclustra-sa2-add-support-v1-2-2de8f69107a1@clermont.in2p3.fr \
--to=david.picard@clermont.in2p3.fr \
--cc=barebox@lists.infradead.org \
--cc=s.hauer@pengutronix.de \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox