From: Sascha Hauer <s.hauer@pengutronix.de>
To: Barebox List <barebox@lists.infradead.org>
Subject: [PATCH] ARM: dts: am62lx: fix secondary core startup
Date: Tue, 7 Oct 2025 10:51:17 +0200 [thread overview]
Message-ID: <20251007085117.941408-1-s.hauer@pengutronix.de> (raw)
Disable the rti1 watchdog which fixes startup of the secondary CPU core
under Linux.
Enabling the rti1 watchdog leads to enabling its power domain,
<&scmi_pds 61> in this case. With this starting the secondary core fails
under Linux:
[ 5.095816] CPU1: failed to come online
[ 5.095832] CPU1: failed in unknown state : 0x0
[ 5.095892] smp: Brought up 1 node, 1 CPU
[ 5.095898] SMP: Total of 1 processors activated.
I don't know what's exactly going on here, but it seems enabling the
power domain either indirectly starts the secondary core in barebox
already or it causes some weird power state for the secondary CPU from
which the Tf-A can't recover later.
The device node is the same as under Linux later, but in Linux the rti1
watchdog is configured after the secondary CPU has been started.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
arch/arm/dts/k3-am62l-barebox.dtsi | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/arch/arm/dts/k3-am62l-barebox.dtsi b/arch/arm/dts/k3-am62l-barebox.dtsi
index 3524fbb979..ce99dfd921 100644
--- a/arch/arm/dts/k3-am62l-barebox.dtsi
+++ b/arch/arm/dts/k3-am62l-barebox.dtsi
@@ -11,6 +11,10 @@ &gpio2 {
status = "okay";
};
+&rti1 {
+ status = "disabled";
+};
+
&wkup_gpio0 {
status = "okay";
};
--
2.47.3
next reply other threads:[~2025-10-07 8:52 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-10-07 8:51 Sascha Hauer [this message]
2025-10-07 12:01 ` Sascha Hauer
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