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From: Michael Grzeschik <m.grzeschik@pengutronix.de>
To: Sascha Hauer <s.hauer@pengutronix.de>,
	 BAREBOX <barebox@lists.infradead.org>
Subject: [PATCH 1/2] clk: imx: clk-fracn-gppll: Add 355.6MHz config for video pll
Date: Fri, 05 Dec 2025 13:19:45 +0100	[thread overview]
Message-ID: <20251205-gppll-v1-1-bcd7b0f0408a@pengutronix.de> (raw)
In-Reply-To: <20251205-gppll-v1-0-bcd7b0f0408a@pengutronix.de>

Add the 355.6MHz frequency support that will be used by video subsystem
on imx93.

The 355.6MHz can be used to drive the pixclock of 25.4MHz and LVDS Clock of
177.8MHz.

Signed-off-by: Michael Grzeschik <m.grzeschik@pengutronix.de>
---
 drivers/clk/imx/clk-fracn-gppll.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/clk/imx/clk-fracn-gppll.c b/drivers/clk/imx/clk-fracn-gppll.c
index 24e66fd65fbd822b91a7b8975a1b88de20243df1..39a9ed06965248d49f41a908b82dc13dbb8017fc 100644
--- a/drivers/clk/imx/clk-fracn-gppll.c
+++ b/drivers/clk/imx/clk-fracn-gppll.c
@@ -58,6 +58,7 @@ static const struct imx_fracn_gppll_rate_table fracn_tbl[] = {
 	PLL_FRACN_GP(445333333U, 167, 0, 1, 0, 9),
 	PLL_FRACN_GP(400000000U, 200, 0, 1, 0, 12),
 	PLL_FRACN_GP(393216000U, 163, 84, 100, 0, 10),
+	PLL_FRACN_GP(355600000U, 177, 80, 100, 0, 12),
 	PLL_FRACN_GP(300000000U, 150, 0, 1, 0, 12)
 };
 

-- 
2.47.3




  reply	other threads:[~2025-12-05 12:20 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-12-05 12:19 [PATCH 0/2] clk: imx: clk-fracn-gppll: add more frequencies for video-pll sources Michael Grzeschik
2025-12-05 12:19 ` Michael Grzeschik [this message]
2025-12-05 12:19 ` [PATCH 2/2] clk: imx: clk-fracn-gppll: Add 135MHz config for video pll Michael Grzeschik
2025-12-08  7:43 ` [PATCH 0/2] clk: imx: clk-fracn-gppll: add more frequencies for video-pll sources Sascha Hauer

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