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X-BeenThere: barebox@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: "Claude Sonnet 4.5" , Ahmad Fatoum Sender: "barebox" X-SA-Exim-Connect-IP: 2607:7c80:54:3::133 X-SA-Exim-Mail-From: barebox-bounces+lore=pengutronix.de@lists.infradead.org X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on metis.whiteo.stw.pengutronix.de X-Spam-Level: X-Spam-Status: No, score=-3.9 required=4.0 tests=AWL,BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_NONE autolearn=unavailable autolearn_force=no version=3.4.2 Subject: [PATCH v3 13/23] mmu: introduce pbl_remap_range() X-SA-Exim-Version: 4.2.1 (built Wed, 08 May 2019 21:11:16 +0000) X-SA-Exim-Scanned: Yes (on metis.whiteo.stw.pengutronix.de) Add PBL-specific memory remapping function that always uses page-wise mapping (ARCH_MAP_FLAG_PAGEWISE) for fine-grained permissions on adjacent ELF segments with different protection requirements. Wraps arch-specific __arch_remap_range() for ARMv7 (4KB pages) and ARMv8 (page tables with BBM). Needed for ELF segment permission setup. Reviewed-by: Ahmad Fatoum Signed-off-by: Sascha Hauer --- arch/arm/cpu/mmu_32.c | 6 ++++++ arch/arm/cpu/mmu_64.c | 7 +++++++ include/mmu.h | 3 +++ 3 files changed, 16 insertions(+) diff --git a/arch/arm/cpu/mmu_32.c b/arch/arm/cpu/mmu_32.c index 71ead41c3d274548c9427c1ce9833de309114c4d..981202b789befbd04e212f48490aebb41dfb6b98 100644 --- a/arch/arm/cpu/mmu_32.c +++ b/arch/arm/cpu/mmu_32.c @@ -435,6 +435,12 @@ static void early_remap_range(u32 addr, size_t size, maptype_t map_type) __arch_remap_range((void *)addr, addr, size, map_type); } +void pbl_remap_range(void *virt_addr, phys_addr_t phys_addr, size_t size, + maptype_t map_type) +{ + __arch_remap_range(virt_addr, phys_addr, size, map_type); +} + static bool pte_is_cacheable(uint32_t pte, int level) { return (level == 2 && (pte & PTE_CACHEABLE)) || diff --git a/arch/arm/cpu/mmu_64.c b/arch/arm/cpu/mmu_64.c index ddf1373ec0a801baad043146187d7f4c3eac6a2a..5ea0d39ad4c7fb219b38cf957335615d0d6e96c5 100644 --- a/arch/arm/cpu/mmu_64.c +++ b/arch/arm/cpu/mmu_64.c @@ -282,6 +282,13 @@ static void early_remap_range(uint64_t addr, size_t size, maptype_t map_type) __arch_remap_range(addr, addr, size, map_type, false); } +void pbl_remap_range(void *virt_addr, phys_addr_t phys_addr, size_t size, + maptype_t map_type) +{ + __arch_remap_range((uint64_t)virt_addr, phys_addr, + (uint64_t)size, map_type, true); +} + int arch_remap_range(void *virt_addr, phys_addr_t phys_addr, size_t size, maptype_t map_type) { map_type = arm_mmu_maybe_skip_permissions(map_type); diff --git a/include/mmu.h b/include/mmu.h index 9f582f25e1de14d47cfe2eff64f9cce81c4e492d..32d9a7aca3b9a61d542bf3e21e27f1ac51f43ee2 100644 --- a/include/mmu.h +++ b/include/mmu.h @@ -65,6 +65,9 @@ static inline bool arch_can_remap(void) } #endif +void pbl_remap_range(void *virt_addr, phys_addr_t phys_addr, size_t size, + maptype_t map_type); + static inline int remap_range(void *start, size_t size, maptype_t map_type) { return arch_remap_range(start, virt_to_phys(start), size, map_type); -- 2.47.3