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From: Sascha Hauer <s.hauer@pengutronix.de>
To: BAREBOX <barebox@lists.infradead.org>
Cc: "Claude Sonnet 4.5" <noreply@anthropic.com>
Subject: [PATCH v3 14/23] ARM: drop arm_fixup_vectors()
Date: Thu, 08 Jan 2026 16:50:11 +0100	[thread overview]
Message-ID: <20260108-pbl-load-elf-v3-14-e28c931fc179@pengutronix.de> (raw)
In-Reply-To: <20260108-pbl-load-elf-v3-0-e28c931fc179@pengutronix.de>

Add the missing "ax" flag for the exception table. With this the jumps
in the exception table are correctly relocated and we no longer have to
fix them up during runtime. Remove the now unnecessary
arm_fixup_vectors().

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
 arch/arm/cpu/exceptions_32.S       | 54 +++++---------------------------------
 arch/arm/cpu/interrupts_32.c       |  5 +---
 arch/arm/cpu/mmu_32.c              |  2 --
 arch/arm/cpu/no-mmu.c              |  2 --
 arch/arm/include/asm/barebox-arm.h |  4 ---
 5 files changed, 8 insertions(+), 59 deletions(-)

diff --git a/arch/arm/cpu/exceptions_32.S b/arch/arm/cpu/exceptions_32.S
index dc3d42663cbedd37947e27d449eb4ac8c3d8c3f1..68eb696fc7b78924156172a8867d3c9ed1dce588 100644
--- a/arch/arm/cpu/exceptions_32.S
+++ b/arch/arm/cpu/exceptions_32.S
@@ -127,58 +127,18 @@ fiq:
 	bad_save_user_regs
 	bl 	do_fiq
 
-#ifdef CONFIG_ARM_EXCEPTIONS
-/*
- * With relocatable binary support the runtime exception vectors do not match
- * the addresses in the binary. We have to fix them up during runtime
- */
-ENTRY(arm_fixup_vectors)
-	ldr	r0, =undefined_instruction
-	ldr	r1, =_undefined_instruction
-	str	r0, [r1]
-	ldr	r0, =software_interrupt
-	ldr	r1, =_software_interrupt
-	str	r0, [r1]
-	ldr	r0, =prefetch_abort
-	ldr	r1, =_prefetch_abort
-	str	r0, [r1]
-	ldr	r0, =data_abort
-	ldr	r1, =_data_abort
-	str	r0, [r1]
-	ldr	r0, =irq
-	ldr	r1, =_irq
-	str	r0, [r1]
-	ldr	r0, =fiq
-	ldr	r1, =_fiq
-	str	r0, [r1]
-	bx	lr
-ENDPROC(arm_fixup_vectors)
-#endif
-
-.section .text_exceptions
+.section .text_exceptions, "ax"
 .globl extable
 extable:
 1:	b 1b				/* barebox_arm_reset_vector */
 #ifdef CONFIG_ARM_EXCEPTIONS
-	ldr pc, _undefined_instruction	/* undefined instruction */
-	ldr pc, _software_interrupt	/* software interrupt (SWI) */
-	ldr pc, _prefetch_abort		/* prefetch abort */
-	ldr pc, _data_abort		/* data abort */
+	ldr pc, =undefined_instruction	/* undefined instruction */
+	ldr pc, =software_interrupt	/* software interrupt (SWI) */
+	ldr pc, =prefetch_abort		/* prefetch abort */
+	ldr pc, =data_abort		/* data abort */
 1:	b 1b				/* (reserved) */
-	ldr pc, _irq			/* irq (interrupt) */
-	ldr pc, _fiq			/* fiq (fast interrupt) */
-.globl _undefined_instruction
-_undefined_instruction: .word undefined_instruction
-.globl _software_interrupt
-_software_interrupt: .word software_interrupt
-.globl _prefetch_abort
-_prefetch_abort: .word prefetch_abort
-.globl _data_abort
-_data_abort: .word data_abort
-.globl _irq
-_irq: .word irq
-.globl _fiq
-_fiq: .word fiq
+	ldr pc, =irq			/* irq (interrupt) */
+	ldr pc, =fiq			/* fiq (fast interrupt) */
 #else
 1:	b 1b				/* undefined instruction */
 1:	b 1b				/* software interrupt (SWI) */
diff --git a/arch/arm/cpu/interrupts_32.c b/arch/arm/cpu/interrupts_32.c
index 0b88db10fe487378fe08018701bc672f63139fc1..af2231f2a78059f7dc6b4a786a384fb870e9f14c 100644
--- a/arch/arm/cpu/interrupts_32.c
+++ b/arch/arm/cpu/interrupts_32.c
@@ -231,10 +231,8 @@ static __maybe_unused int arm_init_vectors(void)
 	 * First try to use the vectors where they actually are, works
 	 * on ARMv7 and later.
 	 */
-	if (!set_vector_table((unsigned long)__exceptions_start)) {
-		arm_fixup_vectors();
+	if (!set_vector_table((unsigned long)__exceptions_start))
 		return 0;
-	}
 
 	/*
 	 * Next try high vectors at 0xffff0000.
@@ -265,6 +263,5 @@ void arm_pbl_init_exceptions(void)
 		return;
 
 	set_vbar((unsigned long)__exceptions_start);
-	arm_fixup_vectors();
 }
 #endif
diff --git a/arch/arm/cpu/mmu_32.c b/arch/arm/cpu/mmu_32.c
index 981202b789befbd04e212f48490aebb41dfb6b98..1d2ead9160cf3b921c2900d4edaad0d465f636d9 100644
--- a/arch/arm/cpu/mmu_32.c
+++ b/arch/arm/cpu/mmu_32.c
@@ -534,8 +534,6 @@ void create_vector_table(unsigned long adr)
 			      get_pte_flags(MAP_CACHED), true);
 	}
 
-	arm_fixup_vectors();
-
 	memset(vectors, 0, PAGE_SIZE);
 	memcpy(vectors, __exceptions_start, __exceptions_stop - __exceptions_start);
 }
diff --git a/arch/arm/cpu/no-mmu.c b/arch/arm/cpu/no-mmu.c
index c4ef5d1f9d55136d606c244309dbeeb8fd988784..8e00cffebfd9193a45f5b5ab1863e4e6b13464d8 100644
--- a/arch/arm/cpu/no-mmu.c
+++ b/arch/arm/cpu/no-mmu.c
@@ -58,8 +58,6 @@ static int nommu_v7_vectors_init(void)
 	cr &= ~CR_V;
 	set_cr(cr);
 
-	arm_fixup_vectors();
-
 	vectors = xmemalign(PAGE_SIZE, PAGE_SIZE);
 	memset(vectors, 0, PAGE_SIZE);
 	memcpy(vectors, __exceptions_start, __exceptions_size);
diff --git a/arch/arm/include/asm/barebox-arm.h b/arch/arm/include/asm/barebox-arm.h
index e1d89d5684d36f003ba8da3651ae86bda1d9b34c..99f82311945ceb0d06ef9e36ba34a9be54f1ae8e 100644
--- a/arch/arm/include/asm/barebox-arm.h
+++ b/arch/arm/include/asm/barebox-arm.h
@@ -45,12 +45,8 @@ unsigned long arm_mem_membase_get(void);
 unsigned long arm_mem_endmem_get(void);
 
 #ifdef CONFIG_ARM_EXCEPTIONS
-void arm_fixup_vectors(void);
 ulong arm_get_vector_table(void);
 #else
-static inline void arm_fixup_vectors(void)
-{
-}
 static inline ulong arm_get_vector_table(void)
 {
 	return ~0;

-- 
2.47.3




  parent reply	other threads:[~2026-01-08 16:02 UTC|newest]

Thread overview: 25+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-01-08 15:49 [PATCH v3 00/23] PBL: Add PBL ELF loading support with dynamic relocations Sascha Hauer
2026-01-08 15:49 ` [PATCH v3 01/23] Makefile.compiler: add objcopy-option Sascha Hauer
2026-01-08 16:25   ` Ahmad Fatoum
2026-01-08 15:49 ` [PATCH v3 02/23] elf: only accept images matching the native ELF_CLASS Sascha Hauer
2026-01-08 15:50 ` [PATCH v3 03/23] elf: build for PBL as well Sascha Hauer
2026-01-08 15:50 ` [PATCH v3 04/23] elf: add dynamic relocation support Sascha Hauer
2026-01-08 15:50 ` [PATCH v3 05/23] ARM: implement elf_apply_relocations() for ELF " Sascha Hauer
2026-01-08 15:50 ` [PATCH v3 06/23] riscv: define generic relocate_image Sascha Hauer
2026-01-08 15:50 ` [PATCH v3 07/23] riscv: implement elf_apply_relocations() for ELF relocation support Sascha Hauer
2026-01-08 15:50 ` [PATCH v3 08/23] elf: implement elf_load_inplace() Sascha Hauer
2026-01-08 15:50 ` [PATCH v3 09/23] elf: create elf_open_binary_into() Sascha Hauer
2026-01-08 15:50 ` [PATCH v3 10/23] Makefile: add vmbarebox build target Sascha Hauer
2026-01-08 15:50 ` [PATCH v3 11/23] PBL: allow to link ELF image into PBL Sascha Hauer
2026-01-08 15:50 ` [PATCH v3 12/23] mmu: add MAP_CACHED_RO mapping type Sascha Hauer
2026-01-08 15:50 ` [PATCH v3 13/23] mmu: introduce pbl_remap_range() Sascha Hauer
2026-01-08 15:50 ` Sascha Hauer [this message]
2026-01-08 15:50 ` [PATCH v3 15/23] ARM: linker script: create separate PT_LOAD segments for text, rodata, and data Sascha Hauer
2026-01-08 15:50 ` [PATCH v3 16/23] ARM: link ELF image into PBL Sascha Hauer
2026-01-08 15:50 ` [PATCH v3 17/23] ARM: PBL: setup MMU with proper permissions from ELF segments Sascha Hauer
2026-01-08 15:50 ` [PATCH v3 18/23] riscv: linker script: create separate PT_LOAD segments for text, rodata, and data Sascha Hauer
2026-01-08 15:50 ` [PATCH v3 19/23] riscv: link ELF image into PBL Sascha Hauer
2026-01-08 15:50 ` [PATCH v3 20/23] riscv: Allwinner D1: Drop M-Mode Sascha Hauer
2026-01-08 15:50 ` [PATCH v3 21/23] riscv: add ELF segment-based memory protection with MMU Sascha Hauer
2026-01-08 15:50 ` [PATCH v3 22/23] ARM: cleanup barebox proper entry Sascha Hauer
2026-01-08 15:50 ` [PATCH v3 23/23] riscv: " Sascha Hauer

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