From: Sascha Hauer <s.hauer@pengutronix.de>
To: BAREBOX <barebox@lists.infradead.org>
Subject: [PATCH 2/6] ARM: rockchip: atf: make all memory banks available
Date: Fri, 20 Mar 2026 09:31:18 +0100 [thread overview]
Message-ID: <20260320-compressed-firmware-rockchip-v1-2-7d03c7e39d2f@pengutronix.de> (raw)
In-Reply-To: <20260320-compressed-firmware-rockchip-v1-0-7d03c7e39d2f@pengutronix.de>
The FDT we pass to OP-TEE needs all memory banks, not only the first
one. Passing such a FDT to OP-TEE is currently only implemented for
RK3588, but in preparation to support that for other SoCs make all
memory banks available to atf.c
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
arch/arm/mach-rockchip/atf.c | 42 ++++++++++++++++++++++--------------------
1 file changed, 22 insertions(+), 20 deletions(-)
diff --git a/arch/arm/mach-rockchip/atf.c b/arch/arm/mach-rockchip/atf.c
index cf232e4f6e..4d90aeff49 100644
--- a/arch/arm/mach-rockchip/atf.c
+++ b/arch/arm/mach-rockchip/atf.c
@@ -127,6 +127,9 @@ static uintptr_t rk_load_optee(uintptr_t bl32, struct fwobj *bl32_fw)
return bl32;
}
+static phys_addr_t membase[ROCKCHIP_MAX_DRAM_RESOURCES];
+static resource_size_t memsize[ROCKCHIP_MAX_DRAM_RESOURCES];
+static int n_mem_resources;
static uintptr_t barebox_load_address; /* where barebox is loaded and started */
static uintptr_t optee_load_address; /* standard SoC specific OP-TEE load address */
static struct fwobj bl31; /* TF-A in barebox image */
@@ -168,11 +171,11 @@ void rk3562_atf_load_bl31(void *fdt)
void __noreturn rk3562_barebox_entry(void *fdt)
{
- phys_addr_t membase, memend;
- resource_size_t memsize;
+ phys_addr_t memend;
- rk3562_ram_sizes(&membase, &memsize, 1);
- memend = membase + memsize;
+ n_mem_resources = rk3562_ram_sizes(membase, memsize, ROCKCHIP_MAX_DRAM_RESOURCES);
+
+ memend = membase[0] + memsize[0];
rk_scratch = (void *)arm_mem_scratch(memend);
@@ -196,7 +199,7 @@ void __noreturn rk3562_barebox_entry(void *fdt)
}
optee_set_membase(rk_scratch_get_optee_hdr());
- barebox_arm_entry(membase, memsize, fdt);
+ barebox_arm_entry(membase[0], memsize[0], fdt);
}
void rk3568_atf_load_bl31(void *fdt)
@@ -207,11 +210,11 @@ void rk3568_atf_load_bl31(void *fdt)
void __noreturn rk3568_barebox_entry(void *fdt)
{
- phys_addr_t membase, memend;
- resource_size_t memsize;
+ phys_addr_t memend;
+
+ n_mem_resources = rk3568_ram_sizes(membase, memsize, ROCKCHIP_MAX_DRAM_RESOURCES);
- rk3568_ram_sizes(&membase, &memsize, 1);
- memend = membase + memsize;
+ memend = membase[0] + memsize[0];
rk_scratch = (void *)arm_mem_scratch(memend);
@@ -235,7 +238,7 @@ void __noreturn rk3568_barebox_entry(void *fdt)
}
optee_set_membase(rk_scratch_get_optee_hdr());
- barebox_arm_entry(membase, memsize, fdt);
+ barebox_arm_entry(membase[0], memsize[0], fdt);
}
void rk3588_atf_load_bl31(void *fdt)
@@ -278,12 +281,11 @@ static int rk3588_open_fdt(const void *fdt, void *buf, int bufsize)
void __noreturn rk3588_barebox_entry(void *fdt)
{
- phys_addr_t membase, memend;
- resource_size_t memsize;
+ phys_addr_t memend;
- rk3588_ram_sizes(&membase, &memsize, 1);
+ n_mem_resources = rk3588_ram_sizes(membase, memsize, ROCKCHIP_MAX_DRAM_RESOURCES);
- memend = membase + memsize;
+ memend = membase[0] + memsize[0];
rk_scratch = (void *)arm_mem_scratch(memend);
@@ -309,7 +311,7 @@ void __noreturn rk3588_barebox_entry(void *fdt)
}
optee_set_membase(rk_scratch_get_optee_hdr());
- barebox_arm_entry(membase, memsize, fdt);
+ barebox_arm_entry(membase[0], memsize[0], fdt);
}
void rk3576_atf_load_bl31(void *fdt)
@@ -320,11 +322,11 @@ void rk3576_atf_load_bl31(void *fdt)
void __noreturn rk3576_barebox_entry(void *fdt)
{
- phys_addr_t membase, memend;
- resource_size_t memsize;
+ phys_addr_t memend;
+
+ n_mem_resources = rk3576_ram_sizes(membase, memsize, ROCKCHIP_MAX_DRAM_RESOURCES);
- rk3576_ram_sizes(&membase, &memsize, 1);
- memend = membase + memsize;
+ memend = membase[0] + memsize[0];
rk_scratch = (void *)arm_mem_scratch(memend);
@@ -348,5 +350,5 @@ void __noreturn rk3576_barebox_entry(void *fdt)
}
optee_set_membase(rk_scratch_get_optee_hdr());
- barebox_arm_entry(membase, memsize, fdt);
+ barebox_arm_entry(membase[0], memsize[0], fdt);
}
--
2.47.3
next prev parent reply other threads:[~2026-03-20 8:31 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-03-20 8:31 [PATCH 0/6] Rockchip: Enable MMU before uncompressing TF-A and OP-TEE Sascha Hauer
2026-03-20 8:31 ` [PATCH 1/6] ARM: rockchip: dmc: rework DRAM functions Sascha Hauer
2026-03-20 8:31 ` Sascha Hauer [this message]
2026-03-20 8:31 ` [PATCH 3/6] ARM: rockchip: atf: add OP-TEE fdt creation function for all SoCs Sascha Hauer
2026-03-20 8:31 ` [PATCH 4/6] ARM: Rockchip: Drop rk3xxx_atf_load_bl31() Sascha Hauer
2026-03-20 8:31 ` [PATCH 5/6] ARM: rockchip: separate physical DRAM start from usable start Sascha Hauer
2026-03-20 8:31 ` [PATCH 6/6] ARM: rockchip: atf: enable MMU in PBL Sascha Hauer
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20260320-compressed-firmware-rockchip-v1-2-7d03c7e39d2f@pengutronix.de \
--to=s.hauer@pengutronix.de \
--cc=barebox@lists.infradead.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox