* [PATCH 1/6] ARM: rockchip: dmc: rework DRAM functions
2026-03-20 8:31 [PATCH 0/6] Rockchip: Enable MMU before uncompressing TF-A and OP-TEE Sascha Hauer
@ 2026-03-20 8:31 ` Sascha Hauer
2026-03-20 8:31 ` [PATCH 2/6] ARM: rockchip: atf: make all memory banks available Sascha Hauer
` (4 subsequent siblings)
5 siblings, 0 replies; 7+ messages in thread
From: Sascha Hauer @ 2026-03-20 8:31 UTC (permalink / raw)
To: BAREBOX
The DRAM on Rockchip SoCs is split in several regions interrupted by the
internal register space. For the PBL we used to use only the lowest DRAM
region which is enough for barebox to fit into. This recently changed on
RK3588 where we pass a FDT blob to OP-TEE which needs the whole memory.
Streamline this for all SoCs. Replace the rk3*_ram0_size functions with
a rk3*_ram_sizes set of functions which can return all regions.
The functionality to split the whole DRAM into regions was previously
duplicated in rk3588_ram_sizes() and rockchip_dmc_probe(). This patch
reduces the duplication by merging them to rockchip_ram().
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
arch/arm/mach-rockchip/atf.c | 33 +++++-----
arch/arm/mach-rockchip/dmc.c | 152 ++++++++++++++++++++++---------------------
include/mach/rockchip/dmc.h | 10 +--
3 files changed, 100 insertions(+), 95 deletions(-)
diff --git a/arch/arm/mach-rockchip/atf.c b/arch/arm/mach-rockchip/atf.c
index 3e0a14292b..cf232e4f6e 100644
--- a/arch/arm/mach-rockchip/atf.c
+++ b/arch/arm/mach-rockchip/atf.c
@@ -168,12 +168,13 @@ void rk3562_atf_load_bl31(void *fdt)
void __noreturn rk3562_barebox_entry(void *fdt)
{
- unsigned long membase, endmem;
+ phys_addr_t membase, memend;
+ resource_size_t memsize;
- membase = RK3562_DRAM_BOTTOM;
- endmem = rk3562_ram0_size();
+ rk3562_ram_sizes(&membase, &memsize, 1);
+ memend = membase + memsize;
- rk_scratch = (void *)arm_mem_scratch(endmem);
+ rk_scratch = (void *)arm_mem_scratch(memend);
if (current_el() == 3) {
rk3562_lowlevel_init();
@@ -195,7 +196,7 @@ void __noreturn rk3562_barebox_entry(void *fdt)
}
optee_set_membase(rk_scratch_get_optee_hdr());
- barebox_arm_entry(membase, endmem - membase, fdt);
+ barebox_arm_entry(membase, memsize, fdt);
}
void rk3568_atf_load_bl31(void *fdt)
@@ -206,12 +207,13 @@ void rk3568_atf_load_bl31(void *fdt)
void __noreturn rk3568_barebox_entry(void *fdt)
{
- unsigned long membase, endmem;
+ phys_addr_t membase, memend;
+ resource_size_t memsize;
- membase = RK3568_DRAM_BOTTOM;
- endmem = rk3568_ram0_size();
+ rk3568_ram_sizes(&membase, &memsize, 1);
+ memend = membase + memsize;
- rk_scratch = (void *)arm_mem_scratch(endmem);
+ rk_scratch = (void *)arm_mem_scratch(memend);
if (current_el() == 3) {
rk3568_lowlevel_init();
@@ -233,7 +235,7 @@ void __noreturn rk3568_barebox_entry(void *fdt)
}
optee_set_membase(rk_scratch_get_optee_hdr());
- barebox_arm_entry(membase, endmem - membase, fdt);
+ barebox_arm_entry(membase, memsize, fdt);
}
void rk3588_atf_load_bl31(void *fdt)
@@ -318,12 +320,13 @@ void rk3576_atf_load_bl31(void *fdt)
void __noreturn rk3576_barebox_entry(void *fdt)
{
- unsigned long membase, endmem;
+ phys_addr_t membase, memend;
+ resource_size_t memsize;
- membase = RK3576_DRAM_BOTTOM;
- endmem = rk3576_ram0_size();
+ rk3576_ram_sizes(&membase, &memsize, 1);
+ memend = membase + memsize;
- rk_scratch = (void *)arm_mem_scratch(endmem);
+ rk_scratch = (void *)arm_mem_scratch(memend);
if (current_el() == 3) {
void *fdt_scratch = NULL;
@@ -345,5 +348,5 @@ void __noreturn rk3576_barebox_entry(void *fdt)
}
optee_set_membase(rk_scratch_get_optee_hdr());
- barebox_arm_entry(membase, endmem - membase, fdt);
+ barebox_arm_entry(membase, memsize, fdt);
}
diff --git a/arch/arm/mach-rockchip/dmc.c b/arch/arm/mach-rockchip/dmc.c
index 8502859f4b..318e99d8ba 100644
--- a/arch/arm/mach-rockchip/dmc.c
+++ b/arch/arm/mach-rockchip/dmc.c
@@ -53,6 +53,9 @@ struct rockchip_dmc_drvdata {
resource_size_t membase;
};
+/*
+ * Return the physical size of a single bank
+ */
static resource_size_t rockchip_sdram_size(u32 sys_reg2, u32 sys_reg3)
{
u32 rank, cs0_col, bk, cs0_row, cs1_row, bw, row_3_4;
@@ -143,73 +146,111 @@ static resource_size_t rockchip_sdram_size(u32 sys_reg2, u32 sys_reg3)
return (resource_size_t)size_mb << 20;
}
-resource_size_t rk3399_ram0_size(void)
+/*
+ * Split the total DRAM size into regions
+ */
+static size_t rockchip_ram(phys_addr_t membase, resource_size_t memsize,
+ phys_addr_t int_reg_start, phys_addr_t *base,
+ resource_size_t *size, size_t n)
+{
+ int i = 0;
+
+ if (membase > int_reg_start) {
+ /*
+ * RK3576 has internal registers below the DRAM start and thus
+ * doesn't need any gaps in the DRAM space.
+ */
+ base[0] = membase;
+ size[0] = memsize;
+
+ return 1;
+ }
+
+ base[i] = membase;
+ size[i] = min_t(resource_size_t, RK3588_INT_REG_START, memsize) - membase;
+ i++;
+
+ if (i < n && memsize > SZ_4G) {
+ base[i] = SZ_4G;
+ size[i] = min_t(unsigned long, DRAM_GAP1_START, memsize) - SZ_4G;
+ i++;
+ }
+ if (i < n && memsize > DRAM_GAP1_END) {
+ base[i] = DRAM_GAP1_END;
+ size[i] = min_t(unsigned long, DRAM_GAP2_START, memsize) - DRAM_GAP1_END;
+ i++;
+ }
+ if (i < n && memsize > DRAM_GAP2_END) {
+ base[i] = DRAM_GAP2_END;
+ size[i] = memsize - DRAM_GAP2_END;
+ i++;
+ }
+
+ return i;
+}
+
+size_t rk3399_ram_sizes(phys_addr_t *base, resource_size_t *size, size_t n)
{
void __iomem *pmugrf = IOMEM(RK3399_PMUGRF_BASE);
u32 sys_reg2, sys_reg3;
- resource_size_t size;
+ resource_size_t memsize;
sys_reg2 = readl(pmugrf + RK3399_PMUGRF_OS_REG2);
sys_reg3 = readl(pmugrf + RK3399_PMUGRF_OS_REG3);
- size = rockchip_sdram_size(sys_reg2, sys_reg3);
- size = min_t(resource_size_t, RK3399_INT_REG_START, size);
+ memsize = rockchip_sdram_size(sys_reg2, sys_reg3);
pr_debug("%s() = %llu\n", __func__, (u64)size);
- return size;
+ return rockchip_ram(RK3399_DRAM_BOTTOM, memsize, RK3399_INT_REG_START, base, size, n);
}
-resource_size_t rk3562_ram0_size(void)
+size_t rk3562_ram_sizes(phys_addr_t *base, resource_size_t *size, size_t n)
{
void __iomem *pmugrf = IOMEM(RK3562_PMUGRF_BASE);
u32 sys_reg2, sys_reg3;
- resource_size_t size;
+ resource_size_t memsize;
sys_reg2 = readl(pmugrf + RK3562_PMUGRF_OS_REG2);
sys_reg3 = readl(pmugrf + RK3562_PMUGRF_OS_REG3);
- size = rockchip_sdram_size(sys_reg2, sys_reg3);
- size = min_t(resource_size_t, RK3562_INT_REG_START, size);
+ memsize = rockchip_sdram_size(sys_reg2, sys_reg3);
- pr_debug("%s() = %llu\n", __func__, (u64)size);
+ pr_debug("%s() = %llu\n", __func__, (u64)memsize);
- return size;
+ return rockchip_ram(RK3562_DRAM_BOTTOM, memsize, RK3562_INT_REG_START, base, size, n);
}
-resource_size_t rk3568_ram0_size(void)
+size_t rk3568_ram_sizes(phys_addr_t *base, resource_size_t *size, size_t n)
{
void __iomem *pmugrf = IOMEM(RK3568_PMUGRF_BASE);
u32 sys_reg2, sys_reg3;
- resource_size_t size;
+ resource_size_t memsize;
sys_reg2 = readl(pmugrf + RK3568_PMUGRF_OS_REG2);
sys_reg3 = readl(pmugrf + RK3568_PMUGRF_OS_REG3);
- size = rockchip_sdram_size(sys_reg2, sys_reg3);
- size = min_t(resource_size_t, RK3568_INT_REG_START, size);
+ memsize = rockchip_sdram_size(sys_reg2, sys_reg3);
- pr_debug("%s() = %llu\n", __func__, (u64)size);
+ pr_debug("%s() = %llu\n", __func__, (u64)memsize);
- return size;
+ return rockchip_ram(RK3568_DRAM_BOTTOM, memsize, RK3568_INT_REG_START, base, size, n);
}
-resource_size_t rk3576_ram0_size(void)
+size_t rk3576_ram_sizes(phys_addr_t *base, resource_size_t *size, size_t n)
{
void __iomem *pmugrf = IOMEM(RK3576_PMUGRF_BASE);
u32 sys_reg2, sys_reg3;
- resource_size_t size;
+ resource_size_t memsize;
sys_reg2 = readl(pmugrf + RK3576_PMUGRF_OS_REG2);
sys_reg3 = readl(pmugrf + RK3576_PMUGRF_OS_REG3);
- size = rockchip_sdram_size(sys_reg2, sys_reg3);
- /* RK3576 has a different memory map...? */
- /* size = min_t(resource_size_t, RK3576_INT_REG_START, size); */
+ memsize = rockchip_sdram_size(sys_reg2, sys_reg3);
pr_debug("%s() = %llu\n", __func__, (u64)size);
- return size;
+ return rockchip_ram(RK3576_DRAM_BOTTOM, memsize, RK3576_INT_REG_START, base, size, n);
}
#define RK3588_PMUGRF_BASE 0xfd58a000
@@ -223,7 +264,6 @@ size_t rk3588_ram_sizes(phys_addr_t *base, resource_size_t *size, size_t n)
void __iomem *pmugrf = IOMEM(RK3588_PMUGRF_BASE);
u32 sys_reg2, sys_reg3, sys_reg4, sys_reg5;
resource_size_t memsize, size1, size2;
- size_t i = 0;
sys_reg2 = readl(pmugrf + RK3588_PMUGRF_OS_REG2);
sys_reg3 = readl(pmugrf + RK3588_PMUGRF_OS_REG3);
@@ -237,45 +277,18 @@ size_t rk3588_ram_sizes(phys_addr_t *base, resource_size_t *size, size_t n)
memsize = size1 + size2;
- base[i] = RK3588_DRAM_BOTTOM;
- size[i] = min_t(resource_size_t, RK3588_INT_REG_START, memsize) - RK3588_DRAM_BOTTOM;
- i++;
-
- if (i < n && memsize > SZ_4G) {
- base[i] = SZ_4G;
- size[i] = min_t(unsigned long, DRAM_GAP1_START, memsize) - SZ_4G;
- i++;
- }
- if (i < n && memsize > DRAM_GAP1_END) {
- base[i] = DRAM_GAP1_END;
- size[i] = min_t(unsigned long, DRAM_GAP2_START, memsize) - DRAM_GAP1_END;
- i++;
- }
- if (i < n && memsize > DRAM_GAP2_END) {
- base[i] = DRAM_GAP2_END;
- size[i] = memsize - DRAM_GAP2_END;
- i++;
- }
-
- return i;
-}
-
-resource_size_t rk3588_ram0_size(void)
-{
- phys_addr_t base;
- resource_size_t size;
-
- rk3588_ram_sizes(&base, &size, 1);
-
- return size;
+ return rockchip_ram(RK3588_DRAM_BOTTOM, memsize, RK3588_INT_REG_START, base, size, n);
}
static int rockchip_dmc_probe(struct device *dev)
{
const struct rockchip_dmc_drvdata *drvdata;
resource_size_t membase, memsize, regstart;
+ phys_addr_t base[ROCKCHIP_MAX_DRAM_RESOURCES];
+ resource_size_t size[ROCKCHIP_MAX_DRAM_RESOURCES];
struct regmap *regmap;
u32 sys_rega, sys_regb;
+ int i, n_res;
regmap = syscon_regmap_lookup_by_phandle(dev->of_node, "rockchip,pmu");
if (IS_ERR(regmap))
@@ -304,26 +317,15 @@ static int rockchip_dmc_probe(struct device *dev)
membase = drvdata->membase;
regstart = drvdata->internal_registers_start;
- if (membase < regstart) {
- /* ram0, from 0xa00000 up to SoC internal register space start */
- arm_add_mem_device("ram0", membase,
- min_t(resource_size_t, drvdata->internal_registers_start, memsize) - membase);
-
- /* ram1, RAM beyond 32bit space up to first gap */
- if (memsize > SZ_4G)
- arm_add_mem_device("ram1", SZ_4G,
- min_t(resource_size_t, DRAM_GAP1_START, memsize) - SZ_4G);
-
- /* ram2, RAM between first and second gap */
- if (memsize > DRAM_GAP1_END)
- arm_add_mem_device("ram2", DRAM_GAP1_END,
- min_t(resource_size_t, DRAM_GAP2_START, memsize) - DRAM_GAP1_END);
-
- /* ram3, remaining RAM after second gap */
- if (memsize > DRAM_GAP2_END)
- arm_add_mem_device("ram3", DRAM_GAP2_END, memsize - DRAM_GAP2_END);
- } else {
- arm_add_mem_device("ram0", membase, memsize - 0xa00000);
+ n_res = rockchip_ram(membase, memsize, regstart, base, size,
+ ROCKCHIP_MAX_DRAM_RESOURCES);
+
+ for (i = 0; i < n_res; i++) {
+ char name[sizeof("ramx")];
+
+ sprintf(name, "ram%u", i);
+
+ arm_add_mem_device(name, base[i], size[i]);
}
return 0;
diff --git a/include/mach/rockchip/dmc.h b/include/mach/rockchip/dmc.h
index ddcf989a30..d1dde1cc65 100644
--- a/include/mach/rockchip/dmc.h
+++ b/include/mach/rockchip/dmc.h
@@ -83,12 +83,12 @@ enum {
#define SYS_REG_CS1_COL_SHIFT(ch) (0 + (ch) * 2)
#define SYS_REG_CS1_COL_MASK 3
-resource_size_t rk3399_ram0_size(void);
-resource_size_t rk3562_ram0_size(void);
-resource_size_t rk3568_ram0_size(void);
-resource_size_t rk3576_ram0_size(void);
-resource_size_t rk3588_ram0_size(void);
+#define ROCKCHIP_MAX_DRAM_RESOURCES 4
+size_t rk3399_ram_sizes(phys_addr_t *base, resource_size_t *size, size_t n);
+size_t rk3562_ram_sizes(phys_addr_t *base, resource_size_t *size, size_t n);
+size_t rk3568_ram_sizes(phys_addr_t *base, resource_size_t *size, size_t n);
+size_t rk3576_ram_sizes(phys_addr_t *base, resource_size_t *size, size_t n);
size_t rk3588_ram_sizes(phys_addr_t *base, resource_size_t *size, size_t n);
#endif
--
2.47.3
^ permalink raw reply [flat|nested] 7+ messages in thread* [PATCH 2/6] ARM: rockchip: atf: make all memory banks available
2026-03-20 8:31 [PATCH 0/6] Rockchip: Enable MMU before uncompressing TF-A and OP-TEE Sascha Hauer
2026-03-20 8:31 ` [PATCH 1/6] ARM: rockchip: dmc: rework DRAM functions Sascha Hauer
@ 2026-03-20 8:31 ` Sascha Hauer
2026-03-20 8:31 ` [PATCH 3/6] ARM: rockchip: atf: add OP-TEE fdt creation function for all SoCs Sascha Hauer
` (3 subsequent siblings)
5 siblings, 0 replies; 7+ messages in thread
From: Sascha Hauer @ 2026-03-20 8:31 UTC (permalink / raw)
To: BAREBOX
The FDT we pass to OP-TEE needs all memory banks, not only the first
one. Passing such a FDT to OP-TEE is currently only implemented for
RK3588, but in preparation to support that for other SoCs make all
memory banks available to atf.c
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
arch/arm/mach-rockchip/atf.c | 42 ++++++++++++++++++++++--------------------
1 file changed, 22 insertions(+), 20 deletions(-)
diff --git a/arch/arm/mach-rockchip/atf.c b/arch/arm/mach-rockchip/atf.c
index cf232e4f6e..4d90aeff49 100644
--- a/arch/arm/mach-rockchip/atf.c
+++ b/arch/arm/mach-rockchip/atf.c
@@ -127,6 +127,9 @@ static uintptr_t rk_load_optee(uintptr_t bl32, struct fwobj *bl32_fw)
return bl32;
}
+static phys_addr_t membase[ROCKCHIP_MAX_DRAM_RESOURCES];
+static resource_size_t memsize[ROCKCHIP_MAX_DRAM_RESOURCES];
+static int n_mem_resources;
static uintptr_t barebox_load_address; /* where barebox is loaded and started */
static uintptr_t optee_load_address; /* standard SoC specific OP-TEE load address */
static struct fwobj bl31; /* TF-A in barebox image */
@@ -168,11 +171,11 @@ void rk3562_atf_load_bl31(void *fdt)
void __noreturn rk3562_barebox_entry(void *fdt)
{
- phys_addr_t membase, memend;
- resource_size_t memsize;
+ phys_addr_t memend;
- rk3562_ram_sizes(&membase, &memsize, 1);
- memend = membase + memsize;
+ n_mem_resources = rk3562_ram_sizes(membase, memsize, ROCKCHIP_MAX_DRAM_RESOURCES);
+
+ memend = membase[0] + memsize[0];
rk_scratch = (void *)arm_mem_scratch(memend);
@@ -196,7 +199,7 @@ void __noreturn rk3562_barebox_entry(void *fdt)
}
optee_set_membase(rk_scratch_get_optee_hdr());
- barebox_arm_entry(membase, memsize, fdt);
+ barebox_arm_entry(membase[0], memsize[0], fdt);
}
void rk3568_atf_load_bl31(void *fdt)
@@ -207,11 +210,11 @@ void rk3568_atf_load_bl31(void *fdt)
void __noreturn rk3568_barebox_entry(void *fdt)
{
- phys_addr_t membase, memend;
- resource_size_t memsize;
+ phys_addr_t memend;
+
+ n_mem_resources = rk3568_ram_sizes(membase, memsize, ROCKCHIP_MAX_DRAM_RESOURCES);
- rk3568_ram_sizes(&membase, &memsize, 1);
- memend = membase + memsize;
+ memend = membase[0] + memsize[0];
rk_scratch = (void *)arm_mem_scratch(memend);
@@ -235,7 +238,7 @@ void __noreturn rk3568_barebox_entry(void *fdt)
}
optee_set_membase(rk_scratch_get_optee_hdr());
- barebox_arm_entry(membase, memsize, fdt);
+ barebox_arm_entry(membase[0], memsize[0], fdt);
}
void rk3588_atf_load_bl31(void *fdt)
@@ -278,12 +281,11 @@ static int rk3588_open_fdt(const void *fdt, void *buf, int bufsize)
void __noreturn rk3588_barebox_entry(void *fdt)
{
- phys_addr_t membase, memend;
- resource_size_t memsize;
+ phys_addr_t memend;
- rk3588_ram_sizes(&membase, &memsize, 1);
+ n_mem_resources = rk3588_ram_sizes(membase, memsize, ROCKCHIP_MAX_DRAM_RESOURCES);
- memend = membase + memsize;
+ memend = membase[0] + memsize[0];
rk_scratch = (void *)arm_mem_scratch(memend);
@@ -309,7 +311,7 @@ void __noreturn rk3588_barebox_entry(void *fdt)
}
optee_set_membase(rk_scratch_get_optee_hdr());
- barebox_arm_entry(membase, memsize, fdt);
+ barebox_arm_entry(membase[0], memsize[0], fdt);
}
void rk3576_atf_load_bl31(void *fdt)
@@ -320,11 +322,11 @@ void rk3576_atf_load_bl31(void *fdt)
void __noreturn rk3576_barebox_entry(void *fdt)
{
- phys_addr_t membase, memend;
- resource_size_t memsize;
+ phys_addr_t memend;
+
+ n_mem_resources = rk3576_ram_sizes(membase, memsize, ROCKCHIP_MAX_DRAM_RESOURCES);
- rk3576_ram_sizes(&membase, &memsize, 1);
- memend = membase + memsize;
+ memend = membase[0] + memsize[0];
rk_scratch = (void *)arm_mem_scratch(memend);
@@ -348,5 +350,5 @@ void __noreturn rk3576_barebox_entry(void *fdt)
}
optee_set_membase(rk_scratch_get_optee_hdr());
- barebox_arm_entry(membase, memsize, fdt);
+ barebox_arm_entry(membase[0], memsize[0], fdt);
}
--
2.47.3
^ permalink raw reply [flat|nested] 7+ messages in thread* [PATCH 3/6] ARM: rockchip: atf: add OP-TEE fdt creation function for all SoCs
2026-03-20 8:31 [PATCH 0/6] Rockchip: Enable MMU before uncompressing TF-A and OP-TEE Sascha Hauer
2026-03-20 8:31 ` [PATCH 1/6] ARM: rockchip: dmc: rework DRAM functions Sascha Hauer
2026-03-20 8:31 ` [PATCH 2/6] ARM: rockchip: atf: make all memory banks available Sascha Hauer
@ 2026-03-20 8:31 ` Sascha Hauer
2026-03-20 8:31 ` [PATCH 4/6] ARM: Rockchip: Drop rk3xxx_atf_load_bl31() Sascha Hauer
` (2 subsequent siblings)
5 siblings, 0 replies; 7+ messages in thread
From: Sascha Hauer @ 2026-03-20 8:31 UTC (permalink / raw)
To: BAREBOX
We have rk3588_open_fdt() to create an empty flattened device tree and
rk3588_fixup_mem() to populate it with the memory banks, but there is
nothing rk3588 specific in it, so refactor the code to
rockchip_create_optee_fdt() which could be used by all rockchip SoCs.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
arch/arm/mach-rockchip/atf.c | 68 ++++++++++++++++++--------------------------
1 file changed, 27 insertions(+), 41 deletions(-)
diff --git a/arch/arm/mach-rockchip/atf.c b/arch/arm/mach-rockchip/atf.c
index 4d90aeff49..37802bfade 100644
--- a/arch/arm/mach-rockchip/atf.c
+++ b/arch/arm/mach-rockchip/atf.c
@@ -145,6 +145,28 @@ static struct fwobj bl32; /* OP-TEE in barebox image */
} while (0)
+static int rockchip_create_optee_fdt(void *buf, int bufsize)
+{
+ unsigned long base[ROCKCHIP_MAX_DRAM_RESOURCES];
+ unsigned long size[ARRAY_SIZE(base)];
+ int i, root;
+
+ if (fdt_create_empty_tree(buf, bufsize) != 0)
+ return -EINVAL;
+
+ root = fdt_path_offset(buf, "/");
+
+ fdt_setprop_u32(buf, root, "#address-cells", 2);
+ fdt_setprop_u32(buf, root, "#size-cells", 2);
+
+ for (i = 0; i < n_mem_resources; i++) {
+ base[i] = membase[i];
+ size[i] = memsize[i];
+ }
+
+ return fdt_fixup_mem(buf, base, size, n_mem_resources);
+}
+
static void rockchip_atf_load_bl31(void *fdt)
{
unsigned long bl31_ep;
@@ -247,41 +269,10 @@ void rk3588_atf_load_bl31(void *fdt)
rockchip_atf_load_bl31(fdt);
}
-static int rk3588_fixup_mem(void *fdt)
-{
- /* Use 4 blocks since rk3588 has 3 gaps in the address space */
- unsigned long base[4];
- unsigned long size[ARRAY_SIZE(base)];
- phys_addr_t base_tmp[ARRAY_SIZE(base)];
- resource_size_t size_tmp[ARRAY_SIZE(base_tmp)];
- int i, n;
-
- n = rk3588_ram_sizes(base_tmp, size_tmp, ARRAY_SIZE(base_tmp));
- for (i = 0; i < n; i++) {
- base[i] = base_tmp[i];
- size[i] = size_tmp[i];
- }
-
- return fdt_fixup_mem(fdt, base, size, i);
-}
-
-static int rk3588_open_fdt(const void *fdt, void *buf, int bufsize)
-{
- int root;
-
- if (fdt_create_empty_tree(buf, bufsize) != 0)
- return -1;
- root = fdt_path_offset(buf, "/");
-
- fdt_setprop_u32(buf, root, "#address-cells", 2);
- fdt_setprop_u32(buf, root, "#size-cells", 2);
-
- return 0;
-}
-
void __noreturn rk3588_barebox_entry(void *fdt)
{
phys_addr_t memend;
+ int ret;
n_mem_resources = rk3588_ram_sizes(membase, memsize, ROCKCHIP_MAX_DRAM_RESOURCES);
@@ -290,23 +281,18 @@ void __noreturn rk3588_barebox_entry(void *fdt)
rk_scratch = (void *)arm_mem_scratch(memend);
if (current_el() == 3) {
- void *fdt_scratch = NULL;
-
rk3588_lowlevel_init();
rockchip_store_bootrom_iram(IOMEM(RK3588_IRAM_BASE));
if (IS_ENABLED(CONFIG_ARCH_ROCKCHIP_ATF_PASS_FDT)) {
pr_debug("Copy fdt to scratch area 0x%p (%zu bytes)\n",
rk_scratch->fdt, sizeof(rk_scratch->fdt));
- if (rk3588_open_fdt(fdt, rk_scratch->fdt, sizeof(rk_scratch->fdt)) == 0)
- fdt_scratch = rk_scratch->fdt;
- else
- pr_warn("Failed to copy fdt to scratch: Continue without fdt\n");
- if (fdt_scratch && rk3588_fixup_mem(fdt_scratch) != 0)
- pr_warn("Failed to fixup memory nodes\n");
+ ret = rockchip_create_optee_fdt(rk_scratch->fdt, sizeof(rk_scratch->fdt));
+ if (ret)
+ pr_warn("Failed to create OP-TEE Device tree\n");
}
- rk3588_atf_load_bl31(fdt_scratch);
+ rk3588_atf_load_bl31(rk_scratch->fdt);
/* not reached when CONFIG_ARCH_ROCKCHIP_ATF */
}
--
2.47.3
^ permalink raw reply [flat|nested] 7+ messages in thread* [PATCH 4/6] ARM: Rockchip: Drop rk3xxx_atf_load_bl31()
2026-03-20 8:31 [PATCH 0/6] Rockchip: Enable MMU before uncompressing TF-A and OP-TEE Sascha Hauer
` (2 preceding siblings ...)
2026-03-20 8:31 ` [PATCH 3/6] ARM: rockchip: atf: add OP-TEE fdt creation function for all SoCs Sascha Hauer
@ 2026-03-20 8:31 ` Sascha Hauer
2026-03-20 8:31 ` [PATCH 5/6] ARM: rockchip: separate physical DRAM start from usable start Sascha Hauer
2026-03-20 8:31 ` [PATCH 6/6] ARM: rockchip: atf: enable MMU in PBL Sascha Hauer
5 siblings, 0 replies; 7+ messages in thread
From: Sascha Hauer @ 2026-03-20 8:31 UTC (permalink / raw)
To: BAREBOX
rk3xxx_atf_load_bl31() are exported but only used in atf.c. Drop these
functions and inline the code in rk3xxx_barebox_entry().
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
arch/arm/mach-rockchip/atf.c | 36 ++++++++----------------------------
include/mach/rockchip/atf.h | 14 --------------
2 files changed, 8 insertions(+), 42 deletions(-)
diff --git a/arch/arm/mach-rockchip/atf.c b/arch/arm/mach-rockchip/atf.c
index 37802bfade..4e1b9f6a21 100644
--- a/arch/arm/mach-rockchip/atf.c
+++ b/arch/arm/mach-rockchip/atf.c
@@ -185,12 +185,6 @@ static void rockchip_atf_load_bl31(void *fdt)
barebox_load_address, (uintptr_t)fdt);
}
-void rk3562_atf_load_bl31(void *fdt)
-{
- ROCKCHIP_GET_ADDRESSES(RK3562, rk3562_bl31_bin, rk3562_bl32_bin);
- rockchip_atf_load_bl31(fdt);
-}
-
void __noreturn rk3562_barebox_entry(void *fdt)
{
phys_addr_t memend;
@@ -204,6 +198,7 @@ void __noreturn rk3562_barebox_entry(void *fdt)
if (current_el() == 3) {
rk3562_lowlevel_init();
rockchip_store_bootrom_iram(IOMEM(RK3562_IRAM_BASE));
+ ROCKCHIP_GET_ADDRESSES(RK3562, rk3562_bl31_bin, rk3562_bl32_bin);
/*
* The downstream TF-A doesn't cope with our device tree when
@@ -216,7 +211,7 @@ void __noreturn rk3562_barebox_entry(void *fdt)
* Pass NULL for now until we have a good reason to pass a real
* device tree.
*/
- rk3562_atf_load_bl31(NULL);
+ rockchip_atf_load_bl31(NULL);
/* not reached when CONFIG_ARCH_ROCKCHIP_ATF */
}
@@ -224,12 +219,6 @@ void __noreturn rk3562_barebox_entry(void *fdt)
barebox_arm_entry(membase[0], memsize[0], fdt);
}
-void rk3568_atf_load_bl31(void *fdt)
-{
- ROCKCHIP_GET_ADDRESSES(RK3568, rk3568_bl31_bin, rk3568_bl32_bin);
- rockchip_atf_load_bl31(fdt);
-}
-
void __noreturn rk3568_barebox_entry(void *fdt)
{
phys_addr_t memend;
@@ -243,6 +232,7 @@ void __noreturn rk3568_barebox_entry(void *fdt)
if (current_el() == 3) {
rk3568_lowlevel_init();
rockchip_store_bootrom_iram(IOMEM(RK3568_IRAM_BASE));
+ ROCKCHIP_GET_ADDRESSES(RK3568, rk3568_bl31_bin, rk3568_bl32_bin);
/*
* The downstream TF-A doesn't cope with our device tree when
@@ -255,7 +245,7 @@ void __noreturn rk3568_barebox_entry(void *fdt)
* Pass NULL for now until we have a good reason to pass a real
* device tree.
*/
- rk3568_atf_load_bl31(NULL);
+ rockchip_atf_load_bl31(NULL);
/* not reached when CONFIG_ARCH_ROCKCHIP_ATF */
}
@@ -263,12 +253,6 @@ void __noreturn rk3568_barebox_entry(void *fdt)
barebox_arm_entry(membase[0], memsize[0], fdt);
}
-void rk3588_atf_load_bl31(void *fdt)
-{
- ROCKCHIP_GET_ADDRESSES(RK3588, rk3588_bl31_bin, rk3588_bl32_bin);
- rockchip_atf_load_bl31(fdt);
-}
-
void __noreturn rk3588_barebox_entry(void *fdt)
{
phys_addr_t memend;
@@ -283,6 +267,7 @@ void __noreturn rk3588_barebox_entry(void *fdt)
if (current_el() == 3) {
rk3588_lowlevel_init();
rockchip_store_bootrom_iram(IOMEM(RK3588_IRAM_BASE));
+ ROCKCHIP_GET_ADDRESSES(RK3588, rk3588_bl31_bin, rk3588_bl32_bin);
if (IS_ENABLED(CONFIG_ARCH_ROCKCHIP_ATF_PASS_FDT)) {
pr_debug("Copy fdt to scratch area 0x%p (%zu bytes)\n",
@@ -292,7 +277,7 @@ void __noreturn rk3588_barebox_entry(void *fdt)
pr_warn("Failed to create OP-TEE Device tree\n");
}
- rk3588_atf_load_bl31(rk_scratch->fdt);
+ rockchip_atf_load_bl31(rk_scratch->fdt);
/* not reached when CONFIG_ARCH_ROCKCHIP_ATF */
}
@@ -300,12 +285,6 @@ void __noreturn rk3588_barebox_entry(void *fdt)
barebox_arm_entry(membase[0], memsize[0], fdt);
}
-void rk3576_atf_load_bl31(void *fdt)
-{
- ROCKCHIP_GET_ADDRESSES(RK3576, rk3576_bl31_bin, rk3576_bl32_bin);
- rockchip_atf_load_bl31(fdt);
-}
-
void __noreturn rk3576_barebox_entry(void *fdt)
{
phys_addr_t memend;
@@ -321,6 +300,7 @@ void __noreturn rk3576_barebox_entry(void *fdt)
rk3576_lowlevel_init();
rockchip_store_bootrom_iram(IOMEM(RK3576_IRAM_BASE));
+ ROCKCHIP_GET_ADDRESSES(RK3576, rk3576_bl31_bin, rk3576_bl32_bin);
if (IS_ENABLED(CONFIG_ARCH_ROCKCHIP_ATF_PASS_FDT)) {
pr_debug("Copy fdt to scratch area 0x%p (%zu bytes)\n",
@@ -331,7 +311,7 @@ void __noreturn rk3576_barebox_entry(void *fdt)
pr_warn("Failed to copy fdt to scratch: Continue without fdt\n");
}
- rk3576_atf_load_bl31(fdt_scratch);
+ rockchip_atf_load_bl31(fdt_scratch);
/* not reached when CONFIG_ARCH_ROCKCHIP_ATF */
}
diff --git a/include/mach/rockchip/atf.h b/include/mach/rockchip/atf.h
index b8627a3598..5454d394a1 100644
--- a/include/mach/rockchip/atf.h
+++ b/include/mach/rockchip/atf.h
@@ -42,20 +42,6 @@
#define RK3576_BAREBOX_LOAD_ADDRESS (RK3576_DRAM_BOTTOM + 1024*1024)
#define RK3588_BAREBOX_LOAD_ADDRESS (RK3588_DRAM_BOTTOM + 1024*1024)
-#ifndef __ASSEMBLY__
-#ifdef CONFIG_ARCH_ROCKCHIP_ATF
-void rk3562_atf_load_bl31(void *fdt);
-void rk3568_atf_load_bl31(void *fdt);
-void rk3576_atf_load_bl31(void *fdt);
-void rk3588_atf_load_bl31(void *fdt);
-#else
-static inline void rk3562_atf_load_bl31(void *fdt) { }
-static inline void rk3568_atf_load_bl31(void *fdt) { }
-static inline void rk3576_atf_load_bl31(void *fdt) { }
-static inline void rk3588_atf_load_bl31(void *fdt) { }
-#endif
-#endif
-
void __noreturn rk3562_barebox_entry(void *fdt);
void __noreturn rk3568_barebox_entry(void *fdt);
void __noreturn rk3576_barebox_entry(void *fdt);
--
2.47.3
^ permalink raw reply [flat|nested] 7+ messages in thread* [PATCH 5/6] ARM: rockchip: separate physical DRAM start from usable start
2026-03-20 8:31 [PATCH 0/6] Rockchip: Enable MMU before uncompressing TF-A and OP-TEE Sascha Hauer
` (3 preceding siblings ...)
2026-03-20 8:31 ` [PATCH 4/6] ARM: Rockchip: Drop rk3xxx_atf_load_bl31() Sascha Hauer
@ 2026-03-20 8:31 ` Sascha Hauer
2026-03-20 8:31 ` [PATCH 6/6] ARM: rockchip: atf: enable MMU in PBL Sascha Hauer
5 siblings, 0 replies; 7+ messages in thread
From: Sascha Hauer @ 2026-03-20 8:31 UTC (permalink / raw)
To: BAREBOX
The RK3xxx_DRAM_BOTTOM macros define the first usable DRAM address, that
is the physical DRAM start plus the offset occupied by the TF-A. With
upcoming PBL mmu support we need both addresses, so separate them.
We use RK3xxx_DRAM_START for the physical start and add
ROCKCHIP_DRAM_TFA_CARVE_OUT where needed.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
arch/arm/mach-rockchip/dmc.c | 24 ++++++++++++------------
include/mach/rockchip/atf.h | 24 +++++++++++++-----------
2 files changed, 25 insertions(+), 23 deletions(-)
diff --git a/arch/arm/mach-rockchip/dmc.c b/arch/arm/mach-rockchip/dmc.c
index 318e99d8ba..9218f794f9 100644
--- a/arch/arm/mach-rockchip/dmc.c
+++ b/arch/arm/mach-rockchip/dmc.c
@@ -160,13 +160,13 @@ static size_t rockchip_ram(phys_addr_t membase, resource_size_t memsize,
* RK3576 has internal registers below the DRAM start and thus
* doesn't need any gaps in the DRAM space.
*/
- base[0] = membase;
+ base[0] = membase + ROCKCHIP_DRAM_TFA_CARVE_OUT;
size[0] = memsize;
return 1;
}
- base[i] = membase;
+ base[i] = membase + ROCKCHIP_DRAM_TFA_CARVE_OUT;
size[i] = min_t(resource_size_t, RK3588_INT_REG_START, memsize) - membase;
i++;
@@ -202,7 +202,7 @@ size_t rk3399_ram_sizes(phys_addr_t *base, resource_size_t *size, size_t n)
pr_debug("%s() = %llu\n", __func__, (u64)size);
- return rockchip_ram(RK3399_DRAM_BOTTOM, memsize, RK3399_INT_REG_START, base, size, n);
+ return rockchip_ram(RK3399_DRAM_START, memsize, RK3399_INT_REG_START, base, size, n);
}
size_t rk3562_ram_sizes(phys_addr_t *base, resource_size_t *size, size_t n)
@@ -218,7 +218,7 @@ size_t rk3562_ram_sizes(phys_addr_t *base, resource_size_t *size, size_t n)
pr_debug("%s() = %llu\n", __func__, (u64)memsize);
- return rockchip_ram(RK3562_DRAM_BOTTOM, memsize, RK3562_INT_REG_START, base, size, n);
+ return rockchip_ram(RK3562_DRAM_START, memsize, RK3562_INT_REG_START, base, size, n);
}
size_t rk3568_ram_sizes(phys_addr_t *base, resource_size_t *size, size_t n)
@@ -234,7 +234,7 @@ size_t rk3568_ram_sizes(phys_addr_t *base, resource_size_t *size, size_t n)
pr_debug("%s() = %llu\n", __func__, (u64)memsize);
- return rockchip_ram(RK3568_DRAM_BOTTOM, memsize, RK3568_INT_REG_START, base, size, n);
+ return rockchip_ram(RK3568_DRAM_START, memsize, RK3568_INT_REG_START, base, size, n);
}
size_t rk3576_ram_sizes(phys_addr_t *base, resource_size_t *size, size_t n)
@@ -250,7 +250,7 @@ size_t rk3576_ram_sizes(phys_addr_t *base, resource_size_t *size, size_t n)
pr_debug("%s() = %llu\n", __func__, (u64)size);
- return rockchip_ram(RK3576_DRAM_BOTTOM, memsize, RK3576_INT_REG_START, base, size, n);
+ return rockchip_ram(RK3576_DRAM_START, memsize, RK3576_INT_REG_START, base, size, n);
}
#define RK3588_PMUGRF_BASE 0xfd58a000
@@ -277,7 +277,7 @@ size_t rk3588_ram_sizes(phys_addr_t *base, resource_size_t *size, size_t n)
memsize = size1 + size2;
- return rockchip_ram(RK3588_DRAM_BOTTOM, memsize, RK3588_INT_REG_START, base, size, n);
+ return rockchip_ram(RK3588_DRAM_START, memsize, RK3588_INT_REG_START, base, size, n);
}
static int rockchip_dmc_probe(struct device *dev)
@@ -335,28 +335,28 @@ static const struct rockchip_dmc_drvdata rk3399_drvdata = {
.os_reg2 = RK3399_PMUGRF_OS_REG2,
.os_reg3 = RK3399_PMUGRF_OS_REG3,
.internal_registers_start = RK3399_INT_REG_START,
- .membase = RK3399_DRAM_BOTTOM,
+ .membase = RK3399_DRAM_START,
};
static const struct rockchip_dmc_drvdata rk3562_drvdata = {
.os_reg2 = RK3562_PMUGRF_OS_REG2,
.os_reg3 = RK3562_PMUGRF_OS_REG3,
.internal_registers_start = RK3562_INT_REG_START,
- .membase = RK3562_DRAM_BOTTOM,
+ .membase = RK3562_DRAM_START,
};
static const struct rockchip_dmc_drvdata rk3568_drvdata = {
.os_reg2 = RK3568_PMUGRF_OS_REG2,
.os_reg3 = RK3568_PMUGRF_OS_REG3,
.internal_registers_start = RK3568_INT_REG_START,
- .membase = RK3568_DRAM_BOTTOM,
+ .membase = RK3568_DRAM_START,
};
static const struct rockchip_dmc_drvdata rk3576_drvdata = {
.os_reg2 = RK3576_PMUGRF_OS_REG2,
.os_reg3 = RK3576_PMUGRF_OS_REG3,
.internal_registers_start = RK3576_INT_REG_START,
- .membase = RK3576_DRAM_BOTTOM,
+ .membase = RK3576_DRAM_START,
};
static const struct rockchip_dmc_drvdata rk3588_drvdata = {
@@ -365,7 +365,7 @@ static const struct rockchip_dmc_drvdata rk3588_drvdata = {
.os_reg4 = RK3588_PMUGRF_OS_REG4,
.os_reg5 = RK3588_PMUGRF_OS_REG5,
.internal_registers_start = RK3588_INT_REG_START,
- .membase = RK3588_DRAM_BOTTOM,
+ .membase = RK3588_DRAM_START,
};
static struct of_device_id rockchip_dmc_dt_ids[] = {
diff --git a/include/mach/rockchip/atf.h b/include/mach/rockchip/atf.h
index 5454d394a1..c2daaa662c 100644
--- a/include/mach/rockchip/atf.h
+++ b/include/mach/rockchip/atf.h
@@ -3,12 +3,14 @@
#ifndef __MACH_ATF_H
#define __MACH_ATF_H
-/* First usable DRAM address. Lower mem is used for ATF and OP-TEE */
-#define RK3399_DRAM_BOTTOM 0xa00000
-#define RK3562_DRAM_BOTTOM 0xa00000
-#define RK3568_DRAM_BOTTOM 0xa00000
-#define RK3576_DRAM_BOTTOM 0x40a00000
-#define RK3588_DRAM_BOTTOM 0xa00000
+/* The first 10MiB of DRAM are used by the TF-A */
+#define ROCKCHIP_DRAM_TFA_CARVE_OUT 0xa00000
+
+#define RK3399_DRAM_START 0x0
+#define RK3562_DRAM_START 0x0
+#define RK3568_DRAM_START 0x0
+#define RK3576_DRAM_START 0x40000000
+#define RK3588_DRAM_START 0x0
/*
* The tee.bin image has an OP-TEE specific header that describes the
@@ -36,11 +38,11 @@
* board lowlevel code should relocate barebox here. This is where
* OP-TEE jumps to after initialization.
*/
-#define RK3399_BAREBOX_LOAD_ADDRESS (RK3399_DRAM_BOTTOM + 1024*1024)
-#define RK3562_BAREBOX_LOAD_ADDRESS (RK3562_DRAM_BOTTOM + 1024*1024)
-#define RK3568_BAREBOX_LOAD_ADDRESS (RK3568_DRAM_BOTTOM + 1024*1024)
-#define RK3576_BAREBOX_LOAD_ADDRESS (RK3576_DRAM_BOTTOM + 1024*1024)
-#define RK3588_BAREBOX_LOAD_ADDRESS (RK3588_DRAM_BOTTOM + 1024*1024)
+#define RK3399_BAREBOX_LOAD_ADDRESS (RK3399_DRAM_START + ROCKCHIP_DRAM_TFA_CARVE_OUT + 1024*1024)
+#define RK3562_BAREBOX_LOAD_ADDRESS (RK3562_DRAM_START + ROCKCHIP_DRAM_TFA_CARVE_OUT + 1024*1024)
+#define RK3568_BAREBOX_LOAD_ADDRESS (RK3568_DRAM_START + ROCKCHIP_DRAM_TFA_CARVE_OUT + 1024*1024)
+#define RK3576_BAREBOX_LOAD_ADDRESS (RK3576_DRAM_START + ROCKCHIP_DRAM_TFA_CARVE_OUT + 1024*1024)
+#define RK3588_BAREBOX_LOAD_ADDRESS (RK3588_DRAM_START + ROCKCHIP_DRAM_TFA_CARVE_OUT + 1024*1024)
void __noreturn rk3562_barebox_entry(void *fdt);
void __noreturn rk3568_barebox_entry(void *fdt);
--
2.47.3
^ permalink raw reply [flat|nested] 7+ messages in thread* [PATCH 6/6] ARM: rockchip: atf: enable MMU in PBL
2026-03-20 8:31 [PATCH 0/6] Rockchip: Enable MMU before uncompressing TF-A and OP-TEE Sascha Hauer
` (4 preceding siblings ...)
2026-03-20 8:31 ` [PATCH 5/6] ARM: rockchip: separate physical DRAM start from usable start Sascha Hauer
@ 2026-03-20 8:31 ` Sascha Hauer
5 siblings, 0 replies; 7+ messages in thread
From: Sascha Hauer @ 2026-03-20 8:31 UTC (permalink / raw)
To: BAREBOX
Using compressed binaries for TF-A and OP-TEE comes with the penalty of
additional startup time. Enable the MMU before uncompressing to speed
that up significantly.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
arch/arm/mach-rockchip/atf.c | 6 +++++-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/arch/arm/mach-rockchip/atf.c b/arch/arm/mach-rockchip/atf.c
index 4e1b9f6a21..aa2733bdac 100644
--- a/arch/arm/mach-rockchip/atf.c
+++ b/arch/arm/mach-rockchip/atf.c
@@ -7,6 +7,7 @@
#include <tee/optee.h>
#include <asm/atf_common.h>
#include <asm/barebox-arm.h>
+#include <asm/mmu.h>
#include <asm-generic/memory_layout.h>
#include <asm-generic/sections.h>
#include <mach/rockchip/dmc.h>
@@ -144,7 +145,6 @@ static struct fwobj bl32; /* OP-TEE in barebox image */
get_builtin_firmware_compressed(tee_bin, &bl32); \
} while (0)
-
static int rockchip_create_optee_fdt(void *buf, int bufsize)
{
unsigned long base[ROCKCHIP_MAX_DRAM_RESOURCES];
@@ -171,6 +171,8 @@ static void rockchip_atf_load_bl31(void *fdt)
{
unsigned long bl31_ep;
+ mmu_early_enable(membase[0], membase[0] + memsize[0]);
+
bl31_ep = load_elf64_image_phdr(&bl31);
if (IS_ENABLED(CONFIG_ARCH_ROCKCHIP_OPTEE))
@@ -181,6 +183,8 @@ static void rockchip_atf_load_bl31(void *fdt)
"r" ((ulong)barebox_load_address - 16) :
"cc");
+ mmu_disable();
+
bl31_entry(bl31_ep, optee_load_address,
barebox_load_address, (uintptr_t)fdt);
}
--
2.47.3
^ permalink raw reply [flat|nested] 7+ messages in thread