[PATCH 2/4] ARM: i.MX8M/i.MX7: initialize SNVS glitch detection for all families

[Stefan Kerkmann <s.kerkmann@pengutronix.de>]

The value and register is identical across i.MX8M and i.MX7 so move the
block to the shared snvs_init() function.

Signed-off-by: Stefan Kerkmann <s.kerkmann@pengutronix.de>
---
 arch/arm/mach-imx/snvs.c | 12 ++++++------
 1 file changed, 6 insertions(+), 6 deletions(-)

diff --git a/arch/arm/mach-imx/snvs.c b/arch/arm/mach-imx/snvs.c
index 80df62ad96..414e927b05 100644
--- a/arch/arm/mach-imx/snvs.c
+++ b/arch/arm/mach-imx/snvs.c
@@ -22,6 +22,11 @@ static void snvs_init(void __iomem *snvs)
 	val = readl(snvs + SNVS_HPCOMR);
 	val |= SNVS_HPCOMR_NPSWA_EN;
 	writel(val, snvs + SNVS_HPCOMR);
+
+	/* Initialize glitch detect */
+	writel(SNVS_LPPGDR_INIT, snvs + SNVS_LPLVDR);
+	/* Clear interrupt status */
+	writel(0xffffffff, snvs + SNVS_LPSR);
 }
 
 void imx7_snvs_init(void)
@@ -35,10 +40,5 @@ void imx8m_setup_snvs(void)
 {
 	void __iomem *snvs = IOMEM(MX8M_SNVS_BASE_ADDR);
 
-        /* Initialize glitch detect */
-        writel(SNVS_LPPGDR_INIT, snvs + SNVS_LPLVDR);
-        /* Clear interrupt status */
-        writel(0xffffffff, snvs + SNVS_LPSR);
-
-        snvs_init(snvs);
+	snvs_init(snvs);
 }

-- 
2.47.3