From: Ahmad Fatoum <a.fatoum@barebox.org>
To: barebox@lists.infradead.org
Cc: Ahmad Fatoum <a.fatoum@barebox.org>
Subject: [PATCH v2 6/9] mci: sdhci: define same SDHCI_INT_* constants as Linux
Date: Fri, 26 Jun 2026 18:19:37 +0200 [thread overview]
Message-ID: <20260626162136.1885999-6-a.fatoum@barebox.org> (raw)
In-Reply-To: <20260626162136.1885999-1-a.fatoum@barebox.org>
We already define a number of these bits and make use of them, but not
all of them are named identically to Linux.
To make code easier to port and avoid confusion, just define the Linux
bits as well.
Signed-off-by: Ahmad Fatoum <a.fatoum@barebox.org>
---
v1 -> v2:
- new commit
---
drivers/mci/sdhci.h | 27 +++++++++++++++++++++++++++
1 file changed, 27 insertions(+)
diff --git a/drivers/mci/sdhci.h b/drivers/mci/sdhci.h
index d1f05ac96859..a3b8e65b55ee 100644
--- a/drivers/mci/sdhci.h
+++ b/drivers/mci/sdhci.h
@@ -111,6 +111,10 @@
#define SDHCI_RESET_DATA BIT(2)
#define SDHCI_INT_STATUS 0x30
#define SDHCI_INT_NORMAL_STATUS 0x30
+#define SDHCI_INT_TUNING_ERROR BIT(26)
+#define SDHCI_INT_ADMA_ERROR BIT(25)
+#define SDHCI_INT_AUTO_CMD_ERR BIT(24)
+#define SDHCI_INT_BUS_POWER BIT(23)
#define SDHCI_INT_DATA_END_BIT BIT(22)
#define SDHCI_INT_DATA_CRC BIT(21)
#define SDHCI_INT_DATA_TIMEOUT BIT(20)
@@ -119,13 +123,36 @@
#define SDHCI_INT_CRC BIT(17)
#define SDHCI_INT_TIMEOUT BIT(16)
#define SDHCI_INT_ERROR BIT(15)
+#define SDHCI_INT_CQE BIT(14)
+/* Host Version 4.10 */
+#define SDHCI_INT_FX_EVENT BIT(13)
+#define SDHCI_INT_RETUNE BIT(12)
#define SDHCI_INT_CARD_INT BIT(8)
#define SDHCI_INT_CARD_INSERT BIT(6)
#define SDHCI_INT_DATA_AVAIL BIT(5)
#define SDHCI_INT_SPACE_AVAIL BIT(4)
#define SDHCI_INT_DMA BIT(3)
+#define SDHCI_INT_BLK_GAP BIT(2)
#define SDHCI_INT_XFER_COMPLETE BIT(1)
#define SDHCI_INT_CMD_COMPLETE BIT(0)
+
+/* Linux-compatible constants */
+#define SDHCI_INT_RESPONSE SDHCI_INT_CMD_COMPLETE
+#define SDHCI_INT_DATA_END SDHCI_INT_XFER_COMPLETE
+#define SDHCI_INT_DMA_END SDHCI_INT_DMA
+#define SDHCI_INT_CARD_REMOVE SDHCI_INT_CARD_INT
+
+#define SDHCI_INT_CMD_MASK (SDHCI_INT_RESPONSE | SDHCI_INT_TIMEOUT | \
+ SDHCI_INT_CRC | SDHCI_INT_END_BIT | SDHCI_INT_INDEX | \
+ SDHCI_INT_AUTO_CMD_ERR)
+#define SDHCI_INT_DATA_MASK (SDHCI_INT_DATA_END | SDHCI_INT_DMA_END | \
+ SDHCI_INT_DATA_AVAIL | SDHCI_INT_SPACE_AVAIL | \
+ SDHCI_INT_DATA_TIMEOUT | SDHCI_INT_DATA_CRC | \
+ SDHCI_INT_DATA_END_BIT | SDHCI_INT_ADMA_ERROR | \
+ SDHCI_INT_BLK_GAP | SDHCI_INT_TUNING_ERROR)
+#define SDHCI_INT_ALL_MASK ((unsigned int)-1)
+
+
#define SDHCI_INT_ERROR_STATUS 0x32
#define SDHCI_INT_ENABLE 0x34
#define SDHCI_INT_ERROR_ENABLE 0x36
--
2.47.3
next prev parent reply other threads:[~2026-06-26 16:23 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-06-26 16:19 [PATCH v2 1/9] scripts: duplicate conftest.py as qemu_interactive.py Ahmad Fatoum
2026-06-26 16:19 ` [PATCH v2 2/9] test: move interactive QEMU launcher out of pytest Ahmad Fatoum
2026-06-26 16:19 ` [PATCH v2 3/9] usb: xhci-hcd: add XHCI over PCI driver Ahmad Fatoum
2026-06-26 16:19 ` [PATCH v2 4/9] scripts: qemu_interactive.py: add new --usbblk option Ahmad Fatoum
2026-06-26 16:19 ` [PATCH v2 5/9] scripts: qemu_interactive.py: add new --nvmeblk option Ahmad Fatoum
2026-06-26 16:19 ` Ahmad Fatoum [this message]
2026-06-26 16:19 ` [PATCH v2 7/9] mci: add PCI SDHCI controller support Ahmad Fatoum
2026-06-26 16:19 ` [PATCH v2 8/9] ARM: multi_v8_defconfig: enable OP-TEE and RPMB support Ahmad Fatoum
2026-06-26 16:19 ` [PATCH v2 9/9] scripts: qemu_interactive.py: add new --sdblk and --emmcblk options Ahmad Fatoum
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