From: Johannes Schneider <johannes.schneider@leica-geosystems.com>
To: barebox@lists.infradead.org
Cc: Johannes Schneider <johannes.schneider@leica-geosystems.com>
Subject: [PATCH v1 3/7] mci: sdhci: honor BROKEN_ADMA_ZEROLEN_DESC / NO_ENDATTR_IN_NOPDESC quirks
Date: Sat, 27 Jun 2026 19:43:20 +0000 [thread overview]
Message-ID: <20260627194324.2230643-3-johannes.schneider@leica-geosystems.com> (raw)
In-Reply-To: <20260627194324.2230643-1-johannes.schneider@leica-geosystems.com>
The ADMA2 table builder always emitted a 64 KiB chunk as a length-0 descriptor
(the 16-bit length field encodes 65536 as 0) and terminated the table with a
separate NOP-END descriptor. Some controllers mishandle these forms; Linux
gates the workarounds behind SDHCI_QUIRK_BROKEN_ADMA_ZEROLEN_DESC (cap the
length below 64 KiB so it is never 0) and SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC
(mark END on the last transfer descriptor instead of a trailing NOP-END).
Add both quirks to the shared SDHCI layer and honor them in the table builder.
Controllers that set neither keep the previous behaviour exactly, so this is a
no-op for everyone until a host driver opts in.
Assisted-by: Claude Opus 4.8 (1M context)
Assisted-by: GitHub Copilot CLI (gpt-5.5)
Signed-off-by: Johannes Schneider <johannes.schneider@leica-geosystems.com>
---
drivers/mci/sdhci.c | 35 ++++++++++++++++++++++++-----------
drivers/mci/sdhci.h | 4 ++++
2 files changed, 28 insertions(+), 11 deletions(-)
diff --git a/drivers/mci/sdhci.c b/drivers/mci/sdhci.c
index ccd5d4b83c..8ed8a59342 100644
--- a/drivers/mci/sdhci.c
+++ b/drivers/mci/sdhci.c
@@ -646,31 +646,44 @@ static int sdhci_adma_write_desc(struct sdhci *host, void **desc,
static int sdhci_adma_build_table(struct sdhci *host, dma_addr_t addr,
unsigned int len)
{
+ unsigned int max_len = SDHCI_ADMA2_MAX_LEN;
void *desc = host->adma_table;
int ret;
+ /*
+ * Some controllers (e.g. the i.MX uSDHC) cannot handle a length-0
+ * descriptor, which the 16-bit length field uses to encode the full
+ * SDHCI_ADMA2_MAX_LEN. Cap the chunk just below that so the length is
+ * never 0.
+ */
+ if (host->quirks & SDHCI_QUIRK_BROKEN_ADMA_ZEROLEN_DESC)
+ max_len = SDHCI_ADMA2_MAX_LEN - 4;
+
while (len) {
- unsigned int chunk = min_t(unsigned int, len,
- SDHCI_ADMA2_MAX_LEN);
+ unsigned int chunk = min_t(unsigned int, len, max_len);
+ unsigned int attr = ADMA2_TRAN_VALID;
+ len -= chunk;
/*
- * The length field is 16-bit; a length of 0 encodes
- * SDHCI_ADMA2_MAX_LEN bytes per the SD Host Controller
- * specification.
+ * Controllers that ignore the END attribute in a trailing NOP
+ * descriptor want END on the last transfer descriptor instead
+ * (SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC).
*/
- ret = sdhci_adma_write_desc(host, &desc, addr, chunk & 0xffff,
- ADMA2_TRAN_VALID);
+ if (!len && (host->quirks & SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC))
+ attr |= ADMA2_END;
+
+ ret = sdhci_adma_write_desc(host, &desc, addr, chunk & 0xffff, attr);
if (ret)
return ret;
addr += chunk;
- len -= chunk;
}
- /* Append a terminating descriptor (nop, end, valid). */
- ret = sdhci_adma_write_desc(host, &desc, 0, 0, ADMA2_NOP_END_VALID);
+ if (host->quirks & SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC)
+ return 0;
- return ret;
+ /* Append a terminating descriptor (nop, end, valid). */
+ return sdhci_adma_write_desc(host, &desc, 0, 0, ADMA2_NOP_END_VALID);
}
void sdhci_setup_data_dma(struct sdhci *sdhci, struct mci_data *data,
diff --git a/drivers/mci/sdhci.h b/drivers/mci/sdhci.h
index 558469e8ab..cb3b6d2b17 100644
--- a/drivers/mci/sdhci.h
+++ b/drivers/mci/sdhci.h
@@ -315,6 +315,10 @@ struct sdhci {
bool v4_mode; /* Host Version 4 Enable */
unsigned int quirks;
+/* Controller ignores the END attribute in a NOP ADMA2 descriptor */
+#define SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC BIT(6)
+/* Controller cannot handle a length-0 (== 64 KiB) ADMA2 descriptor */
+#define SDHCI_QUIRK_BROKEN_ADMA_ZEROLEN_DESC BIT(11)
#define SDHCI_QUIRK_MISSING_CAPS BIT(27)
unsigned int quirks2;
/* The system physically doesn't support 1.8v, even if the host does */
--
2.43.0
next prev parent reply other threads:[~2026-06-27 19:44 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-06-27 19:43 [PATCH v1 1/7] dma: make dma_mapping_error() NULL-safe Johannes Schneider
2026-06-27 19:43 ` [PATCH v1 2/7] mci: sdhci: bail out on ADMA/transfer errors instead of hanging Johannes Schneider
2026-06-27 19:43 ` Johannes Schneider [this message]
2026-06-27 19:43 ` [PATCH v1 4/7] mci: imx-esdhc: mark the uSDHC ADMA2 descriptor quirks Johannes Schneider
2026-06-27 19:43 ` [PATCH v1 5/7] mci: imx-esdhc: support HS400 and HS400ES on i.MX8M Johannes Schneider
2026-06-27 19:43 ` [PATCH v1 6/7] mci: imx-esdhc: make the transfer mode selectable (PIO/SDMA/ADMA2) Johannes Schneider
2026-06-27 19:43 ` [PATCH v1 7/7] mci: imx-esdhc: support DMA in the i.MX8M PBL eMMC loader Johannes Schneider
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