[PATCH 8/8] clk: divider: fix calculation of maximal parent rate for a given divider

[Ahmad Fatoum <a.fatoum@pengutronix.de>]

From: Ahmad Fatoum <a.fatoum@barebox.org>

This is an adoption of the corresponding Linux commit:

| commit da321133b53caf7889ed3ca1dabe4cc368db2604
| Author: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
| Date:   Sat Feb 21 11:40:23 2015 +0100
|
|     clk: divider: fix calculation of maximal parent rate for a given divider
|
|     The rate provided at the output of a clk-divider is calculated as:
|
|     	DIV_ROUND_UP(parent_rate, div)
|
|     since commit b11d282dbea2 (clk: divider: fix rate calculation for
|     fractional rates). So to yield a rate not bigger than r parent_rate
|     must be <= r * div.
|
|     The effect of choosing a parent rate that is too big as was done before
|     this patch results in wrongly ruling out good dividers.
|
|     Note that this is not a complete fix as __clk_round_rate might return a
|     value >= its 2nd parameter. Also for dividers with
|     CLK_DIVIDER_ROUND_CLOSEST set the calculation is not accurate. But this
|     fixes the test case by Sascha Hauer that uses a chain of three dividers
|     under a fixed clock.
|
|     Fixes: b11d282dbea2 (clk: divider: fix rate calculation for fractional rates)
|     Suggested-by: Sascha Hauer <s.hauer@pengutronix.de>
|     Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
|     Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
|     Signed-off-by: Michael Turquette <mturquette@linaro.org>

The "not a complete fix" caveat applies here as well: barebox'
clk_round_rate() falls back to clk_get_rate() for a clock without a
round_rate op, and clk_mux_round_rate() returns the closest parent rate, so
both can return more than they were asked for and clk_divider_bestdiv() can
still end up without a candidate. CLK_DIVIDER_ROUND_CLOSEST doesn't exist in
barebox, so that half of the caveat doesn't apply.

With the previous commit, the i.MX6 IPU pixel clocks now hit their
requested rates exactly, e.g. on a SABRE Lite:

  clk_round_rate ipu1_di0 65000000  ->  65000000 (was 40500000)
  clk_round_rate ipu1_di0 148500000 -> 148500000 (was 148500001)

Fixes: d4aaca3647fe ("clk: clk-divider: sync with kernel code")
Reported-by: Claude:opus-5
Signed-off-by: Ahmad Fatoum <a.fatoum@barebox.org>
---
 drivers/clk/clk-divider.c | 9 +--------
 1 file changed, 1 insertion(+), 8 deletions(-)

diff --git a/drivers/clk/clk-divider.c b/drivers/clk/clk-divider.c
index 8e630ccde4e6..2c97742cec0e 100644
--- a/drivers/clk/clk-divider.c
+++ b/drivers/clk/clk-divider.c
@@ -112,12 +112,6 @@ static unsigned long clk_divider_recalc_rate(struct clk_hw *hw,
 				   divider->flags, divider->width);
 }
 
-/*
- * The reverse of DIV_ROUND_UP: The maximum number which
- * divided by m is r
- */
-#define MULT_ROUND_UP(r, m) ((r) * (m) + (m) - 1)
-
 static bool _is_valid_table_div(const struct clk_div_table *table,
 							 unsigned int div)
 {
@@ -211,8 +205,7 @@ static int clk_divider_bestdiv(struct clk *clk, unsigned long rate,
 			*best_parent_rate = parent_rate_saved;
 			return i;
 		}
-		parent_rate = clk_round_rate(clk_get_parent(clk),
-				MULT_ROUND_UP(rate, i));
+		parent_rate = clk_round_rate(clk_get_parent(clk), rate * i);
 		now = DIV_ROUND_UP_ULL((u64)parent_rate, i);
 		if (now <= rate && now > best) {
 			bestdiv = i;
-- 
2.47.3