Re: [PATCH v4 2/3] ARM: boards: tqma8mpxl: extend with support for xs

[Fabian Pflug <f.pflug@pengutronix.de>]

Hi,

On Fri, 2026-03-13 at 14:20 +0100, Sascha Hauer wrote:
> On Thu, Mar 12, 2026 at 12:34:32PM +0100, Fabian Pflug wrote:
> > The TQMA8MPxS is another board from TQ with the same processor, but a
> > different formfactor. Nevertheless they share a lot of code and can be
> > used from the same barebox resulting in the rename of tqma8mpxl to
> > tqma8mpxx.
> > 
> > Signed-off-by: Fabian Pflug <f.pflug@pengutronix.de>
> > ---
> >  arch/arm/boards/tqma8mpxx/board.c                  |    1 +
> >  arch/arm/boards/tqma8mpxx/lowlevel.c               |   97 +-
> >  arch/arm/dts/Makefile                              |    2 +-
> >  .../dts/imx8mp-tqma8mpqs-mb-smarc-2-upstream.dts   |  402 ++++++++
> >  arch/arm/dts/imx8mp-tqma8mpqs-mba8mpxs.dts         |   15 +
> >  arch/arm/dts/imx8mp-tqma8mpqs-upstream.dtsi        | 1075 ++++++++++++++++++++
> >  arch/arm/mach-imx/Kconfig                          |    3 +-
> >  7 files changed, 1574 insertions(+), 21 deletions(-)
> > 
> > -static void power_init_board(void)
> > +static bool tqma_is_eeprom_valid(struct tq_eeprom *eeprom)
> >  {
> > -	struct pbl_i2c *i2c;
> > +	int ramsize;
> >  
> > -	imx8mp_setup_pad(MX8MP_PAD_I2C1_SCL__I2C1_SCL | I2C_PAD_CTRL);
> > -	imx8mp_setup_pad(MX8MP_PAD_I2C1_SDA__I2C1_SDA | I2C_PAD_CTRL);
> > -
> > -	imx8m_ccgr_clock_enable(IMX8M_CCM_CCGR_I2C1);
> > -
> > -	i2c = imx8m_i2c_early_init(IOMEM(MX8MP_I2C1_BASE_ADDR));
> > -
> > -	pmic_configure(i2c, 0x25, pca9450_cfg, ARRAY_SIZE(pca9450_cfg));
> > +	if (!*eeprom->serial || !*eeprom->id)
> > +		return false;
> > +	ramsize = tq_vard_ramsize(&eeprom->vard) / (SZ_1G);
> > +	if (ramsize != 1 && ramsize != 2 && ramsize != 4 && ramsize != 8)
> > +		return false;
> > +	return true;
> >  }
> >  
> > -static __noreturn noinline void tqma8mpxx_start(void)
> > +static noinline void tqma8mpxx_start(void)
> >  {
> >  	extern char __dtb_z_imx8mp_tqma8mpql_mba8mpxl_start[];
> > +	extern char __dtb_z_imx8mp_tqma8mpqs_mba8mpxs_start[];
> >  
> > -	setup_uart();
> > +	struct tq_eeprom *eeprom;
> > +	struct pbl_i2c *i2c;
> > +	void *boarddata;
> > +
> > +	i2c = tqma_i2c1_init();
> > +
> > +	/**
> > +	 * The difference for the lowlevel code between xS and xL is:
> > +	 * PMIC: xS on i2c2, xL on i2C1
> > +	 * VARD: address 0x50 on xS, address 0x53 on xL.
> > +	 *       offset 0x1000 on xS, offset 0x0 on xL
> > +	 */
> > +
> > +	eeprom = pbl_tq_read_eeprom(i2c, 0x50, 0x1000 | I2C_ADDR_16_BIT);
> > +	if (tqma_is_eeprom_valid(eeprom)) {
> > +		/* found xS board */
> > +		i2c = tqma_i2c2_init();
> 
> Something is mixed up here. You come here when you find a valid EEPROM
> on I2C1 which according to the comment indicates you're on a xL board.
> Also i2c is set here but unused for the rest of this function.

No, the i2c is used later to setup the pmic in line 171.
The xS has the pmic on i2c2, wheras the xL has the PMIc on i2c1.

> 
> Have you tested this on both boards? If not I would prefer that you look
> for an EEPROM on the board that you don't have first so that we can be
> sure that looking up a non existent EEPROM doesn't hang the board.

Yes, I have tested both, but did not measure the time the failed attempt took.
But I can confirm, that it did not hang.

Fabian

> 
> > +		boarddata = __dtb_z_imx8mp_tqma8mpqs_mba8mpxs_start;
> > +		setup_uart(IOMEM(MX8M_UART3_BASE_ADDR),
> > +			   MX8MP_PAD_SD1_DATA6__UART3_DCE_TX,
> > +			   MX8MP_PAD_SD1_DATA7__UART3_DCE_RX);
> > +	} else {
> > +		eeprom = pbl_tq_read_eeprom(i2c, 0x53, 0);
> > +		if (!tqma_is_eeprom_valid(eeprom))
> > +			panic("Could not read VARD!\n");
> > +
> > +		/* found xL board */
> > +		boarddata = __dtb_z_imx8mp_tqma8mpql_mba8mpxl_start;
> > +		setup_uart(IOMEM(MX8M_UART4_BASE_ADDR),
> > +			   MX8MP_PAD_UART4_TXD__UART4_DCE_TX,
> > +			   MX8MP_PAD_UART4_RXD__UART4_DCE_RX);
> > +
> > +	}
> >  
> 
> Sascha