mail archive of the barebox mailing list
 help / color / mirror / Atom feed
From: gianluca <gianlucarenzi@eurek.it>
To: barebox@lists.infradead.org
Cc: "gianlucarenzi@eurek.it" <gianlucarenzi@eurek.it>
Subject: Re: STM32MP1 SoC support in latest Barebox
Date: Fri, 22 Mar 2019 10:31:41 +0100	[thread overview]
Message-ID: <3b4f6b4e-f591-e5fc-bbcd-9fc3136f70d0@eurek.it> (raw)
In-Reply-To: <73e974ac-11a7-6ee7-ee1a-d5fab51e3b2f@eurek.it>

On 03/22/2019 09:07 AM, gianluca wrote:
> I need a __very quick__ answer to this subject, because a customer wants
> to migrate from a iMX28 based board to a STM32MP1.
>

Now I've just clone the git repo from pengutronix, and a mere:

> grep -r stm32mp1 *
> dts/Bindings/mailbox/stm32-ipcc.txt:- compatible:   Must be "st,stm32mp1-ipcc"
> dts/Bindings/mailbox/stm32-ipcc.txt:		compatible = "st,stm32mp1-ipcc";
> dts/Bindings/iio/adc/st,stm32-adc.txt:  "st,stm32mp1-adc-core"
> dts/Bindings/iio/adc/st,stm32-adc.txt:  and stm32h7 share a common ADC interrupt line. stm32mp1 has two separate
> dts/Bindings/iio/adc/st,stm32-adc.txt:  "st,stm32mp1-adc"
> dts/Bindings/iio/adc/st,stm32-dfsdm-adc.txt:up to 4 filters on stm32h7 or 6 filters on stm32mp1.
> dts/Bindings/iio/adc/st,stm32-dfsdm-adc.txt:  "st,stm32mp1-dfsdm"
> dts/Bindings/iio/adc/st,stm32-dfsdm-adc.txt:	Valid values are from 0 to 3 on stm32h7, 0 to 5 on stm32mp1.
> dts/Bindings/reset/st,stm32mp1-rcc.txt:Please see Documentation/devicetree/bindings/clock/st,stm32mp1-rcc.txt
> dts/Bindings/pinctrl/st,stm32-pinctrl.txt:   "st,stm32mp157-pinctrl"
> dts/Bindings/pinctrl/st,stm32-pinctrl.txt:   "st,stm32mp157-z-pinctrl"
> dts/Bindings/interrupt-controller/st,stm32-exti.txt:    "st,stm32mp1-exti"
> dts/Bindings/watchdog/st,stm32-iwdg.txt:  - "st,stm32mp1-iwdg"
> dts/Bindings/watchdog/st,stm32-iwdg.txt:  is required only for st,stm32mp1-iwdg.
> dts/Bindings/watchdog/st,stm32-iwdg.txt:  "lsi", "pclk" for st,stm32mp1-iwdg
> dts/Bindings/rtc/st,stm32-rtc.txt:  - "st,stm32mp1-rtc" for devices compatible with stm32mp1.
> dts/Bindings/rtc/st,stm32-rtc.txt:- interrupts: rtc alarm interrupt. On stm32mp1, a second interrupt is required
> dts/Bindings/rtc/st,stm32-rtc.txt:		compatible = "st,stm32mp1-rtc";
> dts/Bindings/net/stm32-dwmac.txt:	       For MPU family should be "st,stm32mp1-dwmac" to select
> dts/Bindings/phy/phy-stm32-usbphyc.txt:- compatible: must be "st,stm32mp1-usbphyc"
> dts/Bindings/phy/phy-stm32-usbphyc.txt:			compatible = "st,stm32mp1-usbphyc";
> dts/Bindings/arm/stm32/stm32.txt:  st,stm32mp157
> dts/Bindings/arm/stm32/stm32-syscon.txt:                 - " st,stm32mp157-syscfg " - for stm32mp157 based SoCs,
> dts/Bindings/arm/stm32/stm32-syscon.txt:                 compatible = "st,stm32mp157-syscfg", "syscon";
> dts/Bindings/clock/st,stm32mp1-rcc.txt:- compatible: "st,stm32mp1-rcc", "syscon"
> dts/Bindings/clock/st,stm32mp1-rcc.txt:		compatible = "st,stm32mp1-rcc", "syscon";
> dts/Bindings/clock/st,stm32mp1-rcc.txt:dt-bindings/clock/stm32mp1-clks.h header and can be used in device
> dts/Bindings/clock/st,stm32mp1-rcc.txt:include/dt-bindings/reset-controller/stm32mp1-resets.h
> dts/src/arm/stm32mp157-pinctrl.dtsi:			compatible = "st,stm32mp157-pinctrl";
> dts/src/arm/stm32mp157-pinctrl.dtsi:			compatible = "st,stm32mp157-z-pinctrl";
> dts/src/arm/stm32mp157c-ed1.dts:#include "stm32mp157c.dtsi"
> dts/src/arm/stm32mp157c-ed1.dts:#include "stm32mp157-pinctrl.dtsi"
> dts/src/arm/stm32mp157c-ed1.dts:	compatible = "st,stm32mp157c-ed1", "st,stm32mp157";
> dts/src/arm/stm32mp157c-ev1.dts:#include "stm32mp157c-ed1.dts"
> dts/src/arm/stm32mp157c-ev1.dts:	compatible = "st,stm32mp157c-ev1", "st,stm32mp157c-ed1", "st,stm32mp157";
> dts/src/arm/stm32mp157c.dtsi:#include <dt-bindings/clock/stm32mp1-clks.h>
> dts/src/arm/stm32mp157c.dtsi:#include <dt-bindings/reset/stm32mp1-resets.h>
> dts/src/arm/stm32mp157c.dtsi:			compatible = "st,stm32mp1-dfsdm";
> dts/src/arm/stm32mp157c.dtsi:			compatible = "st,stm32mp1-adc-core";
> dts/src/arm/stm32mp157c.dtsi:				compatible = "st,stm32mp1-adc";
> dts/src/arm/stm32mp157c.dtsi:				compatible = "st,stm32mp1-adc";
> dts/src/arm/stm32mp157c.dtsi:			compatible = "st,stm32mp1-rcc", "syscon";
> dts/src/arm/stm32mp157c.dtsi:			compatible = "st,stm32mp1-exti", "syscon";
> dts/src/arm/stm32mp157c.dtsi:			compatible = "st,stm32mp157-syscfg", "syscon";
> dts/src/arm/stm32mp157c.dtsi:			compatible = "st,stm32mp1-cryp";
> dts/src/arm/stm32mp157c.dtsi:			compatible = "st,stm32mp1-dwmac", "snps,dwmac-4.20a";
> dts/src/arm/stm32mp157c.dtsi:			compatible = "st,stm32mp1-iwdg";
> dts/src/arm/stm32mp157c.dtsi:			compatible = "st,stm32mp1-usbphyc";
> dts/src/arm/stm32mp157c.dtsi:			compatible = "st,stm32mp1-rtc";

reveals that __NO_SUPPORT__ for this processor at all.Only device tree 
added from Kernel I suppose...

That's a real pity. At the moment I have to switch over to UBoot... :-(

Regards,
-- 
Eurek s.r.l.                          |
Electronic Engineering                | http://www.eurek.it
via Celletta 8/B, 40026 Imola, Italy  | Phone: +39-(0)542-609120
p.iva 00690621206 - c.f. 04020030377  | Fax:   +39-(0)542-609212

_______________________________________________
barebox mailing list
barebox@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/barebox

  reply	other threads:[~2019-03-22  9:31 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-03-20  4:57 selected processor does not support `rev r7,r7' Lewis Zhou
2019-03-20  7:52 ` Sascha Hauer
2019-03-21  1:03   ` Lewis Zhou
2019-03-21  7:33     ` Sascha Hauer
2019-03-21  7:53       ` Lewis Zhou
2019-03-21  8:06         ` Sascha Hauer
     [not found]           ` <CAD_PvuY8oVy3Ny65bcF2a3LPC0R4+8uXCu6qda6CcbY+Ji+3JQ@mail.gmail.com>
     [not found]             ` <CAPWKHJSLmc1+-rV0rZeGn37uhkWwKsqmWXZSGJAs32zLE=Hxtg@mail.gmail.com>
2019-03-21  8:49               ` Lewis Zhou
2019-03-21  9:25         ` Juergen Borleis
2019-03-22  1:02           ` Lewis Zhou
2019-03-22  8:07             ` STM32MP1 SoC support in latest Barebox gianluca
2019-03-22  9:31               ` gianluca [this message]
2019-12-25  8:32                 ` Ahmad Fatoum
2019-03-22  9:46               ` Yann Sionneau
2019-03-22 11:24                 ` Robert Schwebel
2019-03-22  1:22           ` selected processor does not support `rev r7,r7' Lewis Zhou

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=3b4f6b4e-f591-e5fc-bbcd-9fc3136f70d0@eurek.it \
    --to=gianlucarenzi@eurek.it \
    --cc=barebox@lists.infradead.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body. 
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox