From mboxrd@z Thu Jan 1 00:00:00 1970 Delivery-date: Wed, 31 May 2023 14:41:29 +0200 Received: from metis.ext.pengutronix.de ([2001:67c:670:201:290:27ff:fe1d:cc33]) by lore.white.stw.pengutronix.de with esmtps (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1q4L8s-004FWj-A4 for lore@lore.pengutronix.de; Wed, 31 May 2023 14:41:28 +0200 Received: from bombadil.infradead.org ([2607:7c80:54:3::133]) by metis.ext.pengutronix.de with esmtps (TLS1.3:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.92) (envelope-from ) id 1q4L8p-0004y3-ON for lore@pengutronix.de; Wed, 31 May 2023 14:41:28 +0200 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: Content-Type:In-Reply-To:From:References:Cc:To:Subject:MIME-Version:Date: Message-ID:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=uZZslzwaT1wBz2zfE7C39g2eDjDI16WUBa0KAdGJECE=; b=lp2pgkW7ZwvvVnx0BeSIYCj2lD dtlNEx/9SU+v7o1zjnyz2FcBBW6w82g5v5nQ16DMLknRtixz8VpWgvsy93HISoL3OVXbE4Klxm06e ndvG5O155iy8Ihk03IRPncUtgvurFVSvtmopnCScvy4Kxq4NOXLxCqzu6O5IZCImFqSo6GhPln9eF ybGeRhFIQbLNM9zY0BBmLioyLSJLycZ56a26djpDNqLpHK3JCg+lTPp3AMcuUZLIicPXAhPJK24cf EOK9fLFva0ChyGBv5zHmArNiaGbDuURUVvko2QfV6V8VL5OmPPk45TyLsvt4EJ3eBCCNzBTQw34M4 nM/c6kyw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1q4L7i-00HNym-1E; Wed, 31 May 2023 12:40:18 +0000 Received: from metis.ext.pengutronix.de ([2001:67c:670:201:290:27ff:fe1d:cc33]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1q4L7f-00HNww-13 for barebox@lists.infradead.org; Wed, 31 May 2023 12:40:16 +0000 Received: from ptz.office.stw.pengutronix.de ([2a0a:edc0:0:900:1d::77] helo=[127.0.0.1]) by metis.ext.pengutronix.de with esmtp (Exim 4.92) (envelope-from ) id 1q4L7e-0004bg-1y; Wed, 31 May 2023 14:40:14 +0200 Message-ID: <4f8e95c6-8279-b287-234c-01de2eaf7996@pengutronix.de> Date: Wed, 31 May 2023 14:40:13 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.9.1 Content-Language: en-US To: Sascha Hauer Cc: Barebox List References: <20230531103515.845714-1-s.hauer@pengutronix.de> <20230531103515.845714-2-s.hauer@pengutronix.de> <4dfbd23f-9dca-e2c6-2067-b9decbdc7977@pengutronix.de> <20230531112114.GA18491@pengutronix.de> <298d6a42-e074-c861-6c7f-117ea75ddeb7@pengutronix.de> <20230531123840.GB18491@pengutronix.de> From: Ahmad Fatoum In-Reply-To: <20230531123840.GB18491@pengutronix.de> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230531_054015_364202_5AA272E0 X-CRM114-Status: GOOD ( 24.52 ) X-BeenThere: barebox@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "barebox" X-SA-Exim-Connect-IP: 2607:7c80:54:3::133 X-SA-Exim-Mail-From: barebox-bounces+lore=pengutronix.de@lists.infradead.org X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on metis.ext.pengutronix.de X-Spam-Level: X-Spam-Status: No, score=-5.0 required=4.0 tests=AWL,BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,NICE_REPLY_A,RCVD_IN_DNSWL_MED,SPF_HELO_NONE, SPF_NONE,T_SCC_BODY_TEXT_LINE autolearn=unavailable autolearn_force=no version=3.4.2 Subject: Re: [PATCH v2 2/2] ARM: mmu_32: fix setting up zero page when it is in SDRAM X-SA-Exim-Version: 4.2.1 (built Wed, 08 May 2019 21:11:16 +0000) X-SA-Exim-Scanned: Yes (on metis.ext.pengutronix.de) On 31.05.23 14:38, Sascha Hauer wrote: > On Wed, May 31, 2023 at 01:58:33PM +0200, Ahmad Fatoum wrote: >>> From b6e5c92682467496bd9c57918996f1feffda2dd6 Mon Sep 17 00:00:00 2001 >>> From: Sascha Hauer >>> Date: Wed, 31 May 2023 11:58:51 +0200 >>> Subject: [PATCH] ARM: mmu_32: fix setting up zero page when it is in SDRAM >>> >>> We used to skip setting the zero page to faulting when SDRAM starts at >>> 0x0. As bootm code now explicitly sets the zero page accessible before >>> copying ATAGs there this should no longer be necessary, so >>> unconditionally set the zero page to faulting during MMU startup. This >>> also moves the zero page and vector table setup after the point the >>> SDRAM has been mapped cachable, because otherwise the zero page and >>> possibly the vector table mapping would be overwritten. >>> >>> Signed-off-by: Sascha Hauer >>> --- >>> arch/arm/cpu/mmu_32.c | 23 +++++++++-------------- >>> 1 file changed, 9 insertions(+), 14 deletions(-) >>> >>> diff --git a/arch/arm/cpu/mmu_32.c b/arch/arm/cpu/mmu_32.c >>> index c4e5a3bb0a..14775768a3 100644 >>> --- a/arch/arm/cpu/mmu_32.c >>> +++ b/arch/arm/cpu/mmu_32.c >>> @@ -461,19 +461,14 @@ static int set_vector_table(unsigned long adr) >>> >>> static void create_zero_page(void) >> >> Is this commit incomplete? Vectors should be set up unconditionally and >> create_zero_page should be called after it. > > Vectors are set up unconditionally and create_zero_page() is called the > same way as before. So zero page is requested first and then on platforms with vector at address 0 requesting fails and we are left without configured IVT? > > Sascha > >> >>> { >>> - struct resource *zero_sdram; >>> + /* >>> + * In case the zero page is in SDRAM request it to prevent others >>> + * from using it >>> + */ >>> + request_sdram_region("zero page", 0x0, PAGE_SIZE); >>> >>> - zero_sdram = request_sdram_region("zero page", 0x0, PAGE_SIZE); >>> - if (zero_sdram) { >>> - /* >>> - * Here we would need to set the second level page table >>> - * entry to faulting. This is not yet implemented. >>> - */ >>> - pr_debug("zero page is in SDRAM area, currently not supported\n"); >>> - } else { >>> - zero_page_faulting(); >>> - pr_debug("Created zero page\n"); >>> - } >>> + zero_page_faulting(); >>> + pr_debug("Created zero page\n"); >>> } >>> >>> /* >>> @@ -530,8 +525,6 @@ void __mmu_init(bool mmu_on) >>> >>> pr_debug("ttb: 0x%p\n", ttb); >>> >>> - vectors_init(); >>> - >>> /* >>> * Early mmu init will have mapped everything but the initial memory area >>> * (excluding final OPTEE_SIZE bytes) uncached. We have now discovered >>> @@ -552,6 +545,8 @@ void __mmu_init(bool mmu_on) >>> >>> remap_range((void *)pos, bank->start + bank->size - pos, MAP_CACHED); >>> } >>> + >>> + vectors_init(); >>> } >>> >>> /* >> >> -- >> Pengutronix e.K. | | >> Steuerwalder Str. 21 | http://www.pengutronix.de/ | >> 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 | >> Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 | >> >> > -- Pengutronix e.K. | | Steuerwalder Str. 21 | http://www.pengutronix.de/ | 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 | Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 |