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Tue, 24 Aug 2021 09:09:38 +0200 To: Sascha Hauer Cc: Rouven Czerwinski , barebox@lists.infradead.org References: <20210803094418.475609-1-r.czerwinski@pengutronix.de> <20210803094418.475609-4-r.czerwinski@pengutronix.de> <270994d8-2970-5095-2f82-f8cf29054629@pengutronix.de> <20210809183042.GF11515@pengutronix.de> From: Ahmad Fatoum Message-ID: <501906d6-58ff-7399-9ba4-012dc0a27537@pengutronix.de> Date: Tue, 24 Aug 2021 09:09:37 +0200 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.13.0 MIME-Version: 1.0 In-Reply-To: <20210809183042.GF11515@pengutronix.de> Content-Language: en-US X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210824_000939_776191_C20F55B2 X-CRM114-Status: GOOD ( 25.06 ) X-BeenThere: barebox@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "barebox" X-SA-Exim-Connect-IP: 2607:7c80:54:e::133 X-SA-Exim-Mail-From: barebox-bounces+lore=pengutronix.de@lists.infradead.org X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on metis.ext.pengutronix.de X-Spam-Level: X-Spam-Status: No, score=-5.6 required=4.0 tests=AWL,BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,NICE_REPLY_A,RCVD_IN_DNSWL_MED,SPF_HELO_NONE, SPF_NONE,URIBL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.2 Subject: Re: [PATCH v2 3/8] ARM: mmu: use reserve mem entries to modify maps X-SA-Exim-Version: 4.2.1 (built Wed, 08 May 2019 21:11:16 +0000) X-SA-Exim-Scanned: Yes (on metis.ext.pengutronix.de) On 09.08.21 20:30, Sascha Hauer wrote: > On Thu, Aug 05, 2021 at 04:06:42PM +0200, Ahmad Fatoum wrote: >> On 03.08.21 11:44, Rouven Czerwinski wrote: >>> Use the information from the reserved memory entries to modify the >>> mapping of memory regions to mark them as uncachable and not-executable. >>> This also prevents the processor from speculating into these regions, >>> preventing hard to debug scenarios where boots fail for unknown reasons. >>> >>> Signed-off-by: Rouven Czerwinski >>> --- >>> arch/arm/cpu/mmu.c | 34 ++++++++++++++++++++++++++++++++-- >>> 1 file changed, 32 insertions(+), 2 deletions(-) >>> >>> diff --git a/arch/arm/cpu/mmu.c b/arch/arm/cpu/mmu.c >>> index 6388e1bf14..73f4cf5b36 100644 >>> --- a/arch/arm/cpu/mmu.c >>> +++ b/arch/arm/cpu/mmu.c >>> @@ -17,6 +17,7 @@ >>> #include >>> #include >>> #include >>> +#include >>> >>> #include "mmu.h" >>> >>> @@ -407,6 +408,36 @@ static void vectors_init(void) >>> create_vector_table(ARM_LOW_VECTORS); >>> } >>> >>> +static void create_sections_with_intersect(struct memory_bank *bank) >>> +{ >>> + struct of_reserve_map *res_map; >>> + unsigned long j_end; >>> + unsigned long end; >>> + unsigned long j; >>> + u32 pmd_flags; >>> + int i; >>> + >>> + res_map = of_get_reserve_map(); >>> + if (!res_map) >>> + return; >> >> If there is no reserve map, you should still map the banks cached. >> So this early exit is wrong. >> >>> + >>> + end = bank->start + bank->size - 1; >>> + >>> + for (j = bank->start; j < end; j += PGDIR_SIZE) { >>> + pmd_flags = PMD_SECT_DEF_CACHED; >>> + j_end = j + PGDIR_SIZE - 1; >>> + >>> + for (i = 0; i < res_map->num_entries; i++) { >>> + if ((BIT(i) & res_map->xn) && >>> + j_end >= res_map->start[i] && >>> + j_end <= res_map->end[i]) >>> + pmd_flags = PMD_SECT_DEF_UNCACHED | PMD_SECT_XN; >>> + } >>> + >>> + create_sections(ttb, j, j_end, pmd_flags); >>> + } >> >> Do we need the nested loop? Can't we create sections cached first >> and then iterate once over the reserved map, deduce the sections containing >> start and end and map those uncached? > > Wouldn't that open a window to speculate into the areas we want to avoid > speculating into in the first place? Right. Forgot that MMU is enabled here. > > Sascha > -- Pengutronix e.K. | | Steuerwalder Str. 21 | http://www.pengutronix.de/ | 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 | Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 | _______________________________________________ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox