* nand pmecc crash detected
@ 2014-02-28 15:53 Herve Codina
2014-03-03 3:45 ` Josh Wu
2014-03-03 7:58 ` Sascha Hauer
0 siblings, 2 replies; 5+ messages in thread
From: Herve Codina @ 2014-02-28 15:53 UTC (permalink / raw)
To: josh.wu; +Cc: barebox, linux-arm-kernel
Hi,
I am using an sam5d35 and its pmecc nand ecc controller.
In barebox, using similar atmel_nand.c the system crashes.
The problem was a call to chip->ecc.hwctl from nand_write_subpage_hwecc
(nand_base.c) when we write a sub page.
chip->ecc.hwctl function is not set when we are using PMECC controller.
As a workaround, i set NAND_NO_SUBPAGE_WRITE for PMECC controller in
order to disable sub page access in nand_write_page.
I think we can have the same problem in Linux. I do not performed
subpage nand writes from Linux but i made the following patch according
to my Barebox defect.
Here after are my patches (same modification) for 1st my local Barebox
and 2nd my local Linux :
---8<-------------------
From 757e8dbf141619a55b7a5b1ca11780b2589eacc1 Mon Sep 17 00:00:00 2001
From: Herve Codina <Herve.CODINA@celad.com>
Date: Fri, 28 Feb 2014 08:39:08 +0100
Subject: [PATCH 5/5] Disable Subpage nand write when using Atmel PMECC.
Signed-off-by: Herve Codina <Herve.CODINA@celad.com>
---
drivers/mtd/nand/atmel_nand.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/mtd/nand/atmel_nand.c b/drivers/mtd/nand/atmel_nand.c
index 2ff7427..cdbe685 100644
--- a/drivers/mtd/nand/atmel_nand.c
+++ b/drivers/mtd/nand/atmel_nand.c
@@ -837,6 +837,7 @@ static int __init
atmel_pmecc_nand_init_params(struct device_d *dev,
return err_no;
}
+ nand_chip->options |= NAND_NO_SUBPAGE_WRITE;
nand_chip->ecc.read_page = atmel_nand_pmecc_read_page;
nand_chip->ecc.write_page = atmel_nand_pmecc_write_page;
--
1.7.9.5
---8<-------------------
---8<-------------------
From bd6a9645841d74611a5be44a60c9c41b2bca9c19 Mon Sep 17 00:00:00 2001
From: Herve Codina <Herve.CODINA@celad.com>
Date: Fri, 28 Feb 2014 08:28:07 +0100
Subject: [PATCH 4/4] Disable Subpage nand write when using Atmel PMECC.
Signed-off-by: Herve Codina <Herve.CODINA@celad.com>
---
drivers/mtd/nand/atmel_nand.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/mtd/nand/atmel_nand.c b/drivers/mtd/nand/atmel_nand.c
index 5a36a7d..1340a7b 100644
--- a/drivers/mtd/nand/atmel_nand.c
+++ b/drivers/mtd/nand/atmel_nand.c
@@ -1249,6 +1249,7 @@ static int __init
atmel_pmecc_nand_init_params(struct platform_device *pdev,
goto err;
}
+ nand_chip->options |= NAND_NO_SUBPAGE_WRITE;
nand_chip->ecc.read_page = atmel_nand_pmecc_read_page;
nand_chip->ecc.write_page = atmel_nand_pmecc_write_page;
--
1.7.9.5
---8<-------------------
Can you review/integrate these patches in Barebox / Linux ?
Best regards,
Hervé Codina
_______________________________________________
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barebox@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/barebox
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: nand pmecc crash detected
2014-02-28 15:53 nand pmecc crash detected Herve Codina
@ 2014-03-03 3:45 ` Josh Wu
2014-03-04 4:02 ` Jean-Christophe PLAGNIOL-VILLARD
2014-03-06 17:42 ` Herve Codina
2014-03-03 7:58 ` Sascha Hauer
1 sibling, 2 replies; 5+ messages in thread
From: Josh Wu @ 2014-03-03 3:45 UTC (permalink / raw)
To: Herve Codina; +Cc: barebox, linux-arm-kernel
Dear Herve
On 2/28/2014 11:53 PM, Herve Codina wrote:
> Hi,
>
> I am using an sam5d35 and its pmecc nand ecc controller.
>
> In barebox, using similar atmel_nand.c the system crashes.
>
> The problem was a call to chip->ecc.hwctl from nand_write_subpage_hwecc
> (nand_base.c) when we write a sub page.
>
> chip->ecc.hwctl function is not set when we are using PMECC controller.
>
> As a workaround, i set NAND_NO_SUBPAGE_WRITE for PMECC controller in
> order to disable sub page access in nand_write_page.
>
> I think we can have the same problem in Linux. I do not performed
> subpage nand writes from Linux but i made the following patch according
> to my Barebox defect.
Thank you for catching this crash bug. The fix is fine for me. But I
think it's better to send out the Linux kernel patch alone.
You can rebase your patch on the top of Linux-mtd git
repo(git://git.infradead.org/l2-mtd.git) instead of your local Linux.
Then use 'git send-email' send to linux-mtd@lists.infradead.org and
linux-arm-kernel@lists.infradead.org. I will ack your patch.
If the patch is merged in Linux-mtd, it should be easier port to barebox
then.
>
> Here after are my patches (same modification) for 1st my local Barebox
> and 2nd my local Linux :
>
> ---8<-------------------
> From 757e8dbf141619a55b7a5b1ca11780b2589eacc1 Mon Sep 17 00:00:00 2001
> From: Herve Codina <Herve.CODINA@celad.com>
> Date: Fri, 28 Feb 2014 08:39:08 +0100
> Subject: [PATCH 5/5] Disable Subpage nand write when using Atmel PMECC.
>
>
> Signed-off-by: Herve Codina <Herve.CODINA@celad.com>
> ---
> drivers/mtd/nand/atmel_nand.c | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/drivers/mtd/nand/atmel_nand.c b/drivers/mtd/nand/atmel_nand.c
> index 2ff7427..cdbe685 100644
> --- a/drivers/mtd/nand/atmel_nand.c
> +++ b/drivers/mtd/nand/atmel_nand.c
> @@ -837,6 +837,7 @@ static int __init
> atmel_pmecc_nand_init_params(struct device_d *dev,
> return err_no;
> }
>
> + nand_chip->options |= NAND_NO_SUBPAGE_WRITE;
> nand_chip->ecc.read_page = atmel_nand_pmecc_read_page;
> nand_chip->ecc.write_page = atmel_nand_pmecc_write_page;
>
Best Regards,
Josh Wu
_______________________________________________
barebox mailing list
barebox@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/barebox
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: nand pmecc crash detected
2014-02-28 15:53 nand pmecc crash detected Herve Codina
2014-03-03 3:45 ` Josh Wu
@ 2014-03-03 7:58 ` Sascha Hauer
1 sibling, 0 replies; 5+ messages in thread
From: Sascha Hauer @ 2014-03-03 7:58 UTC (permalink / raw)
To: Herve Codina; +Cc: josh.wu, linux-arm-kernel, barebox
On Fri, Feb 28, 2014 at 04:53:44PM +0100, Herve Codina wrote:
> Hi,
>
> I am using an sam5d35 and its pmecc nand ecc controller.
>
> In barebox, using similar atmel_nand.c the system crashes.
>
> The problem was a call to chip->ecc.hwctl from nand_write_subpage_hwecc
> (nand_base.c) when we write a sub page.
>
> chip->ecc.hwctl function is not set when we are using PMECC controller.
>
> As a workaround, i set NAND_NO_SUBPAGE_WRITE for PMECC controller in
> order to disable sub page access in nand_write_page.
>
> I think we can have the same problem in Linux. I do not performed
> subpage nand writes from Linux but i made the following patch according
> to my Barebox defect.
>
> Here after are my patches (same modification) for 1st my local Barebox
> and 2nd my local Linux :
Applied (for barebox ;), thanks
Sascha
--
Pengutronix e.K. | |
Industrial Linux Solutions | http://www.pengutronix.de/ |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 |
Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 |
_______________________________________________
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^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: nand pmecc crash detected
2014-03-03 3:45 ` Josh Wu
@ 2014-03-04 4:02 ` Jean-Christophe PLAGNIOL-VILLARD
2014-03-06 17:42 ` Herve Codina
1 sibling, 0 replies; 5+ messages in thread
From: Jean-Christophe PLAGNIOL-VILLARD @ 2014-03-04 4:02 UTC (permalink / raw)
To: Josh Wu; +Cc: Herve Codina, barebox, linux-arm-kernel
On 11:45 Mon 03 Mar , Josh Wu wrote:
> Dear Herve
>
> On 2/28/2014 11:53 PM, Herve Codina wrote:
> >Hi,
> >
> >I am using an sam5d35 and its pmecc nand ecc controller.
> >
> >In barebox, using similar atmel_nand.c the system crashes.
> >
> >The problem was a call to chip->ecc.hwctl from nand_write_subpage_hwecc
> >(nand_base.c) when we write a sub page.
> >
> >chip->ecc.hwctl function is not set when we are using PMECC controller.
> >
> >As a workaround, i set NAND_NO_SUBPAGE_WRITE for PMECC controller in
> >order to disable sub page access in nand_write_page.
> >
> >I think we can have the same problem in Linux. I do not performed
> >subpage nand writes from Linux but i made the following patch according
> >to my Barebox defect.
>
> Thank you for catching this crash bug. The fix is fine for me. But I
> think it's better to send out the Linux kernel patch alone.
>
> You can rebase your patch on the top of Linux-mtd git
> repo(git://git.infradead.org/l2-mtd.git) instead of your local
> Linux.
> Then use 'git send-email' send to linux-mtd@lists.infradead.org and
> linux-arm-kernel@lists.infradead.org. I will ack your patch.
>
> If the patch is merged in Linux-mtd, it should be easier port to
> barebox then.
no need for that notion of priority send it to both
Best Regards,
J.
>
> >
> >Here after are my patches (same modification) for 1st my local Barebox
> >and 2nd my local Linux :
> >
> >---8<-------------------
> > From 757e8dbf141619a55b7a5b1ca11780b2589eacc1 Mon Sep 17 00:00:00 2001
> >From: Herve Codina <Herve.CODINA@celad.com>
> >Date: Fri, 28 Feb 2014 08:39:08 +0100
> >Subject: [PATCH 5/5] Disable Subpage nand write when using Atmel PMECC.
> >
> >
> >Signed-off-by: Herve Codina <Herve.CODINA@celad.com>
> >---
> > drivers/mtd/nand/atmel_nand.c | 1 +
> > 1 file changed, 1 insertion(+)
> >
> >diff --git a/drivers/mtd/nand/atmel_nand.c b/drivers/mtd/nand/atmel_nand.c
> >index 2ff7427..cdbe685 100644
> >--- a/drivers/mtd/nand/atmel_nand.c
> >+++ b/drivers/mtd/nand/atmel_nand.c
> >@@ -837,6 +837,7 @@ static int __init
> >atmel_pmecc_nand_init_params(struct device_d *dev,
> > return err_no;
> > }
> >
> >+ nand_chip->options |= NAND_NO_SUBPAGE_WRITE;
> > nand_chip->ecc.read_page = atmel_nand_pmecc_read_page;
> > nand_chip->ecc.write_page = atmel_nand_pmecc_write_page;
> >
>
> Best Regards,
> Josh Wu
>
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
_______________________________________________
barebox mailing list
barebox@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/barebox
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: nand pmecc crash detected
2014-03-03 3:45 ` Josh Wu
2014-03-04 4:02 ` Jean-Christophe PLAGNIOL-VILLARD
@ 2014-03-06 17:42 ` Herve Codina
1 sibling, 0 replies; 5+ messages in thread
From: Herve Codina @ 2014-03-06 17:42 UTC (permalink / raw)
To: Josh Wu; +Cc: barebox, linux-arm-kernel
Dear Josh
As suggested, i made a patch and sent it this week to
linux-mtd@lists.infradead.org and linux-arm-kernel@lists.infradead.org.
Hope you have seen it. Is subject is : "[PATCH] Disable Subpage nand
write when using Atmel PMECC".
Best regards,
Herve
Le 03/03/2014 04:45, Josh Wu a écrit :
> Dear Herve
>
> On 2/28/2014 11:53 PM, Herve Codina wrote:
>> Hi,
>>
>> I am using an sam5d35 and its pmecc nand ecc controller.
>>
>> In barebox, using similar atmel_nand.c the system crashes.
>>
>> The problem was a call to chip->ecc.hwctl from nand_write_subpage_hwecc
>> (nand_base.c) when we write a sub page.
>>
>> chip->ecc.hwctl function is not set when we are using PMECC controller.
>>
>> As a workaround, i set NAND_NO_SUBPAGE_WRITE for PMECC controller in
>> order to disable sub page access in nand_write_page.
>>
>> I think we can have the same problem in Linux. I do not performed
>> subpage nand writes from Linux but i made the following patch according
>> to my Barebox defect.
>
> Thank you for catching this crash bug. The fix is fine for me. But I
> think it's better to send out the Linux kernel patch alone.
>
> You can rebase your patch on the top of Linux-mtd git
> repo(git://git.infradead.org/l2-mtd.git) instead of your local Linux.
> Then use 'git send-email' send to linux-mtd@lists.infradead.org and
> linux-arm-kernel@lists.infradead.org. I will ack your patch.
>
> If the patch is merged in Linux-mtd, it should be easier port to barebox
> then.
>
>>
>> Here after are my patches (same modification) for 1st my local Barebox
>> and 2nd my local Linux :
>>
>> ---8<-------------------
>> From 757e8dbf141619a55b7a5b1ca11780b2589eacc1 Mon Sep 17 00:00:00 2001
>> From: Herve Codina <Herve.CODINA@celad.com>
>> Date: Fri, 28 Feb 2014 08:39:08 +0100
>> Subject: [PATCH 5/5] Disable Subpage nand write when using Atmel PMECC.
>>
>>
>> Signed-off-by: Herve Codina <Herve.CODINA@celad.com>
>> ---
>> drivers/mtd/nand/atmel_nand.c | 1 +
>> 1 file changed, 1 insertion(+)
>>
>> diff --git a/drivers/mtd/nand/atmel_nand.c b/drivers/mtd/nand/atmel_nand.c
>> index 2ff7427..cdbe685 100644
>> --- a/drivers/mtd/nand/atmel_nand.c
>> +++ b/drivers/mtd/nand/atmel_nand.c
>> @@ -837,6 +837,7 @@ static int __init
>> atmel_pmecc_nand_init_params(struct device_d *dev,
>> return err_no;
>> }
>>
>> + nand_chip->options |= NAND_NO_SUBPAGE_WRITE;
>> nand_chip->ecc.read_page = atmel_nand_pmecc_read_page;
>> nand_chip->ecc.write_page = atmel_nand_pmecc_write_page;
>>
>
> Best Regards,
> Josh Wu
>
_______________________________________________
barebox mailing list
barebox@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/barebox
^ permalink raw reply [flat|nested] 5+ messages in thread
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2014-02-28 15:53 nand pmecc crash detected Herve Codina
2014-03-03 3:45 ` Josh Wu
2014-03-04 4:02 ` Jean-Christophe PLAGNIOL-VILLARD
2014-03-06 17:42 ` Herve Codina
2014-03-03 7:58 ` Sascha Hauer
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