From: Sean Cross <xobs@kosagi.com>
To: Sascha Hauer <s.hauer@pengutronix.de>
Cc: barebox@lists.infradead.org
Subject: Re: Porting barebox to Novena: misc questions
Date: Tue, 18 Mar 2014 11:35:26 +0800 [thread overview]
Message-ID: <5327BEFE.9020003@kosagi.com> (raw)
In-Reply-To: <20140317105318.GJ17250@pengutronix.de>
On 17/3/14 6:53 PM, Sascha Hauer wrote:
> On Mon, Mar 17, 2014 at 03:44:15PM +0800, Sean Cross wrote:
>> On 17/3/14 3:18 PM, Sascha Hauer wrote:
>>> On Mon, Mar 17, 2014 at 12:28:28PM +0800, Sean Cross wrote:
>>>> Here is the resulting output and BUG from this run:
>>>>
>>>> barebox 2014.03.0-00628-g7fed07d-dirty #158 Mon Mar 17 12:25:45 SGT 2014
>>>>
>>>>
>>>> Board: Kosagi i.MX6DL Novena Board
>>>> detected i.MX6 DualLite revision 1.1
>>>> Trying to request region ttb (from 0x4fff4000:0x4fff7fff): ok
>>>> Trying to request region malloc space (from 0x4be00000:0x4fdfffff): ok
>>>> Trying to request region barebox (from 0x4fe00000:0x4fe4b4a7): ok
>>>> Trying to request region barebox data (from 0x4fe4b4a8:0x4fe5c8f7): ok
>>>> Trying to request region bss (from 0x4fe5c8f8:0x4fe6214f): ok
>>>> Trying to request region stack (from 0x4fff8000:0x4fffffff): ok
>>>> mmu: find_pte: TTB for address 0x4cd1e000 is not of type table
>>>> mmu: Memory banks:
>>>> mmu: #0 0x10000000 - 0xffffffff
>>>
>>> So you have one memory bank that starts at 0x10000000 which is the
>>> standard SDRAM base for i.MX6. Good. But why is the size 0? Have you
>>> specified this in your devicetree? It should contain the correct size.
>>> It could also be that we do not parse #ddress-cells / #size-cells
>>> correctly (in case one of these is not 1 in your devicetree).
>>
>> There is no "memory" node in my .dts file, so it's inheriting the
>> default "memory { device_type = "memory"; reg = <0 0>; };" from
>> skeleton.dtsi.
>
> Ok, that's fine.
>
>> I add memory in my board.c file:
>>
>> static int kosagi_novena_mem_init(void)
>> {
>> /* Pull out RAM capacity, which was stored here in lowlevel.c */
>> arm_add_mem_device("ram0", 0x10000000, readl(MX6_SRC_BASE_ADDR +
>> 0x20));
>
> Are you sure the readl returns the proper memory size? How about
> replacing this with a hardcoded value for testing?
That's very good thinking. I'm guessing there's a fencepost error
somewhere. It works if I set it to SZ_1GB, but not when I include the
full amount. I've tried printing the value stored in that register, and
it is correct.
This works:
arm_add_mem_device("ram0", 0x10000000, SZ_2G + SZ_1G + SZ_512M +
SZ_128M);
This does not:
arm_add_mem_device("ram0", 0x10000000, SZ_2G + SZ_1G + SZ_512M +
SZ_128M + 1);
Is there something special about the address 0xf8000000?
Sean
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next prev parent reply other threads:[~2014-03-18 3:35 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-03-13 2:04 Sean Cross
2014-03-13 7:38 ` Sascha Hauer
2014-03-13 10:18 ` Sean Cross
2014-03-13 20:27 ` Sascha Hauer
2014-03-14 3:35 ` Sean Cross
2014-03-14 8:22 ` Sascha Hauer
2014-03-17 4:28 ` Sean Cross
2014-03-17 7:18 ` Sascha Hauer
2014-03-17 7:31 ` Alexander Aring
2014-03-17 7:44 ` Sean Cross
2014-03-17 10:53 ` Sascha Hauer
2014-03-18 3:35 ` Sean Cross [this message]
2014-03-18 8:36 ` Sascha Hauer
2014-03-18 8:43 ` Sean Cross
2014-03-18 8:58 ` Sascha Hauer
2014-03-18 9:04 ` Sean Cross
2014-03-13 19:42 ` Jean-Christophe PLAGNIOL-VILLARD
2014-03-13 20:30 ` Sascha Hauer
2014-03-14 3:03 ` Jean-Christophe PLAGNIOL-VILLARD
2014-03-13 20:43 ` Eric Bénard
2014-03-13 21:26 ` Sascha Hauer
2014-03-14 3:13 ` Jean-Christophe PLAGNIOL-VILLARD
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