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From: Ahmad Fatoum <a.fatoum@pengutronix.de>
To: chalianis1@gmail.com, s.hauer@pengutronix.de
Cc: barebox@lists.infradead.org
Subject: Re: [PATCH] pinctrl: tegra30: fix typo with variables to control the drive state on nvidia pins.
Date: Fri, 25 Jul 2025 08:36:55 +0200	[thread overview]
Message-ID: <5c662c55-1ae5-4f8b-93a7-4e444f355f09@pengutronix.de> (raw)
In-Reply-To: <20250725043158.184327-1-chalianis1@gmail.com>

Hi Chali,

Thanks for your patch.

On 7/25/25 06:31, chalianis1@gmail.com wrote:
> From: Chali Anis <chalianis1@gmail.com>
> 
> Fixes: fd940ff6512b ("pinctrl: tegra30: parse drive groups")
> Signed-off-by: Chali Anis <chalianis1@gmail.com>

Reviewed-by: Ahmad Fatoum <a.fatoum@pengutronix.de>

Cheers,
Ahmad

> ---
>  drivers/pinctrl/pinctrl-tegra30.c | 10 +++++-----
>  1 file changed, 5 insertions(+), 5 deletions(-)
> 
> diff --git a/drivers/pinctrl/pinctrl-tegra30.c b/drivers/pinctrl/pinctrl-tegra30.c
> index f706ae6bfdfd..c542dee96ff2 100644
> --- a/drivers/pinctrl/pinctrl-tegra30.c
> +++ b/drivers/pinctrl/pinctrl-tegra30.c
> @@ -669,31 +669,31 @@ static int pinctrl_tegra30_set_drvstate(struct pinctrl_tegra30 *ctrl,
>  	if (schmitt >= 0) {
>  		val = readl(regaddr);
>  		val &= ~(0x1 << group->schmitt_bit);
> -		val |= hsm << group->schmitt_bit;
> +		val |= schmitt << group->schmitt_bit;
>  		writel(val, regaddr);
>  	}
>  	if (pds >= 0) {
>  		val = readl(regaddr);
>  		val &= ~(((1 << group->drvdn_width) - 1) << group->drvdn_bit);
> -		val |= hsm << group->drvdn_bit;
> +		val |= pds << group->drvdn_bit;
>  		writel(val, regaddr);
>  	}
>  	if (pus >= 0) {
>  		val = readl(regaddr);
>  		val &= ~(((1 << group->drvup_width) - 1) << group->drvup_bit);
> -		val |= hsm << group->drvup_bit;
> +		val |= pus << group->drvup_bit;
>  		writel(val, regaddr);
>  	}
>  	if (srr >= 0) {
>  		val = readl(regaddr);
>  		val &= ~(((1 << group->slwr_width) - 1) << group->slwr_bit);
> -		val |= hsm << group->slwr_bit;
> +		val |= srr << group->slwr_bit;
>  		writel(val, regaddr);
>  	}
>  	if (srf >= 0) {
>  		val = readl(regaddr);
>  		val &= ~(((1 << group->slwf_width) - 1) << group->slwf_bit);
> -		val |= hsm << group->slwf_bit;
> +		val |= srf << group->slwf_bit;
>  		writel(val, regaddr);
>  	}
>  

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      reply	other threads:[~2025-07-25  6:52 UTC|newest]

Thread overview: 2+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-07-25  4:31 chalianis1
2025-07-25  6:36 ` Ahmad Fatoum [this message]

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