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* [PATCH] MIPS: loongson1: enable to run from spi flash
@ 2020-09-11 12:33 Du Huanpeng
  2020-09-11 12:33 ` [PATCH] MIPS: DEBUG_LL_UART_DIVISOR is 0, use a0 instead Du Huanpeng
  0 siblings, 1 reply; 7+ messages in thread
From: Du Huanpeng @ 2020-09-11 12:33 UTC (permalink / raw)
  To: barebox; +Cc: Du Huanpeng

initial pll, ddr2 controller, calculate perscale divisor for uart.

Signed-off-by: Du Huanpeng <u74147@gmail.com>
---
 arch/mips/boards/loongson-ls1b/lowlevel.S          |  33 ++++-
 arch/mips/mach-loongson/include/mach/debug_ll.h    |   1 +
 .../include/mach/debug_ll_loongson1.h              |  15 ++
 .../include/mach/pbl_ll_init_loongson1.h           | 162 +++++++++++++++++++++
 arch/mips/mach-loongson/include/mach/pbl_macros.h  |  81 +++++++++++
 5 files changed, 291 insertions(+), 1 deletion(-)
 create mode 100644 arch/mips/mach-loongson/include/mach/debug_ll_loongson1.h
 create mode 100644 arch/mips/mach-loongson/include/mach/pbl_ll_init_loongson1.h
 create mode 100644 arch/mips/mach-loongson/include/mach/pbl_macros.h

diff --git a/arch/mips/boards/loongson-ls1b/lowlevel.S b/arch/mips/boards/loongson-ls1b/lowlevel.S
index c533df3..af6ad54 100644
--- a/arch/mips/boards/loongson-ls1b/lowlevel.S
+++ b/arch/mips/boards/loongson-ls1b/lowlevel.S
@@ -1,6 +1,7 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 /*
  * Copyright (C) 2014 Antony Pavlov <antonynpavlov@gmail.com>
+ * Copyright (C) 2020 Du Huanpeng <duhuanpegn@gmail.com>
  */
 
 #define BOARD_PBL_START start_loongson_ls1b
@@ -11,15 +12,45 @@
 #include <asm/pbl_nmon.h>
 #include <linux/sizes.h>
 
+#include <mach/pbl_macros.h>
+#include <mach/pbl_ll_init_loongson1.h>
+
+
 ENTRY_FUNCTION(BOARD_PBL_START)
 
 	mips_barebox_10h
 
 	mips_disable_interrupts
 
-	debug_ll_ns16550_init
+	pbl_blt 0xbf000000 168f t0
 
+	pbl_loongson1_pll
+
+	pbl_loongson1_uart_enable
+	pbl_loongson1_calc_prescale 115200
+	move	a0, v0
+	debug_ll_ns16550_init
+	debug_ll_ns16550_outnl
 	debug_ll_outc '.'
 	debug_ll_ns16550_outnl
+	debug_ll_outc '1'
+
+	pbl_loongson1_remap
+	debug_ll_outc '2'
+
+	pbl_loongson1_ddr2_init
+	pbl_probe_mem t0, t1, KSEG1
+	bne     t0, t1, .
+	nop
+
+	debug_ll_outc '3'
+
+	mips_cache_reset
+	dcache_enable
+	debug_ll_outc '4'
+
+168:
+	debug_ll_outc '5'
+	debug_ll_ns16550_outnl
 
 ENTRY_FUNCTION_END(BOARD_PBL_START, loongson_ls1b, SZ_64M)
diff --git a/arch/mips/mach-loongson/include/mach/debug_ll.h b/arch/mips/mach-loongson/include/mach/debug_ll.h
index c2d6edb..39d791a 100644
--- a/arch/mips/mach-loongson/include/mach/debug_ll.h
+++ b/arch/mips/mach-loongson/include/mach/debug_ll.h
@@ -9,6 +9,7 @@
 /** @file
  *  This File contains declaration for early output support
  */
+#include <mach/debug_ll_loongson1.h>
 #include <asm/debug_ll_ns16550.h>
 
 #endif /* __MACH_LOONGSON_DEBUG_LL__ */
diff --git a/arch/mips/mach-loongson/include/mach/debug_ll_loongson1.h b/arch/mips/mach-loongson/include/mach/debug_ll_loongson1.h
new file mode 100644
index 0000000..6043690
--- /dev/null
+++ b/arch/mips/mach-loongson/include/mach/debug_ll_loongson1.h
@@ -0,0 +1,15 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+/*
+ * Copyright (C) 2020 Du Huanpeng <u74147@gmail.com>
+ */
+
+#ifndef __INCLUDE_DEBUG_LL_LOONGSON1_H__
+#define __INCLUDE_DEBUG_LL_LOONGSON1_H__
+
+#include <mach/loongson1.h>
+
+#define DEBUG_LL_UART_ADDR	0xBFE48000
+#define DEBUG_LL_UART_SHIFT	0
+#define DEBUG_LL_UART_DIVISOR	0
+
+#endif /* __INCLUDE_DEBUG_LL_LOONGSON1_H__ */
diff --git a/arch/mips/mach-loongson/include/mach/pbl_ll_init_loongson1.h b/arch/mips/mach-loongson/include/mach/pbl_ll_init_loongson1.h
new file mode 100644
index 0000000..e0cca5c
--- /dev/null
+++ b/arch/mips/mach-loongson/include/mach/pbl_ll_init_loongson1.h
@@ -0,0 +1,162 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ * Copyright (C) 2020 Du Huanpeng <u74147@gmail.com>
+ */
+
+#ifndef __ASM_MACH_LOONGSON1_PBL_LL_INIT_LOONGSON1_H
+#define __ASM_MACH_LOONGSON1_PBL_LL_INIT_LOONGSON1_H
+
+#include <asm/addrspace.h>
+#include <asm/regdef.h>
+
+/*
+ *              (12 * 1024 + N)     33 * 625
+ * prescale  = ----------------- * ----------
+ *              DIV * (baud/25)       1024
+ */
+
+.macro pbl_loongson1_calc_prescale baud
+	.set	push
+	.set	noreorder
+
+	li a0, \baud
+
+	/* PLL_FREQ -> t8 */
+	li	t8, 0xbfe78030
+	lw	t8, 0 (t8)
+
+	/* N -> t9, t8 -> X */
+	sra	t9, t8, 8
+	andi	t9, 0x3f
+	sll	t8, 10
+	andi	t9, 0x3ff
+	or	t9, t8
+
+	/* t9 += 12 * 1024 */
+	li	t8, 12288
+	add	t9, t8
+	/* DIV -> t8 */
+	li	t8, 0xbfe78030
+	lw	t8, 4 (t8)
+	sra	t8, 14
+	andi	t8, 0xf
+
+	multu	t8, a0
+	mflo	t8
+	li	v0, 25
+	divu	t8, v0
+	/* t9 = a / b */
+	divu	t9, t8
+	mflo	t9
+
+	li	t8, 20955	/* 33 * 625 */
+	multu	t9, t8
+	mflo	t9
+
+	sra	v0, t9, 10
+
+	.set	pop
+.endm
+
+.macro	__pbl_loongson1_ddr2_init
+	.set	push
+	.set	noreorder
+
+	pbl_reg_writel 0x00000101, 0xAFFFFE00
+	pbl_reg_writel 0x01000100, 0xAFFFFE04
+	pbl_reg_writel 0x00000000, 0xAFFFFE10
+	pbl_reg_writel 0x01000000, 0xAFFFFE14
+	pbl_reg_writel 0x00000000, 0xAFFFFE20
+	pbl_reg_writel 0x01000101, 0xAFFFFE24
+	pbl_reg_writel 0x01000100, 0xAFFFFE30
+	pbl_reg_writel 0x01010000, 0xAFFFFE34
+	pbl_reg_writel 0x01010101, 0xAFFFFE40
+	pbl_reg_writel 0x01000202, 0xAFFFFE44
+	pbl_reg_writel 0x04030201, 0xAFFFFE50
+	pbl_reg_writel 0x07000000, 0xAFFFFE54
+	pbl_reg_writel 0x02020203, 0xAFFFFE60
+	pbl_reg_writel 0x0a020203, 0xAFFFFE64
+	pbl_reg_writel 0x00010506, 0xAFFFFE70
+	pbl_reg_writel 0x00000400, 0xAFFFFE74
+	pbl_reg_writel 0x08040201, 0xAFFFFE80
+	pbl_reg_writel 0x08040201, 0xAFFFFE84
+	pbl_reg_writel 0x00000000, 0xAFFFFE90
+	pbl_reg_writel 0x00000306, 0xAFFFFE94
+	pbl_reg_writel 0x3f0b020a, 0xAFFFFEA0
+	pbl_reg_writel 0x0000003f, 0xAFFFFEA4
+	pbl_reg_writel 0x00000000, 0xAFFFFEB0
+	pbl_reg_writel 0x37570000, 0xAFFFFEB4
+	pbl_reg_writel 0x08000000, 0xAFFFFEC0
+	pbl_reg_writel 0x002a1503, 0xAFFFFEC4
+	pbl_reg_writel 0x002a002a, 0xAFFFFED0
+	pbl_reg_writel 0x002a002a, 0xAFFFFED4
+	pbl_reg_writel 0x002a002a, 0xAFFFFEE0
+	pbl_reg_writel 0x002a002a, 0xAFFFFEE4
+	pbl_reg_writel 0x00000002, 0xAFFFFEF0
+	pbl_reg_writel 0x00b40020, 0xAFFFFEF4
+	pbl_reg_writel 0x00000087, 0xAFFFFF00
+	pbl_reg_writel 0x000007ff, 0xAFFFFF04
+	pbl_reg_writel 0x44240618, 0xAFFFFF10
+	pbl_reg_writel 0x80808080, 0xAFFFFF14
+	pbl_reg_writel 0x80808080, 0xAFFFFF20
+	pbl_reg_writel 0x001c8080, 0xAFFFFF24
+	pbl_reg_writel 0x00c8006b, 0xAFFFFF30
+	pbl_reg_writel 0x36b00002, 0xAFFFFF34
+	pbl_reg_writel 0x00c80017, 0xAFFFFF40
+	pbl_reg_writel 0x00000000, 0xAFFFFF44
+	pbl_reg_writel 0x00009c40, 0xAFFFFF50
+	pbl_reg_writel 0x00000000, 0xAFFFFF54
+	pbl_reg_writel 0x00000000, 0xAFFFFF60
+	pbl_reg_writel 0x00000000, 0xAFFFFF64
+	pbl_reg_writel 0x00000000, 0xAFFFFF70
+	pbl_reg_writel 0x00000000, 0xAFFFFF74
+	pbl_reg_writel 0x00000000, 0xAFFFFF80
+	pbl_reg_writel 0x00000000, 0xAFFFFF84
+	pbl_reg_writel 0x00000000, 0xAFFFFF90
+	pbl_reg_writel 0x00000000, 0xAFFFFF94
+	pbl_reg_writel 0x00000000, 0xAFFFFFA0
+	pbl_reg_writel 0x00000000, 0xAFFFFFA4
+	pbl_reg_writel 0x00000000, 0xAFFFFFB0
+	pbl_reg_writel 0x00000000, 0xAFFFFFB4
+	pbl_reg_writel 0x00000000, 0xAFFFFFC0
+	pbl_reg_writel 0x00000000, 0xAFFFFFC4
+
+	.set	pop
+.endm
+
+.macro	pbl_loongson1_ddr2_init
+	.set	push
+	.set	noreorder
+
+	/* initial ddr2 controller */
+	pbl_reg_writel 0xfc000000, 0xbfd010c8
+	pbl_reg_writel 0x14000000, 0xbfd010f8
+
+	__pbl_loongson1_ddr2_init
+10:
+	pbl_reg_writel  0x01010100, 0xaffffe34
+
+9:	/* not_locked */
+	li	t0, 0xaffffe00
+	lw      t1, 0x10 (t0)
+	andi    t1, t1, 1
+	beqz    t1, 9b
+	nop
+
+	lh      t1, 0xf2 (t0)
+	sltiu 	t1, t1, 5
+	beqz 	t1, 1f
+	nop
+
+	lw      t1, 0xf4 (t0)
+	addiu   t1, t1, 4
+	sw      t1, 0xf4 (t0)
+	b       10b
+	nop
+1:
+	/* 16bit ddr and disable conf */
+	pbl_reg_set 0x110000, 0xbfd00424
+	.set	pop
+.endm
+
+#endif /* __ASM_MACH_LOONGSON1_PBL_LL_INIT_LOONGSON1_H */
diff --git a/arch/mips/mach-loongson/include/mach/pbl_macros.h b/arch/mips/mach-loongson/include/mach/pbl_macros.h
new file mode 100644
index 0000000..93402d1
--- /dev/null
+++ b/arch/mips/mach-loongson/include/mach/pbl_macros.h
@@ -0,0 +1,81 @@
+#ifndef __ASM_MACH_LOONGSON1_PBL_MACROS_H
+#define __ASM_MACH_LOONGSON1_PBL_MACROS_H
+
+#include <asm/addrspace.h>
+#include <asm/regdef.h>
+#include <mach/loongson1.h>
+
+#define PLL_FREQ		0xBFE78030
+#define PLL_DIV_PARAM		0xBFE78034
+
+#define CONFIG_CPU_DIV		3
+#define CONFIG_DDR_DIV		4
+#define CONFIG_DC_DIV		4
+#define CONFIG_PLL_FREQ		0x1C
+#define CONFIG_PLL_DIV_PARAM	0x92392a00
+
+.macro	pbl_loongson1_pll
+	.set	push
+	.set	noreorder
+
+	pbl_reg_writel 0x92392a00, PLL_DIV_PARAM
+	pbl_reg_writel 0x0000001c, PLL_FREQ
+	pbl_sleep t8, 40
+
+	.set	pop
+.endm
+
+.macro set_cpu_window id, base, mask, mmap
+	.set	push
+	.set	noreorder
+
+	li	t8, 0xbfd00000
+	sw	$0, 0x80 + \id * 8 (t8)
+	li	t9, \base
+	sw	t9, 0x00 + \id * 8 (t8)
+	sw	$0, 0x04 + \id * 8 (t8)
+	li	t9, \mask
+	sw	t9, 0x40 + \id * 8 (t8)
+	sw	$0, 0x44 + \id * 8 (t8)
+	li	t9, \mmap
+	sw	t9, 0x80 + \id * 8 (t8)
+	sw	$0, 0x84 + \id * 8 (t8)
+
+	.set	pop
+.endm
+
+.macro pbl_loongson1_remap
+	.set	push
+
+	set_cpu_window 0, 0x1c300000, 0xfff00000, 0x1c3000d2
+	set_cpu_window 1, 0x1fe10000, 0xffffe000, 0x1fe100d3
+	set_cpu_window 2, 0x1fe20000, 0xffffe000, 0x1fe200d3
+	set_cpu_window 3, 0x1fe10000, 0xffff0000, 0x1fe100d0
+	set_cpu_window 4, 0x1fe20000, 0xffff0000, 0x1fe200d0
+	set_cpu_window 5, 0x1ff00000, 0xfff00000, 0x1ff000d0
+	set_cpu_window 6, 0x1f000000, 0xff000000, 0x1f0000d3
+	set_cpu_window 7, 0x00000000, 0x00000000, 0x000000f0
+	li	t8, 0xbfd000e0
+	lw	t9, 0x0 (t8)
+	and	t9, t9, 0xffffff00
+	ori	t9, t9, 0xd0
+	sw	t9, 0x0 (t8)
+
+	lw	t9, 0x8 (t8)
+	and	t9, t9, 0xffffff00
+	ori	t9, t9, 0xd0
+	sw	t9, 0x8 (t8)
+
+	.set	pop
+.endm
+
+#define GPIOCFG1	0xbfd010C4
+.macro	pbl_loongson1_uart_enable
+	.set	push
+
+	pbl_reg_clr 0x00C00000, GPIOCFG1
+
+	.set	pop
+.endm
+
+#endif /* __ASM_MACH_LOONGSON1_PBL_MACROS_H */
-- 
2.7.4


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^ permalink raw reply	[flat|nested] 7+ messages in thread

* [PATCH] MIPS: DEBUG_LL_UART_DIVISOR is 0, use a0 instead
  2020-09-11 12:33 [PATCH] MIPS: loongson1: enable to run from spi flash Du Huanpeng
@ 2020-09-11 12:33 ` Du Huanpeng
  2020-09-11 14:07   ` Ahmad Fatoum
  0 siblings, 1 reply; 7+ messages in thread
From: Du Huanpeng @ 2020-09-11 12:33 UTC (permalink / raw)
  To: barebox; +Cc: Du Huanpeng

this make it possiable pass a0 as divisor to calculate uart baudrate
in run time on boot.

Signed-off-by: Du Huanpeng <u74147@gmail.com>
---
 arch/mips/include/asm/debug_ll_ns16550.h | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/arch/mips/include/asm/debug_ll_ns16550.h b/arch/mips/include/asm/debug_ll_ns16550.h
index df58c4c..a33587a 100644
--- a/arch/mips/include/asm/debug_ll_ns16550.h
+++ b/arch/mips/include/asm/debug_ll_ns16550.h
@@ -66,6 +66,9 @@ static inline void PUTC_LL(char ch)
 	sb	t1, UART_LCR(t0)		/* Write it out */
 
 	li	t1, DEBUG_LL_UART_DIVISOR
+#if DEBUG_LL_UART_DIVISOR == 0
+	move	t1, a0
+#endif
 	sb	t1, UART_DLL(t0)		/* write low order byte */
 	srl	t1, t1, 8
 	sb	t1, UART_DLM(t0)		/* write high order byte */
-- 
2.7.4


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^ permalink raw reply	[flat|nested] 7+ messages in thread

* Re: [PATCH] MIPS: DEBUG_LL_UART_DIVISOR is 0, use a0 instead
  2020-09-11 12:33 ` [PATCH] MIPS: DEBUG_LL_UART_DIVISOR is 0, use a0 instead Du Huanpeng
@ 2020-09-11 14:07   ` Ahmad Fatoum
  2020-09-17 13:56     ` Du Huanpeng
  0 siblings, 1 reply; 7+ messages in thread
From: Ahmad Fatoum @ 2020-09-11 14:07 UTC (permalink / raw)
  To: Du Huanpeng, barebox

On 9/11/20 2:33 PM, Du Huanpeng wrote:
> this make it possiable pass a0 as divisor to calculate uart baudrate
> in run time on boot.

This is not Ok. Your last commit has your board pass the divisor in a0 now, but other
boards, like the netgear-wg102, don't. Your change might break their UART because the
code there doesn't expect that a0 needs to have a valid value. If you want to do this,
you should migrate all users of this function all at once to supply a valid divisor
(probably `move a0, DEBUG_LL_UART_DIVISOR`).

It's same thing in C. You don't add a new parameter to a function without checking
that all callsites handle this correctly.

> 
> Signed-off-by: Du Huanpeng <u74147@gmail.com>
> ---
>  arch/mips/include/asm/debug_ll_ns16550.h | 3 +++
>  1 file changed, 3 insertions(+)
> 
> diff --git a/arch/mips/include/asm/debug_ll_ns16550.h b/arch/mips/include/asm/debug_ll_ns16550.h
> index df58c4c..a33587a 100644
> --- a/arch/mips/include/asm/debug_ll_ns16550.h
> +++ b/arch/mips/include/asm/debug_ll_ns16550.h
> @@ -66,6 +66,9 @@ static inline void PUTC_LL(char ch)
>  	sb	t1, UART_LCR(t0)		/* Write it out */
>  
>  	li	t1, DEBUG_LL_UART_DIVISOR
> +#if DEBUG_LL_UART_DIVISOR == 0
> +	move	t1, a0
> +#endif
>  	sb	t1, UART_DLL(t0)		/* write low order byte */
>  	srl	t1, t1, 8
>  	sb	t1, UART_DLM(t0)		/* write high order byte */
> 

-- 
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^ permalink raw reply	[flat|nested] 7+ messages in thread

* Re: [PATCH] MIPS: DEBUG_LL_UART_DIVISOR is 0, use a0 instead
  2020-09-11 14:07   ` Ahmad Fatoum
@ 2020-09-17 13:56     ` Du Huanpeng
  2020-09-17 17:42       ` Ahmad Fatoum
  0 siblings, 1 reply; 7+ messages in thread
From: Du Huanpeng @ 2020-09-17 13:56 UTC (permalink / raw)
  To: Ahmad Fatoum; +Cc: barebox

Hi, this patch should not intoduce any regression to existing boards,
because: 

 1. pass divisor by DEBUG_LL_UART_DIVISOR

#define DEBUG_LL_UART_DIVISOR NUMBER

which the ``NUMBER'' is not ``0'' (zero). In this case, this patch
has no effect and this line of code will be removed by preprocessor,
before compile :)
        move    t1, a0

 2. Pass divisor by a0

#define DEBUG_LL_UART_DIVISOR 0

recalculate the divisor is needed when the pll/div setting is changed
outside of barebox. e.g. ejtag. and load barebox and run in ram.

Because 0 maybe an invalid value for a divisor, so I take this value for
a hint to pass a0 as divisor. this will not conflict with other boards
which pass divisor by defining DEBUG_LL_UART_DIVISOR with a valied value.

> you should migrate all users of this function all at once to supply a valid divisor
> (probably `move a0, DEBUG_LL_UART_DIVISOR`).

MIPS use ``li'' load immediate, and move to copy inter registers.
so, maybe change my patch to:

#if DEBUG_LL_UART_DIVISOR
	li	t1, DEBUG_LL_UART_DIVISOR
#else
	move	t1, a0
#endif

- - - 
or even do a bit tricky:

--- a/arch/mips/include/asm/debug_ll_ns16550.h
+++ b/arch/mips/include/asm/debug_ll_ns16550.h
@@ -65,7 +65,7 @@ static inline void PUTC_LL(char ch)
 	li	t1, UART_LCR_DLAB		/* DLAB on */
 	sb	t1, UART_LCR(t0)		/* Write it out */
 
-	li	t1, DEBUG_LL_UART_DIVISOR
+	add	t1, zero, DEBUG_LL_UART_DIVISOR
 	sb	t1, UART_DLL(t0)		/* write low order byte */
 	srl	t1, t1, 8
 	sb	t1, UART_DLM(t0)		/* write high order byte */
-- 
2.7.4

this will allow to pass divisor by a number or a register.
add is a pseudo insertion can be compile to addi or add depends
on the DEBUG_LL_UART_DIVISOR is a number or a register.


On Fri, Sep 11, 2020 at 04:07:43PM +0200, Ahmad Fatoum wrote:
> On 9/11/20 2:33 PM, Du Huanpeng wrote:
> > this make it possiable pass a0 as divisor to calculate uart baudrate
> > in run time on boot.
> 
> This is not Ok. Your last commit has your board pass the divisor in a0 now, but other
> boards, like the netgear-wg102, don't. Your change might break their UART because the
> code there doesn't expect that a0 needs to have a valid value. If you want to do this,
> you should migrate all users of this function all at once to supply a valid divisor
> (probably `move a0, DEBUG_LL_UART_DIVISOR`).
> 
> It's same thing in C. You don't add a new parameter to a function without checking
> that all callsites handle this correctly.
> 
> > 
> > Signed-off-by: Du Huanpeng <u74147@gmail.com>
> > ---
> >  arch/mips/include/asm/debug_ll_ns16550.h | 3 +++
> >  1 file changed, 3 insertions(+)
> > 
> > diff --git a/arch/mips/include/asm/debug_ll_ns16550.h b/arch/mips/include/asm/debug_ll_ns16550.h
> > index df58c4c..a33587a 100644
> > --- a/arch/mips/include/asm/debug_ll_ns16550.h
> > +++ b/arch/mips/include/asm/debug_ll_ns16550.h
> > @@ -66,6 +66,9 @@ static inline void PUTC_LL(char ch)
> >  	sb	t1, UART_LCR(t0)		/* Write it out */
> >  
> >  	li	t1, DEBUG_LL_UART_DIVISOR
> > +#if DEBUG_LL_UART_DIVISOR == 0
> > +	move	t1, a0
> > +#endif
> >  	sb	t1, UART_DLL(t0)		/* write low order byte */
> >  	srl	t1, t1, 8
> >  	sb	t1, UART_DLM(t0)		/* write high order byte */
> > 
> 
> -- 
> Pengutronix e.K.                           |                             |
> Steuerwalder Str. 21                       | http://www.pengutronix.de/  |
> 31137 Hildesheim, Germany                  | Phone: +49-5121-206917-0    |
> Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


  Regards,
  duhuanpeng


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^ permalink raw reply	[flat|nested] 7+ messages in thread

* Re: [PATCH] MIPS: DEBUG_LL_UART_DIVISOR is 0, use a0 instead
  2020-09-17 13:56     ` Du Huanpeng
@ 2020-09-17 17:42       ` Ahmad Fatoum
  2020-09-25 16:42         ` Du Huanpeng
  0 siblings, 1 reply; 7+ messages in thread
From: Ahmad Fatoum @ 2020-09-17 17:42 UTC (permalink / raw)
  To: Du Huanpeng; +Cc: barebox

Hello,

On 9/17/20 3:56 PM, Du Huanpeng wrote:
> Hi, this patch should not intoduce any regression to existing boards,
> because: 
> 
>  1. pass divisor by DEBUG_LL_UART_DIVISOR
> 
> #define DEBUG_LL_UART_DIVISOR NUMBER
> 
> which the ``NUMBER'' is not ``0'' (zero). In this case, this patch
> has no effect and this line of code will be removed by preprocessor,
> before compile :)
>         move    t1, a0
> 
>  2. Pass divisor by a0
> 
> #define DEBUG_LL_UART_DIVISOR 0
> 
> recalculate the divisor is needed when the pll/div setting is changed
> outside of barebox. e.g. ejtag. and load barebox and run in ram.
> 
> Because 0 maybe an invalid value for a divisor, so I take this value for
> a hint to pass a0 as divisor. this will not conflict with other boards
> which pass divisor by defining DEBUG_LL_UART_DIVISOR with a valied value.

I guess we can agree that

  debug_ll_ns16550_init(
#if DEBUG_LL_UART_DIVISOR
  int a0
#endif
  );

is not the best way to go about it, so why do its equivalent in assembly?
 
>> you should migrate all users of this function all at once to supply a valid divisor
>> (probably `move a0, DEBUG_LL_UART_DIVISOR`).
> 
> MIPS use ``li'' load immediate, and move to copy inter registers.
> so, maybe change my patch to:
> 
> #if DEBUG_LL_UART_DIVISOR
> 	li	t1, DEBUG_LL_UART_DIVISOR
> #else
> 	move	t1, a0
> #endif

I'd prefer you keep it as move t1, a0 without an ifdef and move the argument
passing out of debug_ll_ns16550_init.

Cheers
Ahmad

> 
> - - - 
> or even do a bit tricky:
> 
> --- a/arch/mips/include/asm/debug_ll_ns16550.h
> +++ b/arch/mips/include/asm/debug_ll_ns16550.h
> @@ -65,7 +65,7 @@ static inline void PUTC_LL(char ch)
>  	li	t1, UART_LCR_DLAB		/* DLAB on */
>  	sb	t1, UART_LCR(t0)		/* Write it out */
>  
> -	li	t1, DEBUG_LL_UART_DIVISOR
> +	add	t1, zero, DEBUG_LL_UART_DIVISOR
>  	sb	t1, UART_DLL(t0)		/* write low order byte */
>  	srl	t1, t1, 8
>  	sb	t1, UART_DLM(t0)		/* write high order byte */
> 

-- 
Pengutronix e.K.                           |                             |
Steuerwalder Str. 21                       | http://www.pengutronix.de/  |
31137 Hildesheim, Germany                  | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |

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^ permalink raw reply	[flat|nested] 7+ messages in thread

* Re: [PATCH] MIPS: DEBUG_LL_UART_DIVISOR is 0, use a0 instead
  2020-09-17 17:42       ` Ahmad Fatoum
@ 2020-09-25 16:42         ` Du Huanpeng
  2020-09-25 17:54           ` Ahmad Fatoum
  0 siblings, 1 reply; 7+ messages in thread
From: Du Huanpeng @ 2020-09-25 16:42 UTC (permalink / raw)
  To: Ahmad Fatoum; +Cc: barebox

Hi, How about this, I send this for review, if it is ok,
I will send a patch later.

I add a argument to the macro, and set a default parameter.

+.macro	debug_ll_ns16550_init divisor=DEBUG_LL_UART_DIVISOR


+	/* three forms for ``call'' the macro */
pass a register name
+	debug_ll_ns16550_init v0

pass a immediate number
+	debug_ll_ns16550_init 888

use this macro as usual before
+	debug_ll_ns16550_init

----8<-----

diff --git a/arch/mips/boards/loongson-ls1b/lowlevel.S b/arch/mips/boards/loongson-ls1b/lowlevel.S
index af6ad54e1..7120d80ef 100644
--- a/arch/mips/boards/loongson-ls1b/lowlevel.S
+++ b/arch/mips/boards/loongson-ls1b/lowlevel.S
@@ -28,8 +28,14 @@ ENTRY_FUNCTION(BOARD_PBL_START)
 
 	pbl_loongson1_uart_enable
 	pbl_loongson1_calc_prescale 115200
-	move	a0, v0
+
+	/* three forms for ``call'' the macro */
+	debug_ll_ns16550_init v0
+	debug_ll_ns16550_init 888
+	debug_ll_ns16550_init
+
 	debug_ll_ns16550_init
+
 	debug_ll_ns16550_outnl
 	debug_ll_outc '.'
 	debug_ll_ns16550_outnl
diff --git a/arch/mips/include/asm/debug_ll_ns16550.h b/arch/mips/include/asm/debug_ll_ns16550.h
index a33587a15..44f3d5976 100644
--- a/arch/mips/include/asm/debug_ll_ns16550.h
+++ b/arch/mips/include/asm/debug_ll_ns16550.h
@@ -58,17 +58,14 @@ static inline void PUTC_LL(char ch)
  * Macros for use in assembly language code
  */
 
-.macro	debug_ll_ns16550_init
+.macro	debug_ll_ns16550_init divisor=DEBUG_LL_UART_DIVISOR
 #ifdef CONFIG_DEBUG_LL
 	la	t0, DEBUG_LL_UART_ADDR
 
 	li	t1, UART_LCR_DLAB		/* DLAB on */
 	sb	t1, UART_LCR(t0)		/* Write it out */
 
-	li	t1, DEBUG_LL_UART_DIVISOR
-#if DEBUG_LL_UART_DIVISOR == 0
-	move	t1, a0
-#endif
+	add	t1, zero, \divisor
 	sb	t1, UART_DLL(t0)		/* write low order byte */
 	srl	t1, t1, 8
 	sb	t1, UART_DLM(t0)		/* write high order byte */

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^ permalink raw reply	[flat|nested] 7+ messages in thread

* Re: [PATCH] MIPS: DEBUG_LL_UART_DIVISOR is 0, use a0 instead
  2020-09-25 16:42         ` Du Huanpeng
@ 2020-09-25 17:54           ` Ahmad Fatoum
  0 siblings, 0 replies; 7+ messages in thread
From: Ahmad Fatoum @ 2020-09-25 17:54 UTC (permalink / raw)
  To: Du Huanpeng; +Cc: barebox

Hello Du,

On 9/25/20 6:42 PM, Du Huanpeng wrote:
> Hi, How about this, I send this for review, if it is ok,
> I will send a patch later.
> 
> I add a argument to the macro, and set a default parameter.
> 
> +.macro	debug_ll_ns16550_init divisor=DEBUG_LL_UART_DIVISOR

Sounds great! Much less error prone IMO.

> 
> 
> +	/* three forms for ``call'' the macro */
> pass a register name
> +	debug_ll_ns16550_init v0
> 
> pass a immediate number
> +	debug_ll_ns16550_init 888
> 
> use this macro as usual before
> +	debug_ll_ns16550_init
> 
> ----8<-----
> 
> diff --git a/arch/mips/boards/loongson-ls1b/lowlevel.S b/arch/mips/boards/loongson-ls1b/lowlevel.S
> index af6ad54e1..7120d80ef 100644
> --- a/arch/mips/boards/loongson-ls1b/lowlevel.S
> +++ b/arch/mips/boards/loongson-ls1b/lowlevel.S
> @@ -28,8 +28,14 @@ ENTRY_FUNCTION(BOARD_PBL_START)
>  
>  	pbl_loongson1_uart_enable
>  	pbl_loongson1_calc_prescale 115200
> -	move	a0, v0
> +
> +	/* three forms for ``call'' the macro */
> +	debug_ll_ns16550_init v0
> +	debug_ll_ns16550_init 888
> +	debug_ll_ns16550_init
> +
>  	debug_ll_ns16550_init
> +
>  	debug_ll_ns16550_outnl
>  	debug_ll_outc '.'
>  	debug_ll_ns16550_outnl
> diff --git a/arch/mips/include/asm/debug_ll_ns16550.h b/arch/mips/include/asm/debug_ll_ns16550.h
> index a33587a15..44f3d5976 100644
> --- a/arch/mips/include/asm/debug_ll_ns16550.h
> +++ b/arch/mips/include/asm/debug_ll_ns16550.h
> @@ -58,17 +58,14 @@ static inline void PUTC_LL(char ch)
>   * Macros for use in assembly language code
>   */
>  
> -.macro	debug_ll_ns16550_init
> +.macro	debug_ll_ns16550_init divisor=DEBUG_LL_UART_DIVISOR
>  #ifdef CONFIG_DEBUG_LL
>  	la	t0, DEBUG_LL_UART_ADDR
>  
>  	li	t1, UART_LCR_DLAB		/* DLAB on */
>  	sb	t1, UART_LCR(t0)		/* Write it out */
>  
> -	li	t1, DEBUG_LL_UART_DIVISOR
> -#if DEBUG_LL_UART_DIVISOR == 0
> -	move	t1, a0
> -#endif
> +	add	t1, zero, \divisor
>  	sb	t1, UART_DLL(t0)		/* write low order byte */
>  	srl	t1, t1, 8
>  	sb	t1, UART_DLM(t0)		/* write high order byte */
> 

-- 
Pengutronix e.K.                           |                             |
Steuerwalder Str. 21                       | http://www.pengutronix.de/  |
31137 Hildesheim, Germany                  | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |

_______________________________________________
barebox mailing list
barebox@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/barebox

^ permalink raw reply	[flat|nested] 7+ messages in thread

end of thread, other threads:[~2020-09-25 17:54 UTC | newest]

Thread overview: 7+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2020-09-11 12:33 [PATCH] MIPS: loongson1: enable to run from spi flash Du Huanpeng
2020-09-11 12:33 ` [PATCH] MIPS: DEBUG_LL_UART_DIVISOR is 0, use a0 instead Du Huanpeng
2020-09-11 14:07   ` Ahmad Fatoum
2020-09-17 13:56     ` Du Huanpeng
2020-09-17 17:42       ` Ahmad Fatoum
2020-09-25 16:42         ` Du Huanpeng
2020-09-25 17:54           ` Ahmad Fatoum

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