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From: Steffen Trumtrar <s.trumtrar@pengutronix.de>
To: Sascha Hauer <s.hauer@pengutronix.de>
Cc: barebox@lists.infradead.org
Subject: Re: [PATCH v2 5/8] ARM: socfpga: add arria10 support
Date: Wed, 03 May 2017 15:31:20 +0200	[thread overview]
Message-ID: <73bmrahxsn.fsf@pengutronix.de> (raw)
In-Reply-To: <20170503115217.bjf7npnedoyjzjes@pengutronix.de>


Sascha Hauer <s.hauer@pengutronix.de> writes:

> On Wed, May 03, 2017 at 01:49:51PM +0200, Sascha Hauer wrote:
>> On Fri, Apr 28, 2017 at 04:41:41PM +0200, Steffen Trumtrar wrote:
>> > Arria10 is a SoC + FPGA like the Cyclone5 SoCFPGA that
>> > is already supported in barebox.
>> > Both a the same in some parts, but totaly different in
>> > others. Most of the hardware blocks are the same in the
>> > SoC parts. The OCRAM is larger on the Arria10 and the
>> > SDRAM controller is different.
>> > The serial core only supports 32bit accesses (different to
>> > the 8bit accesses on the Cyclone5).
>> > 
>> > As Arria10 has 256KB of OCRAM, it is possible to fit a larger
>> > barebox (and/or use PBL) instead of the two stage bootprocess
>> > used on the Cyclone5 and its 64KB OCRAM.
>> > 
>> > Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
>> > ---
>> >  arch/arm/Kconfig                                            |   6 +-
>> >  arch/arm/mach-socfpga/Kconfig                               |  19 +-
>> >  arch/arm/mach-socfpga/Makefile                              |  10 +-
>> >  arch/arm/mach-socfpga/arria10-bootsource.c                  |  53 +-
>> >  arch/arm/mach-socfpga/arria10-clock-manager.c               | 815 +++++++-
>> >  arch/arm/mach-socfpga/arria10-generic.c                     |  85 +-
>> >  arch/arm/mach-socfpga/arria10-init.c                        | 193 ++-
>> >  arch/arm/mach-socfpga/arria10-reset-manager.c               | 398 +++-
>> >  arch/arm/mach-socfpga/arria10-sdram.c                       | 535 +++++-
>> >  arch/arm/mach-socfpga/cyclone5-bootsource.c                 |  45 +-
>> 
>> This does not apply. arch/arm/mach-socfpga/cyclone5-bootsource.c is
>> modified here but does not exist in my tree.
>
> Forget this. Patch 1/8 did not make it to the list. I used this from the
> v1 series.

Patch 1/8 is in the moderator queue AFAIK because it is a little
bigger on the inside. It just renames a lot of stuff from
socfpga-* to cyclone5-*

Regards,
Steffen

-- 
Pengutronix e.K.                           | Steffen Trumtrar            |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |

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  reply	other threads:[~2017-05-03 13:31 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-04-28 14:41 [PATCH v2 0/8] SoCFPGA: add support for Arria10 Steffen Trumtrar
2017-04-28 14:41 ` [PATCH v2 2/8] clk: socfpga: move driver to subdirectory Steffen Trumtrar
2017-04-28 14:41 ` [PATCH v2 3/8] net: designware: add dwmac-3.72a compatible Steffen Trumtrar
2017-04-28 14:41 ` [PATCH v2 4/8] ARM: socfpga: make debug_ll configurable Steffen Trumtrar
2017-04-28 14:41 ` [PATCH v2 5/8] ARM: socfpga: add arria10 support Steffen Trumtrar
2017-05-03 11:49   ` Sascha Hauer
2017-05-03 11:52     ` Sascha Hauer
2017-05-03 13:31       ` Steffen Trumtrar [this message]
2017-04-28 14:41 ` [PATCH v2 6/8] clk: socfpga: add arria10 clk drivers Steffen Trumtrar
2017-04-28 14:41 ` [PATCH v2 7/8] ARM: socfpga: add support for reflex achilles board Steffen Trumtrar
2017-05-03 11:52   ` Sascha Hauer
2017-05-03 13:39     ` Steffen Trumtrar
2017-05-04  6:13       ` Sascha Hauer
2017-04-28 14:41 ` [PATCH v2 8/8] ARM: socfpga: add arria10 defconfig Steffen Trumtrar

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