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charset=utf-8 Content-Transfer-Encoding: quoted-printable Date: Tue, 20 Oct 2026 14:30:42 +0000 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.9.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20261020_073051_449828_70D68EA7 X-CRM114-Status: GOOD ( 16.92 ) X-Spam-Score: -2.1 (--) X-Spam-Report: Spam detection software, running on the system "bombadil.infradead.org", has NOT identified this incoming email as spam. The original message has been attached to this so you can view it or label similar future email. If you have any questions, see the administrator of that system for details. Content preview: Hi Michael, On 2026-10-07 12:55, Michael Tretter wrote: > The image of the first stage boot loader on the Agilex 5 is limited to > approximately 256k. The SRAM is actually 512k, but there is some handoff > data a [...] Content analysis details: (-2.1 points, 5.0 required) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 SPF_HELO_PASS SPF: HELO matches SPF record -0.0 SPF_PASS SPF: sender matches SPF record 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from envelope-from domain -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] 0.0 DMARC_MISSING Missing DMARC policy X-BeenThere: barebox@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: BAREBOX , Michael Tretter Sender: "barebox" X-Rspamd-Server: mx1 X-Rspamd-Queue-Id: 131BD2018A0 X-Spamd-Result: default: False [-54.41 / 15.00]; RECEIVED_AUTHENTICATED_BY_MX1(-50.00)[]; BAYES_HAM(-3.00)[100.00%]; MISSING_MIME_VERSION(2.00)[]; DWL_DNSWL_MED(-2.00)[infradead.org:dkim]; KNOWN_LIST_ID(-1.00)[barebox.lists.infradead.org]; ARC_REJECT(1.00)[signature check failed: fail, {[1] = sig:pengutronix.de:reject}]; RCVD_DKIM_ARC_DNSWL_MED(-0.50)[]; R_DKIM_ALLOW(-0.20)[lists.infradead.org:s=bombadil.20210309]; RCVD_IN_DNSWL_MED(-0.20)[2607:7c80:54:3::133:from]; MAILLIST(-0.20)[mailman]; R_SPF_ALLOW(-0.20)[+mx:c]; MIME_GOOD(-0.10)[text/plain]; HAS_LIST_UNSUB(-0.01)[]; TO_DN_ALL(0.00)[]; TAGGED_FROM(0.00)[lore=pengutronix.de]; RCVD_TLS_LAST(0.00)[]; RECEIVED_HELO_LOCALHOST(0.00)[]; MIME_TRACE(0.00)[0:+]; RCVD_COUNT_THREE(0.00)[3]; FORGED_SENDER(0.00)[s.hauer@pengutronix.de,barebox-bounces@lists.infradead.org]; FORWARDED(0.00)[barebox@lists.infradead.org]; DMARC_NA(0.00)[pengutronix.de]; DKIM_TRACE(0.00)[lists.infradead.org:+,pengutronix.de:-]; DKIM_MIXED(0.00)[]; FORGED_SENDER_FORWARDING(0.00)[]; NEURAL_HAM(-0.00)[-1.000]; FROM_NEQ_ENVFROM(0.00)[s.hauer@pengutronix.de,barebox-bounces@lists.infradead.org]; FROM_HAS_DN(0.00)[]; R_DKIM_REJECT(0.00)[pengutronix.de:s=20260414]; MID_RHS_MATCH_FROM(0.00)[]; ASN(0.00)[asn:7247, ipnet:2607:7c80:54::/48, country:US]; ARC_SIGNED(0.00)[pengutronix.de:s=20260414:i=2]; RCVD_VIA_SMTP_AUTH(0.00)[]; RCPT_COUNT_THREE(0.00)[3]; MISSING_XM_UA(0.00)[]; FORGED_SENDER_MAILLIST(0.00)[] X-Rspamd-Action: no action X-Stat-Signature: unfj9ghdr94aut3cnfoao7bryymnjnjf Hi Michael, On 2026-10-07 12:55, Michael Tretter wrote: > The image of the first stage boot loader on the Agilex 5 is limited to > approximately 256k. The SRAM is actually 512k, but there is some handoff > data at the send of the SRAM, which must not be overridden. There are > some size checks, but due to compression of the FSBL image, it's the > possible image size cannot be determined reliably. >=20 > The barebox PBL and a full featured barebox proper are easily larger > than the allowed size. Compression of the piggy data may even be counter > productive, since the entire FSBL image is compressed again when > creating the boot image. >=20 > Add support to remove the piggy data from the FSBL image, and load the > second stage (consisting of a barebox PBL and barebox proper) from flash > in the PBL. >=20 > Patches 1-4 rework the Cadence QSPI NOR flash driver to be available in > the PBL via the pbl_bio abstraction. >=20 > Patches 5-9 extend the Agilex 5 support to initialize the flash driver > in the PBL and chain load an SSBL as bl33 instead of copying the > currently running barebox. The patches also add the infrastructure to > build the PBL without piggy data and device tree. >=20 > Patches 10-11 enable the xload support in the Arrow AXE5 Eagle board. >=20 This series currently breaks compilation on -next. socfpga-agilex5_defconfig fails with: ../arch/arm/boards/arrow-axe5-eagle/lowlevel.c:17:23: error: 'CONFIG_MACH_S= OCFPGA_ARROW_AXE5_EAGLE_XLOAD_ADDR' undeclared here (not in a function); di= d you mean 'CONFIG_MACH_SOCFPGA_ARROW_AXE5_EAGLE'? 17 | .nor_offset =3D CONFIG_MACH_SOCFPGA_ARROW_AXE5_EAGLE_XLOAD_= ADDR, | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~= ~~ | CONFIG_MACH_SOCFPGA_ARROW_AXE5_EAGLE ../arch/arm/boards/arrow-axe5-eagle/lowlevel.c:18:21: error: 'CONFIG_MACH_S= OCFPGA_ARROW_AXE5_EAGLE_XLOAD_SIZE' undeclared here (not in a function); di= d you mean 'CONFIG_MACH_SOCFPGA_ARROW_AXE5_EAGLE'? 18 | .nor_size =3D CONFIG_MACH_SOCFPGA_ARROW_AXE5_EAGLE_XLOAD_SI= ZE, | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ | CONFIG_MACH_SOCFPGA_ARROW_AXE5_EAGLE xload support is currently optional and disabled, the existence of CONFIG_MACH_SOCFPGA_ARROW_AXE5_EAGLE_XLOAD_ADDR depends on the xload being enabled, but they are used unconditionally. Could you send a fixup? Sascha --=20 Pengutronix e.K. | | Steuerwalder Str. 21 | http://www.pengutronix.de/ | 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 | Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 |