* LS1046A PCIE
@ 2023-11-07 19:23 Renaud Barbier
2023-11-09 6:49 ` Sascha Hauer
0 siblings, 1 reply; 2+ messages in thread
From: Renaud Barbier @ 2023-11-07 19:23 UTC (permalink / raw)
To: Barebox List
I noticed in U-boot the code in https://github.com/u-boot/u-boot/blob/master/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_serdes.c
There is a function setup_serdes_volt to set up the serdes which I do not see in Barebox.
Why was this not implemented?
Are the RCW enough that the code is not needed.
Cheers,
Renaud
^ permalink raw reply [flat|nested] 2+ messages in thread
* Re: LS1046A PCIE
2023-11-07 19:23 LS1046A PCIE Renaud Barbier
@ 2023-11-09 6:49 ` Sascha Hauer
0 siblings, 0 replies; 2+ messages in thread
From: Sascha Hauer @ 2023-11-09 6:49 UTC (permalink / raw)
To: Renaud Barbier; +Cc: Barebox List
Hi Renaud,
On Tue, Nov 07, 2023 at 07:23:09PM +0000, Renaud Barbier wrote:
> I noticed in U-boot the code in https://github.com/u-boot/u-boot/blob/master/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_serdes.c
> There is a function setup_serdes_volt to set up the serdes which I do not see in Barebox.
> Why was this not implemented?
> Are the RCW enough that the code is not needed.
I looked at the code, but it doesn't ring a bell with me. I faintly
remember that this code exists, but that's all
Sascha
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