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charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: ametek.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: BL0PR07MB5665.namprd07.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: b7bccdc4-0222-4e20-5009-08db23d15e91 X-MS-Exchange-CrossTenant-originalarrivaltime: 13 Mar 2023 14:43:54.4306 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 31a88536-e2ab-44b5-837e-5110158247ab X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: oGIPrwceTLLiKhj+6vEk21qfWp375IBgL8zYZAkljlFlce7kohTbedefF7K2WMrbjoHNrV4mli2tnRou1tYmG41MyOmd5b6W6aqDmF1pEcg= X-MS-Exchange-Transport-CrossTenantHeadersStamped: BN7PR07MB4354 X-Proofpoint-ORIG-GUID: gEs9bIIFeGrowsNZ1XIcvec-mz_ZGuKg X-Proofpoint-GUID: gEs9bIIFeGrowsNZ1XIcvec-mz_ZGuKg X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.942,Hydra:6.0.573,FMLib:17.11.170.22 definitions=2023-03-13_07,2023-03-13_02,2023-02-09_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 priorityscore=1501 mlxscore=0 lowpriorityscore=0 phishscore=0 clxscore=1015 bulkscore=0 adultscore=0 suspectscore=0 impostorscore=0 malwarescore=0 mlxlogscore=999 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2212070000 definitions=main-2303130115 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230313_074359_076177_57550A1E X-CRM114-Status: GOOD ( 21.07 ) X-BeenThere: barebox@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "barebox" X-SA-Exim-Connect-IP: 2607:7c80:54:3::133 X-SA-Exim-Mail-From: barebox-bounces+lore=pengutronix.de@lists.infradead.org X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on metis.ext.pengutronix.de X-Spam-Level: X-Spam-Status: No, score=-5.0 required=4.0 tests=AWL,BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,RCVD_IN_DNSWL_MED,SPF_HELO_NONE,SPF_NONE autolearn=unavailable autolearn_force=no version=3.4.2 Subject: [PATCH 2/2] ARM: Layerscape: Add LS1021A IOT board support X-SA-Exim-Version: 4.2.1 (built Wed, 08 May 2019 21:11:16 +0000) X-SA-Exim-Scanned: Yes (on metis.ext.pengutronix.de) The LS1021A-IOT is a NXP reference board. Currently supported: - DDR3 RAM fixed settings - UART - SPI boot Signed-off-by: Renaud Barbier --- arch/arm/boards/ls1021aiot/Makefile | 3 + arch/arm/boards/ls1021aiot/board.c | 47 +++++++ arch/arm/boards/ls1021aiot/lowlevel.c | 120 ++++++++++++++++++ arch/arm/boards/ls1021aiot/ls102xa_pbi.cfg | 11 ++ .../boards/ls1021aiot/ls102xa_rcw_sd_qspi.cfg | 8 ++ arch/arm/boards/ls1021aiot/start.S | 11 ++ arch/arm/configs/layerscape_v7_defconfig | 94 ++++++++++++++ arch/arm/dts/Makefile | 1 + arch/arm/dts/fsl-ls1021a-iot.dts | 77 +++++++++++ 9 files changed, 372 insertions(+) create mode 100644 arch/arm/boards/ls1021aiot/Makefile create mode 100644 arch/arm/boards/ls1021aiot/board.c create mode 100644 arch/arm/boards/ls1021aiot/lowlevel.c create mode 100644 arch/arm/boards/ls1021aiot/ls102xa_pbi.cfg create mode 100644 arch/arm/boards/ls1021aiot/ls102xa_rcw_sd_qspi.cfg create mode 100644 arch/arm/boards/ls1021aiot/start.S create mode 100644 arch/arm/configs/layerscape_v7_defconfig create mode 100644 arch/arm/dts/fsl-ls1021a-iot.dts diff --git a/arch/arm/boards/ls1021aiot/Makefile b/arch/arm/boards/ls1021ai= ot/Makefile new file mode 100644 index 0000000000..df69ce814b --- /dev/null +++ b/arch/arm/boards/ls1021aiot/Makefile @@ -0,0 +1,3 @@ +lwl-y +=3D lowlevel.o +obj-y +=3D board.o +lwl-y +=3D start.o diff --git a/arch/arm/boards/ls1021aiot/board.c b/arch/arm/boards/ls1021aio= t/board.c new file mode 100644 index 0000000000..6fe35f008c --- /dev/null +++ b/arch/arm/boards/ls1021aiot/board.c @@ -0,0 +1,47 @@ +// SPDX-License-Identifier: GPL-2.0+ +// SPDX-FileCopyrightText: (C) Copyright 2023 Ametek Inc. +// SPDX-FileCopyrightText: 2023 Renaud Barbier = , + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +static int iot_mem_init(void) +{ + if (!of_machine_is_compatible("fsl,ls1021a")) + return 0; + + arm_add_mem_device("ram0", 0x80000000, 0x40000000); + + return 0; +} +mem_initcall(iot_mem_init); + +static int iot_postcore_init(void) +{ + struct ls102xa_ccsr_scfg *scfg =3D IOMEM(LSCH2_SCFG_ADDR); + + if (!of_machine_is_compatible("fsl,ls1021a")) + return 0; + + /* clear BD & FR bits for BE BD's and frame data */ + clrbits_be32(&scfg->etsecdmamcr, SCFG_ETSECDMAMCR_LE_BD_FR); + out_be32(&scfg->etsecmcr, SCFG_ETSECCMCR_GE2_CLK125); + + return 0; +} +coredevice_initcall(iot_postcore_init); diff --git a/arch/arm/boards/ls1021aiot/lowlevel.c b/arch/arm/boards/ls1021= aiot/lowlevel.c new file mode 100644 index 0000000000..4cc6673eeb --- /dev/null +++ b/arch/arm/boards/ls1021aiot/lowlevel.c @@ -0,0 +1,120 @@ +// SPDX-License-Identifier: GPL-2.0+ +// SPDX-FileCopyrightText: (C) Copyright 2023 Ametek Inc. +// SPDX-FileCopyrightText: 2023 Renaud Barbier + +/* + * Derived from Freescale LSDK-19.09-update-311219 + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +static struct fsl_ddr_controller ddrc[] =3D { + { + .memctl_opts.ddrtype =3D SDRAM_TYPE_DDR3, + .base =3D IOMEM(LSCH2_DDR_ADDR), + .ddr_freq =3D LS1021A_DDR_FREQ, + .erratum_A009942 =3D 1, + .chip_selects_per_ctrl =3D 4, + .fsl_ddr_config_reg =3D { + .cs[0].bnds =3D 0x008000bf, + .cs[0].config =3D 0x80014302, + .cs[0].config_2 =3D 0x00000000, + .cs[1].bnds =3D 0x00000000, + .cs[1].config =3D 0x00000000, + .cs[1].config_2 =3D 0x00000000, + .cs[2].bnds =3D 0x00000000, + .cs[2].config =3D 0x00000000, + .cs[2].config_2 =3D 0x00000000, + .cs[3].bnds =3D 0x00000000, + .cs[3].config =3D 0x00000000, + .cs[3].config_2 =3D 0x00000000, + .timing_cfg_3 =3D 0x010e1000, + .timing_cfg_0 =3D 0x50550004, + .timing_cfg_1 =3D 0xbcb38c56, + .timing_cfg_2 =3D 0x0040d120, + .ddr_sdram_cfg =3D 0x470c0008, + .ddr_sdram_cfg_2 =3D 0x00401010, + .ddr_sdram_mode =3D 0x00061c60, + .ddr_sdram_mode_2 =3D 0x00180000, + .ddr_sdram_interval =3D 0x18600618, + .ddr_data_init =3D 0xDEADBEEF, + .ddr_sdram_clk_cntl =3D 0x02000000, + .ddr_init_addr =3D 0x00000000, + .ddr_init_ext_addr =3D 0x00000000, + .timing_cfg_4 =3D 0x00000001, + .timing_cfg_5 =3D 0x03401400, + .ddr_zq_cntl =3D 0x89080600, + .ddr_wrlvl_cntl =3D 0x8655f605, + .ddr_wrlvl_cntl_2 =3D 0x05060607, + .ddr_wrlvl_cntl_3 =3D 0x05050505, + .ddr_sr_cntr =3D 0x00000000, + .ddr_sdram_rcw_1 =3D 0x00000000, + .ddr_sdram_rcw_2 =3D 0x00000000, + .ddr_sdram_rcw_3 =3D 0x00000000, + .ddr_cdr1 =3D 0x80040000, + .ddr_cdr2 =3D 0x000000C0, + .dq_map_0 =3D 0x00000000, + .dq_map_1 =3D 0x00000000, + .dq_map_2 =3D 0x00000000, + .dq_map_3 =3D 0x00000000, + .debug[28] =3D 0x00700046, + }, + }, +}; + +extern char __dtb_fsl_ls1021a_iot_start[]; + +static noinline __noreturn void ls1021aiot_r_entry(void) +{ + unsigned long membase =3D LAYERSCAPE_DDR_SDRAM_BASE; + + if (get_pc() >=3D membase) { + barebox_arm_entry(membase, SZ_1G - SZ_64M, + __dtb_fsl_ls1021a_iot_start); + } + + arm_cpu_lowlevel_init(); + ls102xa_init_lowlevel(); + + debug_ll_init(); + + udelay(500); + putc_ll('>'); + + IMD_USED_OF(fsl_ls1021a_iot); + + fsl_ddr_set_memctl_regs(&ddrc[0], 0); + + ls1021a_errata_post_ddr(); + + ls1021a_xload_start_image(SZ_1G, 0, 0); + + pr_err("Booting failed\n"); + + while (1) + ; +} + +void ls1021aiot_entry(unsigned long r0, unsigned long r1, unsigned long r2= ); + +__noreturn void +ls1021aiot_entry(unsigned long r0, unsigned long r1, unsigned long r2) +{ + relocate_to_current_adr(); + setup_c(); + + ls1021aiot_r_entry(); +} diff --git a/arch/arm/boards/ls1021aiot/ls102xa_pbi.cfg b/arch/arm/boards/l= s1021aiot/ls102xa_pbi.cfg new file mode 100644 index 0000000000..840299be8d --- /dev/null +++ b/arch/arm/boards/ls1021aiot/ls102xa_pbi.cfg @@ -0,0 +1,11 @@ +#PBI commands + +09570200 ffffffff +09570158 00000300 +8940007c 21f47300 +#Configure Scratch register +09ee0200 10000000 +#Configure alternate space +09570158 00001000 +#Flush PBL data +096100c0 000FFFFF diff --git a/arch/arm/boards/ls1021aiot/ls102xa_rcw_sd_qspi.cfg b/arch/arm/= boards/ls1021aiot/ls102xa_rcw_sd_qspi.cfg new file mode 100644 index 0000000000..3b5300501d --- /dev/null +++ b/arch/arm/boards/ls1021aiot/ls102xa_rcw_sd_qspi.cfg @@ -0,0 +1,8 @@ +#PBL preamble and RCW header +aa55aa55 01ee0100 + +#disable IFC, enable QSPI and DSPI +0608000a 00000000 00000000 00000000 +20000000 08407900 e0025a00 21046000 +00000000 00000000 00000000 20038000 +20024800 881b1340 00000000 00000000 diff --git a/arch/arm/boards/ls1021aiot/start.S b/arch/arm/boards/ls1021aio= t/start.S new file mode 100644 index 0000000000..c907777ca1 --- /dev/null +++ b/arch/arm/boards/ls1021aiot/start.S @@ -0,0 +1,11 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ +#include +#include + +#define STACK_TOP 0x10020000 + +ENTRY_PROC(start_ls1021aiot) + ldr r3, =3DSTACK_TOP + mov sp, r3 + b ls1021aiot_entry +ENTRY_PROC_END(start_ls1021aiot) diff --git a/arch/arm/configs/layerscape_v7_defconfig b/arch/arm/configs/la= yerscape_v7_defconfig new file mode 100644 index 0000000000..69176738d7 --- /dev/null +++ b/arch/arm/configs/layerscape_v7_defconfig @@ -0,0 +1,94 @@ +CONFIG_ARCH_LAYERSCAPE=3Dy +CONFIG_MACH_LS1021AIOT=3Dy +CONFIG_MMU=3Dy +CONFIG_MALLOC_SIZE=3D0x0 +CONFIG_MALLOC_TLSF=3Dy +CONFIG_KALLSYMS=3Dy +CONFIG_RELOCATABLE=3Dy +CONFIG_HUSH_FANCY_PROMPT=3Dy +CONFIG_CMDLINE_EDITING=3Dy +CONFIG_AUTO_COMPLETE=3Dy +CONFIG_MENU=3Dy +CONFIG_BOOTM_SHOW_TYPE=3Dy +CONFIG_BOOTM_VERBOSE=3Dy +CONFIG_BOOTM_INITRD=3Dy +CONFIG_BOOTM_OFTREE=3Dy +CONFIG_BOOTM_OFTREE_UIMAGE=3Dy +CONFIG_BLSPEC=3Dy +CONFIG_CONSOLE_ACTIVATE_NONE=3Dy +CONFIG_CONSOLE_ALLOW_COLOR=3Dy +CONFIG_PBL_CONSOLE=3Dy +CONFIG_DEFAULT_ENVIRONMENT_GENERIC_NEW=3Dy +CONFIG_RESET_SOURCE=3Dy +CONFIG_CMD_DMESG=3Dy +CONFIG_LONGHELP=3Dy +CONFIG_CMD_IOMEM=3Dy +CONFIG_CMD_IMD=3Dy +CONFIG_CMD_MEMINFO=3Dy +CONFIG_CMD_GO=3Dy +CONFIG_CMD_RESET=3Dy +CONFIG_CMD_UIMAGE=3Dy +CONFIG_CMD_PARTITION=3Dy +CONFIG_CMD_MOUNT=3Dy +CONFIG_CMD_UBI=3Dy +CONFIG_CMD_UBIFORMAT=3Dy +CONFIG_CMD_UMOUNT=3Dy +CONFIG_CMD_EXPORT=3Dy +CONFIG_CMD_LOADENV=3Dy +CONFIG_CMD_PRINTENV=3Dy +CONFIG_CMD_MAGICVAR=3Dy +CONFIG_CMD_MAGICVAR_HELP=3Dy +CONFIG_CMD_SAVEENV=3Dy +CONFIG_CMD_FILETYPE=3Dy +CONFIG_CMD_LN=3Dy +CONFIG_CMD_MD5SUM=3Dy +CONFIG_CMD_UNCOMPRESS=3Dy +CONFIG_CMD_LET=3Dy +CONFIG_CMD_MSLEEP=3Dy +CONFIG_CMD_READF=3Dy +CONFIG_CMD_SLEEP=3Dy +CONFIG_CMD_ECHO_E=3Dy +CONFIG_CMD_EDIT=3Dy +CONFIG_CMD_MENU=3Dy +CONFIG_CMD_MENU_MANAGEMENT=3Dy +CONFIG_CMD_MENUTREE=3Dy +CONFIG_CMD_READLINE=3Dy +CONFIG_CMD_TIMEOUT=3Dy +CONFIG_CMD_CRC=3Dy +CONFIG_CMD_CRC_CMP=3Dy +CONFIG_CMD_MEMTEST=3Dy +CONFIG_CMD_MM=3Dy +CONFIG_CMD_CLK=3Dy +CONFIG_CMD_DETECT=3Dy +CONFIG_CMD_FLASH=3Dy +CONFIG_CMD_GPIO=3Dy +CONFIG_CMD_I2C=3Dy +CONFIG_CMD_LED=3Dy +CONFIG_CMD_SPI=3Dy +CONFIG_CMD_LED_TRIGGER=3Dy +CONFIG_CMD_BAREBOX_UPDATE=3Dy +CONFIG_CMD_OF_NODE=3Dy +CONFIG_CMD_OF_PROPERTY=3Dy +CONFIG_CMD_OFTREE=3Dy +CONFIG_CMD_TIME=3Dy +CONFIG_OF_BAREBOX_DRIVERS=3Dy +CONFIG_DRIVER_SERIAL_NS16550=3Dy +CONFIG_DRIVER_SPI_FSL_QUADSPI=3Dy +CONFIG_MTD_UBI=3Dy +CONFIG_MTD_UBI_BEB_LIMIT=3D20 +CONFIG_I2C=3Dy +CONFIG_I2C_IMX=3Dy +CONFIG_I2C_MUX=3Dy +CONFIG_I2C_MUX_PCA954x=3Dy +CONFIG_MTD=3Dy +CONFIG_MTD_M25P80=3Dy +CONFIG_MCI=3Dy +CONFIG_MCI_MMC_BOOT_PARTITIONS=3Dy +CONFIG_MCI_IMX_ESDHC=3Dy +CONFIG_LED_PCA955X=3Dy +CONFIG_EEPROM_AT25=3Dy +CONFIG_EEPROM_AT24=3Dy +CONFIG_GPIO_PCA953X=3Dy +CONFIG_ZLIB=3Dy +CONFIG_LZO_DECOMPRESS=3Dy +CONFIG_FS_TFTP=3Dy diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 7f0d589d89..0a7cceb461 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -202,6 +202,7 @@ lwl-$(CONFIG_MACH_ZII_IMX7D_DEV) +=3D imx7d-zii-rpu2.dt= b.o imx7d-zii-rmu2.dtb.o lwl-$(CONFIG_MACH_WAGO_PFC_AM35XX) +=3D am35xx-pfc-750_820x.dtb.o lwl-$(CONFIG_MACH_LS1046ARDB) +=3D fsl-ls1046a-rdb.dtb.o lwl-$(CONFIG_MACH_TQMLS1046A) +=3D fsl-tqmls1046a-mbls10xxa.dtb.o +lwl-$(CONFIG_MACH_LS1021AIOT) +=3D fsl-ls1021a-iot.dtb.o lwl-$(CONFIG_MACH_ZEDBOARD) +=3D zynq-zed.dtb.o lwl-$(CONFIG_MACH_MNT_REFORM) +=3D imx8mq-mnt-reform2.dtb.o lwl-$(CONFIG_MACH_VARISCITE_DT8MCUSTOMBOARD_IMX8MP) +=3D imx8mp-var-dart-d= t8mcustomboard.dtb.o diff --git a/arch/arm/dts/fsl-ls1021a-iot.dts b/arch/arm/dts/fsl-ls1021a-io= t.dts new file mode 100644 index 0000000000..85331eefb4 --- /dev/null +++ b/arch/arm/dts/fsl-ls1021a-iot.dts @@ -0,0 +1,77 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Freescale ls1021a IOT board device tree source + * + * Copyright 2016 Freescale Semiconductor, Inc. + */ + +/dts-v1/; + +#include + +/ { + chosen { + stdout-path =3D &uart0; + + environment { + compatible =3D "barebox,environment"; + device-path =3D &environment_qspi; + }; + }; +}; + +&qspi { + bus-num =3D <0>; + status =3D "okay"; + + s70fl01gs: flash@0 { + compatible =3D "jedec,spi-nor"; + #address-cells =3D <1>; + #size-cells =3D <1>; + spi-max-frequency =3D <20000000>; + reg =3D <0>; + + partitions { + #address-cells =3D <1>; + #size-cells =3D <1>; + + compatible =3D "fixed-partitions"; + + partition@0 { + label =3D "barebox"; + reg =3D <0 0x100000>; + }; + + environment_qspi: partition@100000 { + label =3D "barebox-environment"; + reg =3D <0x100000 0x40000>; + }; + }; + }; +}; + +&i2c0 { + status =3D "disabled"; +}; + +&i2c1 { + status =3D "okay"; + eeprom@51 { + compatible =3D "atmel,24c512"; + reg =3D <0x51>; + }; +}; + +/* I2C1 and I2C2 are connected due to Errata on rev1 board */ +&i2c2 { + status =3D "disabled"; +}; + +&uart0 { + status =3D "okay"; + clock-frequency =3D <150000000>; +}; + +&uart1 { + status =3D "disabled"; +}; --=20 2.27.0