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* [PATCH 0/3] MIPS: ath79: skip pbl lowlevel init if running from RAM
@ 2015-11-11  1:09 Antony Pavlov
  2015-11-11  1:09 ` [PATCH 1/3] MIPS: pbl: add pbl_blt macro Antony Pavlov
                   ` (3 more replies)
  0 siblings, 4 replies; 7+ messages in thread
From: Antony Pavlov @ 2015-11-11  1:09 UTC (permalink / raw)
  To: barebox

Antony Pavlov (2):
  MIPS: black-swift: skip pbl lowlevel init if running from RAM
  MIPS: tplink-mr3020: skip pbl lowlevel init if running from RAM

Oleksij Rempel (1):
  MIPS: pbl: add pbl_blt macro

 arch/mips/boards/black-swift/include/board/board_pbl_start.h |  3 +++
 .../boards/tplink-mr3020/include/board/board_pbl_start.h     |  3 +++
 arch/mips/include/asm/pbl_macros.h                           | 12 ++++++++++++
 3 files changed, 18 insertions(+)

-- 
2.6.2


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^ permalink raw reply	[flat|nested] 7+ messages in thread

* [PATCH 1/3] MIPS: pbl: add pbl_blt macro
  2015-11-11  1:09 [PATCH 0/3] MIPS: ath79: skip pbl lowlevel init if running from RAM Antony Pavlov
@ 2015-11-11  1:09 ` Antony Pavlov
  2015-11-11  7:41   ` Yegor Yefremov
  2015-11-11  1:09 ` [PATCH 2/3] MIPS: black-swift: skip pbl lowlevel init if running from RAM Antony Pavlov
                   ` (2 subsequent siblings)
  3 siblings, 1 reply; 7+ messages in thread
From: Antony Pavlov @ 2015-11-11  1:09 UTC (permalink / raw)
  To: barebox; +Cc: Oleksij Rempel

From: Oleksij Rempel <linux@rempel-privat.de>

Barebox' PBL can initialize memory controller of the board.
But we can use memory controller initialization routine
only if PBL runs from ROM or on-chip SRAM.
MIPS architecture standard boot vector is 0xbfc00000
so on most MIPS SoCs all addresses higher than 0xbfc00000
belong to boot ROM or on-chip SRAM. Well then we have
simple criterion to check if PBL run from ROM: just
check if current PC is higher than 0xbfc00000.
Some MIPS boards have ROM start address lower than 0xbfc00000
so it's reasonable we have to make ROM start address
board dependend.

The pbl_blt macro checks if current pc is lower than
the first argument (ROM start address). If so then
next instruction executed is defined by the second argument
of the macro.

Signed-off-by: Oleksij Rempel <linux@rempel-privat.de>
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
---
 arch/mips/include/asm/pbl_macros.h | 12 ++++++++++++
 1 file changed, 12 insertions(+)

diff --git a/arch/mips/include/asm/pbl_macros.h b/arch/mips/include/asm/pbl_macros.h
index c4ae6a2..dbe3410 100644
--- a/arch/mips/include/asm/pbl_macros.h
+++ b/arch/mips/include/asm/pbl_macros.h
@@ -60,6 +60,18 @@
 	.set	pop
 	.endm
 
+	.macro	pbl_blt addr label tmp
+	.set	push
+	.set	noreorder
+	move	\tmp, ra			# preserve ra beforehand
+	bal	253f
+	 nop
+253:
+	bltu	ra, \addr, \label
+	 move	ra, \tmp			# restore ra
+	.set	pop
+	.endm
+
 	.macro	pbl_sleep reg count
 	.set push
 	.set noreorder
-- 
2.6.2


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^ permalink raw reply	[flat|nested] 7+ messages in thread

* [PATCH 2/3] MIPS: black-swift: skip pbl lowlevel init if running from RAM
  2015-11-11  1:09 [PATCH 0/3] MIPS: ath79: skip pbl lowlevel init if running from RAM Antony Pavlov
  2015-11-11  1:09 ` [PATCH 1/3] MIPS: pbl: add pbl_blt macro Antony Pavlov
@ 2015-11-11  1:09 ` Antony Pavlov
  2015-11-11  7:42   ` Yegor Yefremov
  2015-11-11  1:09 ` [PATCH 3/3] MIPS: tplink-mr3020: " Antony Pavlov
  2015-11-11  8:45 ` [PATCH 0/3] MIPS: ath79: " Antony Pavlov
  3 siblings, 1 reply; 7+ messages in thread
From: Antony Pavlov @ 2015-11-11  1:09 UTC (permalink / raw)
  To: barebox

Black Swift has 16 MiB flash boot ROM that can be remapped to 0xbf000000.

Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
---
 arch/mips/boards/black-swift/include/board/board_pbl_start.h | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/arch/mips/boards/black-swift/include/board/board_pbl_start.h b/arch/mips/boards/black-swift/include/board/board_pbl_start.h
index f78e0d9..7394092 100644
--- a/arch/mips/boards/black-swift/include/board/board_pbl_start.h
+++ b/arch/mips/boards/black-swift/include/board/board_pbl_start.h
@@ -28,9 +28,12 @@
 
 	mips_disable_interrupts
 
+	pbl_blt 0xbf000000 skip_pll_ram_config t8
+
 	pbl_ar9331_pll
 	pbl_ar9331_ddr2_config
 
+skip_pll_ram_config:
 	pbl_ar9331_uart_enable
 	debug_ll_ar9331_init
 	mips_nmon
-- 
2.6.2


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^ permalink raw reply	[flat|nested] 7+ messages in thread

* [PATCH 3/3] MIPS: tplink-mr3020: skip pbl lowlevel init if running from RAM
  2015-11-11  1:09 [PATCH 0/3] MIPS: ath79: skip pbl lowlevel init if running from RAM Antony Pavlov
  2015-11-11  1:09 ` [PATCH 1/3] MIPS: pbl: add pbl_blt macro Antony Pavlov
  2015-11-11  1:09 ` [PATCH 2/3] MIPS: black-swift: skip pbl lowlevel init if running from RAM Antony Pavlov
@ 2015-11-11  1:09 ` Antony Pavlov
  2015-11-11  8:45 ` [PATCH 0/3] MIPS: ath79: " Antony Pavlov
  3 siblings, 0 replies; 7+ messages in thread
From: Antony Pavlov @ 2015-11-11  1:09 UTC (permalink / raw)
  To: barebox

TP-Link MR3020 has 4 MiB flash boot ROM that is mapped to 0xbfc00000.

Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
---
 arch/mips/boards/tplink-mr3020/include/board/board_pbl_start.h | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/arch/mips/boards/tplink-mr3020/include/board/board_pbl_start.h b/arch/mips/boards/tplink-mr3020/include/board/board_pbl_start.h
index 08204fe..328426e 100644
--- a/arch/mips/boards/tplink-mr3020/include/board/board_pbl_start.h
+++ b/arch/mips/boards/tplink-mr3020/include/board/board_pbl_start.h
@@ -28,9 +28,12 @@
 
 	mips_disable_interrupts
 
+	pbl_blt 0xbfc00000 skip_pll_ram_config t8
+
 	pbl_ar9331_pll
 	pbl_ar9331_ddr1_config
 
+skip_pll_ram_config:
 	pbl_ar9331_uart_enable
 	debug_ll_ar9331_init
 	mips_nmon
-- 
2.6.2


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^ permalink raw reply	[flat|nested] 7+ messages in thread

* Re: [PATCH 1/3] MIPS: pbl: add pbl_blt macro
  2015-11-11  1:09 ` [PATCH 1/3] MIPS: pbl: add pbl_blt macro Antony Pavlov
@ 2015-11-11  7:41   ` Yegor Yefremov
  0 siblings, 0 replies; 7+ messages in thread
From: Yegor Yefremov @ 2015-11-11  7:41 UTC (permalink / raw)
  To: Antony Pavlov; +Cc: barebox, Oleksij Rempel

On Wed, Nov 11, 2015 at 2:09 AM, Antony Pavlov <antonynpavlov@gmail.com> wrote:
> From: Oleksij Rempel <linux@rempel-privat.de>
>
> Barebox' PBL can initialize memory controller of the board.
> But we can use memory controller initialization routine
> only if PBL runs from ROM or on-chip SRAM.
> MIPS architecture standard boot vector is 0xbfc00000
> so on most MIPS SoCs all addresses higher than 0xbfc00000
> belong to boot ROM or on-chip SRAM. Well then we have
> simple criterion to check if PBL run from ROM: just
> check if current PC is higher than 0xbfc00000.
> Some MIPS boards have ROM start address lower than 0xbfc00000
> so it's reasonable we have to make ROM start address
> board dependend.
>
> The pbl_blt macro checks if current pc is lower than
> the first argument (ROM start address). If so then
> next instruction executed is defined by the second argument
> of the macro.
>
> Signed-off-by: Oleksij Rempel <linux@rempel-privat.de>
> Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
> ---
>  arch/mips/include/asm/pbl_macros.h | 12 ++++++++++++
>  1 file changed, 12 insertions(+)
>
> diff --git a/arch/mips/include/asm/pbl_macros.h b/arch/mips/include/asm/pbl_macros.h
> index c4ae6a2..dbe3410 100644
> --- a/arch/mips/include/asm/pbl_macros.h
> +++ b/arch/mips/include/asm/pbl_macros.h
> @@ -60,6 +60,18 @@
>         .set    pop
>         .endm
>
> +       .macro  pbl_blt addr label tmp
> +       .set    push
> +       .set    noreorder
> +       move    \tmp, ra                        # preserve ra beforehand
> +       bal     253f
> +        nop
> +253:
> +       bltu    ra, \addr, \label
> +        move   ra, \tmp                        # restore ra
> +       .set    pop
> +       .endm
> +
>         .macro  pbl_sleep reg count
>         .set push
>         .set noreorder
> --
> 2.6.2

Loaded barebox.bin via OpenOCD and successfully started

Tested-by: Yegor Yefremov <yegorslists@googlemail.com>

Yegor

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^ permalink raw reply	[flat|nested] 7+ messages in thread

* Re: [PATCH 2/3] MIPS: black-swift: skip pbl lowlevel init if running from RAM
  2015-11-11  1:09 ` [PATCH 2/3] MIPS: black-swift: skip pbl lowlevel init if running from RAM Antony Pavlov
@ 2015-11-11  7:42   ` Yegor Yefremov
  0 siblings, 0 replies; 7+ messages in thread
From: Yegor Yefremov @ 2015-11-11  7:42 UTC (permalink / raw)
  To: Antony Pavlov; +Cc: barebox

On Wed, Nov 11, 2015 at 2:09 AM, Antony Pavlov <antonynpavlov@gmail.com> wrote:
> Black Swift has 16 MiB flash boot ROM that can be remapped to 0xbf000000.
>
> Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
> ---
>  arch/mips/boards/black-swift/include/board/board_pbl_start.h | 3 +++
>  1 file changed, 3 insertions(+)
>
> diff --git a/arch/mips/boards/black-swift/include/board/board_pbl_start.h b/arch/mips/boards/black-swift/include/board/board_pbl_start.h
> index f78e0d9..7394092 100644
> --- a/arch/mips/boards/black-swift/include/board/board_pbl_start.h
> +++ b/arch/mips/boards/black-swift/include/board/board_pbl_start.h
> @@ -28,9 +28,12 @@
>
>         mips_disable_interrupts
>
> +       pbl_blt 0xbf000000 skip_pll_ram_config t8
> +
>         pbl_ar9331_pll
>         pbl_ar9331_ddr2_config
>
> +skip_pll_ram_config:
>         pbl_ar9331_uart_enable
>         debug_ll_ar9331_init
>         mips_nmon
> --
> 2.6.2

Tested-by: Yegor Yefremov <yegorslists@googlemail.com>

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^ permalink raw reply	[flat|nested] 7+ messages in thread

* Re: [PATCH 0/3] MIPS: ath79: skip pbl lowlevel init if running from RAM
  2015-11-11  1:09 [PATCH 0/3] MIPS: ath79: skip pbl lowlevel init if running from RAM Antony Pavlov
                   ` (2 preceding siblings ...)
  2015-11-11  1:09 ` [PATCH 3/3] MIPS: tplink-mr3020: " Antony Pavlov
@ 2015-11-11  8:45 ` Antony Pavlov
  3 siblings, 0 replies; 7+ messages in thread
From: Antony Pavlov @ 2015-11-11  8:45 UTC (permalink / raw)
  To: Sascha Hauer; +Cc: barebox

On Wed, 11 Nov 2015 04:09:12 +0300
Antony Pavlov <antonynpavlov@gmail.com> wrote:

Hi Sascha!

Please don't apply this patchseries.

I'm working on cosmetic fixes.
I'll send the v2 in a few hours.


> Antony Pavlov (2):
>   MIPS: black-swift: skip pbl lowlevel init if running from RAM
>   MIPS: tplink-mr3020: skip pbl lowlevel init if running from RAM
> 
> Oleksij Rempel (1):
>   MIPS: pbl: add pbl_blt macro
> 
>  arch/mips/boards/black-swift/include/board/board_pbl_start.h |  3 +++
>  .../boards/tplink-mr3020/include/board/board_pbl_start.h     |  3 +++
>  arch/mips/include/asm/pbl_macros.h                           | 12 ++++++++++++
>  3 files changed, 18 insertions(+)
> 
> -- 
> 2.6.2
> 


-- 
-- 
Best regards,
  Antony Pavlov

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^ permalink raw reply	[flat|nested] 7+ messages in thread

end of thread, other threads:[~2015-11-11  8:22 UTC | newest]

Thread overview: 7+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2015-11-11  1:09 [PATCH 0/3] MIPS: ath79: skip pbl lowlevel init if running from RAM Antony Pavlov
2015-11-11  1:09 ` [PATCH 1/3] MIPS: pbl: add pbl_blt macro Antony Pavlov
2015-11-11  7:41   ` Yegor Yefremov
2015-11-11  1:09 ` [PATCH 2/3] MIPS: black-swift: skip pbl lowlevel init if running from RAM Antony Pavlov
2015-11-11  7:42   ` Yegor Yefremov
2015-11-11  1:09 ` [PATCH 3/3] MIPS: tplink-mr3020: " Antony Pavlov
2015-11-11  8:45 ` [PATCH 0/3] MIPS: ath79: " Antony Pavlov

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