From: "menon.nishanth@gmail.com" <menon.nishanth@gmail.com>
To: Jan Weitzel <j.weitzel@phytec.de>
Cc: "U-Boot Version 2 (barebox)" <barebox@lists.infradead.org>
Subject: Re: [PATCH v2] omap4: set voltage according to mpu freq
Date: Thu, 6 Jun 2013 08:40:46 -0500 [thread overview]
Message-ID: <CAGo_u6rixBCzggcuLAfOLuxgTrzyDhY7ipf2garfTiDb_Ce0WA@mail.gmail.com> (raw)
In-Reply-To: <1370522836-11258-1-git-send-email-j.weitzel@phytec.de>
On Thu, Jun 6, 2013 at 7:47 AM, Jan Weitzel <j.weitzel@phytec.de> wrote:
> +noinline int omap4460_scale_vcores(unsigned vsel0_pin, unsigned volt_mv)
> +{
> + void __iomem *base;
> + u32 val = 0;
> +
> + /* For VC bypass only VCOREx_CGF_FORCE is necessary and
> + * VCOREx_CFG_VOLTAGE changes can be discarded
> + */
> + writel(0, OMAP44XX_PRM_VC_CFG_I2C_MODE);
> + writel(0x6026, OMAP44XX_PRM_VC_CFG_I2C_CLK);
> +
> + /* TPS - supplies vdd_mpu on 4460
> + * Setup SET1 and SET0 with right values so that kernel
> + * can use either of them based on its needs.
> + */
> +
> + omap4_do_scale_tps62361(TPS62361_REG_ADDR_SET0, volt_mv);
Just a nitpick - the general rule of TPS+OMAP4460 integration is *NOT*
to program SET0 register. this is intended to be at boot voltage
required to be used when reboot due to s/w controlled or h/w watchdog.
> + omap4_do_scale_tps62361(TPS62361_REG_ADDR_SET1, volt_mv);
> +
Regards,
Nishanth Menon
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next prev parent reply other threads:[~2013-06-06 13:41 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-05-28 11:51 [PATCH] " Jan Weitzel
2013-05-30 9:39 ` Sascha Hauer
2013-06-05 9:52 ` Jan Weitzel
2013-06-06 12:47 ` [PATCH v2] " Jan Weitzel
2013-06-06 13:40 ` menon.nishanth [this message]
2013-06-08 13:21 ` Sascha Hauer
2013-06-12 7:16 ` Jan Weitzel
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