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From: Andrey Smirnov <andrew.smirnov@gmail.com>
To: Sascha Hauer <s.hauer@pengutronix.de>
Cc: Barebox List <barebox@lists.infradead.org>
Subject: Re: [PATCH 3/6] i.MX7D: DCD: Create shared DDR configuration header
Date: Thu, 4 Oct 2018 13:37:14 -0700	[thread overview]
Message-ID: <CAHQ1cqEEVfM_A=w8XebXPkaV+Z9AoLGymfCfBV8bXE4dPg1F-w@mail.gmail.com> (raw)
In-Reply-To: <20180927070551.GV4097@pengutronix.de>

On Thu, Sep 27, 2018 at 12:05 AM Sascha Hauer <s.hauer@pengutronix.de> wrote:
>
> On Tue, Sep 25, 2018 at 06:34:15PM -0700, Andrey Smirnov wrote:
> > Create a shared DDR configuration header based on configuration used
> > by i.MX7D SabreSD board.
> >
> > Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
> > ---
> >  .../flash-header-mx7-sabresd.imxcfg           | 79 +------------------
> >  .../flash-header/imx7d-ddr-default.imxcfg     | 78 ++++++++++++++++++
> >  2 files changed, 79 insertions(+), 78 deletions(-)
> >  create mode 100644 arch/arm/mach-imx/include/mach/flash-header/imx7d-ddr-default.imxcfg
> >
> > diff --git a/arch/arm/mach-imx/include/mach/flash-header/imx7d-ddr-default.imxcfg b/arch/arm/mach-imx/include/mach/flash-header/imx7d-ddr-default.imxcfg
> > new file mode 100644
> > index 000000000..e98f055ee
> > --- /dev/null
> > +++ b/arch/arm/mach-imx/include/mach/flash-header/imx7d-ddr-default.imxcfg
> > @@ -0,0 +1,78 @@
> > +/*
> > + * Copyright (C) 2016 NXP Semiconductors
> > + *
> > + * SPDX-License-Identifier:  GPL-2.0
> > + *
> > + * Refer docs/README.imxmage for more details about how-to configure
> > + * and create imximage boot image
> > + *
> > + * The syntax is taken as close as possible with the kwbimage
> > + *
> > + * Taken from upstream U-Boot git://git.denx.de/u-boot.git, commit
> > + * 1a8150d4b16fbafa6f1d207ddb85eda7dc399e2d
> > + */
> > +
> > +#include <mach/imx7-ddr-regs.h>
> > +
> > +wm 32 0x30340004 0x4F400005
> > +
> > +wm 32 0x30391000 0x00000002
> > +
> > +wm 32 MX7_DDRC_MSTR 0x01040001
>
> How default is this default header? It looks like it only works for the
> exact DDR type and size like used on the i.MX7D SabreSD board. Many boards
> are more or less copied from the eval boards, so having a common DDR
> setup header is a good thing, but calling this "default" sounds a bit
> strong. How about replacing "default" with "sabresd"?

Sounds good. Will do in v2.

Thanks,
Andrey Smirnov

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  reply	other threads:[~2018-10-04 20:37 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-09-26  1:34 [PATCH 0/6] ZII RPU2 i.MX7D board support Andrey Smirnov
2018-09-26  1:34 ` [PATCH 1/6] ARM: i.MX: esdctl: Add memory size detection for i.MX7D Andrey Smirnov
2018-09-26  1:34 ` [PATCH 2/6] ARM: freescale-mx7-sabresd: Make used of imx7d_barebox_entry() Andrey Smirnov
2018-09-26  1:34 ` [PATCH 3/6] i.MX7D: DCD: Create shared DDR configuration header Andrey Smirnov
2018-09-27  7:05   ` Sascha Hauer
2018-10-04 20:37     ` Andrey Smirnov [this message]
2018-09-26  1:34 ` [PATCH 4/6] ARM: i.MX7: bbu: Add MMC boot handler Andrey Smirnov
2018-09-26  1:34 ` [PATCH 5/6] ARM: i.MX7: bbu: Add I2C and SPI handler Andrey Smirnov
2018-09-26  1:34 ` [PATCH 6/6] i.MX: Add support for ZII's i.MX7D-based RPU2 board Andrey Smirnov

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