* [PATCH 1/4] ARM: i.MX6 Wandboard: dont do MMDC Write Leveling Calibration
@ 2017-06-08 18:41 Alexander Kurz
2017-06-08 18:41 ` [PATCH 2/4] ARM: i.MX6 Wandboard Quad: fix PBL UART MUX Alexander Kurz
` (3 more replies)
0 siblings, 4 replies; 6+ messages in thread
From: Alexander Kurz @ 2017-06-08 18:41 UTC (permalink / raw)
To: barebox; +Cc: Alexander Kurz
The hardware requirements to perform a write leveling calibration are
not fulfilled by the Wandboard modules.
IMX6DQRM §44.11.6 "Write leveling Calibration" Note2 states that the first
bit of each data byte group (D0, D8, ..., D56) from memory must be connected
to the same data bus bit on the controller, which is not given on the
Wandboard modules, resulting in unpredictable calib results and breaking the
WBQUAD 2GiB SDRAM setup. Similar restrictions exist for the i.MX6SD.
Remove this calibration and use the MPWLDECTRL defaults.
Signed-off-by: Alexander Kurz <akurz@blala.de>
---
arch/arm/boards/technexion-wandboard/lowlevel.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/arch/arm/boards/technexion-wandboard/lowlevel.c b/arch/arm/boards/technexion-wandboard/lowlevel.c
index d3eb9a0..ff5ae6d 100644
--- a/arch/arm/boards/technexion-wandboard/lowlevel.c
+++ b/arch/arm/boards/technexion-wandboard/lowlevel.c
@@ -276,7 +276,6 @@ static unsigned long wandboard_dram_init(void)
__udelay(100);
- mmdc_do_write_level_calibration();
mmdc_do_dqs_calibration();
#ifdef DEBUG
mmdc_print_calibration_results();
--
2.1.4
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^ permalink raw reply [flat|nested] 6+ messages in thread
* [PATCH 2/4] ARM: i.MX6 Wandboard Quad: fix PBL UART MUX
2017-06-08 18:41 [PATCH 1/4] ARM: i.MX6 Wandboard: dont do MMDC Write Leveling Calibration Alexander Kurz
@ 2017-06-08 18:41 ` Alexander Kurz
2017-06-08 18:55 ` Andrey Smirnov
2017-06-08 18:41 ` [PATCH 3/4] ARM: i.MX6 Wandboard: enable Wandboard Quad Alexander Kurz
` (2 subsequent siblings)
3 siblings, 1 reply; 6+ messages in thread
From: Alexander Kurz @ 2017-06-08 18:41 UTC (permalink / raw)
To: barebox; +Cc: Alexander Kurz
Three variants of the Wandboard exist: WBSOLO, WBDUAL and WBQUAD.
For all variants, the external serial port is connected to UART1 via
PAD_CSI0_DATA10 (TX) and PAD_CSI0_DATA11 (RX). Unfortunately, the IOMUX
register adresses for this mux differ between i.MX6Q (WBQUAD) and others.
Make the UART IOMUX for PBL compatible for WBQUAD.
Signed-off-by: Alexander Kurz <akurz@blala.de>
---
arch/arm/boards/technexion-wandboard/lowlevel.c | 20 +++++++++++++++++---
1 file changed, 17 insertions(+), 3 deletions(-)
diff --git a/arch/arm/boards/technexion-wandboard/lowlevel.c b/arch/arm/boards/technexion-wandboard/lowlevel.c
index ff5ae6d..9aae429 100644
--- a/arch/arm/boards/technexion-wandboard/lowlevel.c
+++ b/arch/arm/boards/technexion-wandboard/lowlevel.c
@@ -285,11 +285,25 @@ static unsigned long wandboard_dram_init(void)
static void setup_uart(void)
{
+ int cpu_type = __imx6_cpu_type();
void __iomem *iomuxbase = (void *)MX6_IOMUXC_BASE_ADDR;
- /* mux the uart */
- writel(0x00000003, iomuxbase + 0x4c);
- writel(0x00000000, iomuxbase + 0x8fc);
+ /* mux UART1 TX on PAD_CSI0_DATA10 */
+ switch (cpu_type) {
+ case IMX6_CPUTYPE_IMX6S:
+ case IMX6_CPUTYPE_IMX6DL:
+ writel(0x00000003, iomuxbase + 0x4c);
+ writel(0x0001b0b1, iomuxbase + 0x360);
+ writel(0x00000000, iomuxbase + 0x8fc);
+ break;
+ case IMX6_CPUTYPE_IMX6Q:
+ writel(0x00000003, iomuxbase + 0x280);
+ writel(0x0001b0b1, iomuxbase + 0x650);
+ writel(0x00000001, iomuxbase + 0x920);
+ break;
+ default:
+ return;
+ }
imx6_ungate_all_peripherals();
imx6_uart_setup((void *)MX6_UART1_BASE_ADDR);
--
2.1.4
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^ permalink raw reply [flat|nested] 6+ messages in thread
* [PATCH 3/4] ARM: i.MX6 Wandboard: enable Wandboard Quad
2017-06-08 18:41 [PATCH 1/4] ARM: i.MX6 Wandboard: dont do MMDC Write Leveling Calibration Alexander Kurz
2017-06-08 18:41 ` [PATCH 2/4] ARM: i.MX6 Wandboard Quad: fix PBL UART MUX Alexander Kurz
@ 2017-06-08 18:41 ` Alexander Kurz
2017-06-08 18:41 ` [PATCH 4/4] ARM: i.MX6 Wandboard: add Documentation Alexander Kurz
2017-06-13 7:27 ` [PATCH 1/4] ARM: i.MX6 Wandboard: dont do MMDC Write Leveling Calibration Sascha Hauer
3 siblings, 0 replies; 6+ messages in thread
From: Alexander Kurz @ 2017-06-08 18:41 UTC (permalink / raw)
To: barebox; +Cc: Alexander Kurz
Extend the DT compatibility check to actually use the Wandboard Quad.
Signed-off-by: Alexander Kurz <akurz@blala.de>
---
arch/arm/boards/technexion-wandboard/board.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boards/technexion-wandboard/board.c b/arch/arm/boards/technexion-wandboard/board.c
index e7b51cc..2e1f625 100644
--- a/arch/arm/boards/technexion-wandboard/board.c
+++ b/arch/arm/boards/technexion-wandboard/board.c
@@ -63,7 +63,8 @@ static int ar8031_phy_fixup(struct phy_device *dev)
static int wandboard_device_init(void)
{
- if (!of_machine_is_compatible("wand,imx6dl-wandboard"))
+ if (!of_machine_is_compatible("wand,imx6dl-wandboard") &&
+ !of_machine_is_compatible("wand,imx6q-wandboard"))
return 0;
phy_register_fixup_for_uid(PHY_ID_AR8031, AR_PHY_ID_MASK, ar8031_phy_fixup);
--
2.1.4
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^ permalink raw reply [flat|nested] 6+ messages in thread
* [PATCH 4/4] ARM: i.MX6 Wandboard: add Documentation
2017-06-08 18:41 [PATCH 1/4] ARM: i.MX6 Wandboard: dont do MMDC Write Leveling Calibration Alexander Kurz
2017-06-08 18:41 ` [PATCH 2/4] ARM: i.MX6 Wandboard Quad: fix PBL UART MUX Alexander Kurz
2017-06-08 18:41 ` [PATCH 3/4] ARM: i.MX6 Wandboard: enable Wandboard Quad Alexander Kurz
@ 2017-06-08 18:41 ` Alexander Kurz
2017-06-13 7:27 ` [PATCH 1/4] ARM: i.MX6 Wandboard: dont do MMDC Write Leveling Calibration Sascha Hauer
3 siblings, 0 replies; 6+ messages in thread
From: Alexander Kurz @ 2017-06-08 18:41 UTC (permalink / raw)
To: barebox; +Cc: Alexander Kurz
Signed-off-by: Alexander Kurz <akurz@blala.de>
---
Documentation/boards/imx/Wandboard.rst | 21 +++++++++++++++++++++
1 file changed, 21 insertions(+)
create mode 100644 Documentation/boards/imx/Wandboard.rst
diff --git a/Documentation/boards/imx/Wandboard.rst b/Documentation/boards/imx/Wandboard.rst
new file mode 100644
index 0000000..574318a
--- /dev/null
+++ b/Documentation/boards/imx/Wandboard.rst
@@ -0,0 +1,21 @@
+Wandboard
+=========
+
+The Wandboard is a carrier board available with three different
+System-on-Module options, the Wandboard Solo (i.MX6S, 512MiB DDR3),
+the Wandboard Dual (i.MX6DL, 1GiB DDR3) and Wandboard Quad (i.MX6Q, 2GiB DDR3).
+
+The device boots from the SD card slot on the System-on-Module board, it
+will not boot from the slot on the carrier board.
+
+To boot barebox on any wandboard, build imx_v7_defconfig
+and copy the barebox imx-image to the i.MX boot location of a SD card, e.g.
+dd bs=1024 skip=1 seek=1 if=images/barebox-imx6-wandboard.img of=/dev/mmcblk0
+
+Only one image exists, supporting all three Wandboard variants, barebox will
+detect the Wandboard variant depending on the SoC variant.
+This image is only usable for SD-boot. It will not boot via imx-usb-loader.
+
+Connect to the serial port using a null-modem cable to get console access.
+
+For further documentation, including board schematics see http://wandboard.org/
--
2.1.4
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^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH 2/4] ARM: i.MX6 Wandboard Quad: fix PBL UART MUX
2017-06-08 18:41 ` [PATCH 2/4] ARM: i.MX6 Wandboard Quad: fix PBL UART MUX Alexander Kurz
@ 2017-06-08 18:55 ` Andrey Smirnov
0 siblings, 0 replies; 6+ messages in thread
From: Andrey Smirnov @ 2017-06-08 18:55 UTC (permalink / raw)
To: Alexander Kurz; +Cc: barebox
On Thu, Jun 8, 2017 at 11:41 AM, Alexander Kurz <akurz@blala.de> wrote:
> Three variants of the Wandboard exist: WBSOLO, WBDUAL and WBQUAD.
> For all variants, the external serial port is connected to UART1 via
> PAD_CSI0_DATA10 (TX) and PAD_CSI0_DATA11 (RX). Unfortunately, the IOMUX
> register adresses for this mux differ between i.MX6Q (WBQUAD) and others.
> Make the UART IOMUX for PBL compatible for WBQUAD.
>
> Signed-off-by: Alexander Kurz <akurz@blala.de>
> ---
> arch/arm/boards/technexion-wandboard/lowlevel.c | 20 +++++++++++++++++---
> 1 file changed, 17 insertions(+), 3 deletions(-)
>
> diff --git a/arch/arm/boards/technexion-wandboard/lowlevel.c b/arch/arm/boards/technexion-wandboard/lowlevel.c
> index ff5ae6d..9aae429 100644
> --- a/arch/arm/boards/technexion-wandboard/lowlevel.c
> +++ b/arch/arm/boards/technexion-wandboard/lowlevel.c
> @@ -285,11 +285,25 @@ static unsigned long wandboard_dram_init(void)
>
> static void setup_uart(void)
> {
> + int cpu_type = __imx6_cpu_type();
> void __iomem *iomuxbase = (void *)MX6_IOMUXC_BASE_ADDR;
>
> - /* mux the uart */
> - writel(0x00000003, iomuxbase + 0x4c);
> - writel(0x00000000, iomuxbase + 0x8fc);
> + /* mux UART1 TX on PAD_CSI0_DATA10 */
> + switch (cpu_type) {
> + case IMX6_CPUTYPE_IMX6S:
> + case IMX6_CPUTYPE_IMX6DL:
> + writel(0x00000003, iomuxbase + 0x4c);
> + writel(0x0001b0b1, iomuxbase + 0x360);
> + writel(0x00000000, iomuxbase + 0x8fc);
> + break;
> + case IMX6_CPUTYPE_IMX6Q:
> + writel(0x00000003, iomuxbase + 0x280);
> + writel(0x0001b0b1, iomuxbase + 0x650);
> + writel(0x00000001, iomuxbase + 0x920);
Just as a suggestion, you can use imx_setup_pad from
arch/arm/mach-imx/include/mach/iomux-v3.h
which would allow you to use pre-defined "pad" constants as opposed to
the magic numbers.
See arch/arm/boards/freescale-mx6-sabresd/lowlevel.c for example.
Thanks,
Andrey Smirnov
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^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH 1/4] ARM: i.MX6 Wandboard: dont do MMDC Write Leveling Calibration
2017-06-08 18:41 [PATCH 1/4] ARM: i.MX6 Wandboard: dont do MMDC Write Leveling Calibration Alexander Kurz
` (2 preceding siblings ...)
2017-06-08 18:41 ` [PATCH 4/4] ARM: i.MX6 Wandboard: add Documentation Alexander Kurz
@ 2017-06-13 7:27 ` Sascha Hauer
3 siblings, 0 replies; 6+ messages in thread
From: Sascha Hauer @ 2017-06-13 7:27 UTC (permalink / raw)
To: Alexander Kurz; +Cc: barebox
On Thu, Jun 08, 2017 at 08:41:34PM +0200, Alexander Kurz wrote:
> The hardware requirements to perform a write leveling calibration are
> not fulfilled by the Wandboard modules.
> IMX6DQRM §44.11.6 "Write leveling Calibration" Note2 states that the first
> bit of each data byte group (D0, D8, ..., D56) from memory must be connected
> to the same data bus bit on the controller, which is not given on the
> Wandboard modules, resulting in unpredictable calib results and breaking the
> WBQUAD 2GiB SDRAM setup. Similar restrictions exist for the i.MX6SD.
>
> Remove this calibration and use the MPWLDECTRL defaults.
>
> Signed-off-by: Alexander Kurz <akurz@blala.de>
Applied, thanks
Sascha
> ---
> arch/arm/boards/technexion-wandboard/lowlevel.c | 1 -
> 1 file changed, 1 deletion(-)
>
> diff --git a/arch/arm/boards/technexion-wandboard/lowlevel.c b/arch/arm/boards/technexion-wandboard/lowlevel.c
> index d3eb9a0..ff5ae6d 100644
> --- a/arch/arm/boards/technexion-wandboard/lowlevel.c
> +++ b/arch/arm/boards/technexion-wandboard/lowlevel.c
> @@ -276,7 +276,6 @@ static unsigned long wandboard_dram_init(void)
>
> __udelay(100);
>
> - mmdc_do_write_level_calibration();
> mmdc_do_dqs_calibration();
> #ifdef DEBUG
> mmdc_print_calibration_results();
> --
> 2.1.4
>
>
> _______________________________________________
> barebox mailing list
> barebox@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/barebox
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2017-06-08 18:41 [PATCH 1/4] ARM: i.MX6 Wandboard: dont do MMDC Write Leveling Calibration Alexander Kurz
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2017-06-08 18:55 ` Andrey Smirnov
2017-06-08 18:41 ` [PATCH 3/4] ARM: i.MX6 Wandboard: enable Wandboard Quad Alexander Kurz
2017-06-08 18:41 ` [PATCH 4/4] ARM: i.MX6 Wandboard: add Documentation Alexander Kurz
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