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From: Andrey Smirnov <andrew.smirnov@gmail.com>
To: barebox@lists.infradead.org
Subject: i.MX6Q SABRESD board and barebox
Date: Wed, 11 Jun 2014 14:59:53 -0700	[thread overview]
Message-ID: <CAHQ1cqH8GnCCf_Y90cgQzy=s0YFy4hD65ni1tgQDQRz7dbxksQ@mail.gmail.com> (raw)

Hello everyone,

I am trying to use barebox on a SabreSD board with i.MX6Q processor
and seem to be running into problems. One odd thing that I noticed was
that default configuration, freescale-mx6-sabresd_defconfig, specifies
TEXT_BASE as 0x08f80000, which is the address mapped to external
interface module(EIM). At the same time load address specified in
arch/arm/boards/freescale-mx6-sabresd/lash-header-mx6-sabresd.imxcfg
is 0x10000000, which is the start of DRAM. Is there some MMU setup
that accounts for that, that I am missing?

Thank you,
Andrey Smirnov

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             reply	other threads:[~2014-06-11 22:00 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-06-11 21:59 Andrey Smirnov [this message]
2014-06-12  5:42 ` Sascha Hauer
2014-06-13 18:43   ` Andrey Smirnov
2014-06-13 19:36     ` Holger Schurig
2014-06-13 19:42       ` Andrey Smirnov

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