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From: Michael Burkey <mdburkey@gmail.com>
To: Sascha Hauer <s.hauer@pengutronix.de>
Cc: barebox@lists.infradead.org
Subject: Re: Porting barebox (devicetree) to Variscite iMX6 SOM
Date: Thu, 9 Jan 2014 02:20:33 -0500	[thread overview]
Message-ID: <CAJyuEedJxNN9mPJzAvE6d6kNHCaEqcF-BED0L+r2VCv7e6=T6A@mail.gmail.com> (raw)
In-Reply-To: <20131219080917.GW24559@pengutronix.de>

A few more comments & questions regarding getting the Variscite SOM up
and working (and it's pretty close to fully working at this point):

First off, what works:

1) Booting from NAND, SD, etc to barebox
2) Nand programming under barebox
3) GPIO
4) I2C
5) USB
6) RS232
etc.

Basically, things are working pretty well....up to the point of
starting the Linux Kernel.

Whenever I try to do a "bootm" of pretty much any image type, I run
into issues. I *think* I have everything setup properly on the Linux
command line in the way of bootargs (but I'm still checking a couple
of things). It doesn't matter whether I am launching the kernel from a
partition (NAND), USB, memory, etc. The result is the same regardless.
It *does* decode the kernel header properly, display the version, the
correct load address, etc -- so that's not the issue.

One thing is that I am using an older kernel that is not setup for
devicetree -- which is hopefully not a major problem. Basically,
everything is specified "the old way" in the kernel platform/board
files (and it works fine from u-boot). And, at least for now, moving
to a newer kernel isn't an option.

Under barebox, I either get a "launching kernel with devicetree" and
then it hangs, or, if I do an "oftree -f" and then do a bootm, I get
an "unable to dereference NULL pointer" and a restart.

Any quick guesses, suggestions as to what I may be doing wrong?
Is there a proper way to tell barebox (when started with devicetree)
to NOT try to send the devicetree on to the kernel?

Also, for the moment, I am using Kobs-NG under Linux to actually
program barebox itself into NAND. Once there, it works fine and I can
use barebox itself to program the other NAND partitions. Is adding
support for writing out the FCB/DBBT to the first NAND blocks anywhere
in the current (near-term) to do list for barebox? I noticed that it
looked like you had something similar to this already in barebox for a
couple of the other, earlier iMX cores.


Lastly, once I do get this semi-final issue fixed, what is the best
way to submit the code for the Variscite SOM to the main barebox tree
for everyone else to have access to?

Thanks again!
Michael Burkey

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  reply	other threads:[~2014-01-09  7:20 UTC|newest]

Thread overview: 24+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2013-12-11 17:07 Michael Burkey
2013-12-11 23:17 ` Alexander Aring
2013-12-12  8:04 ` Sascha Hauer
2013-12-12 18:49   ` Michael Burkey
2013-12-12 18:56     ` Michael Burkey
2013-12-12 19:12       ` Alexander Aring
2013-12-12 19:24         ` Michael Burkey
2013-12-12 19:58     ` Sascha Hauer
2013-12-12 22:44       ` Michael Burkey
2013-12-18 16:39         ` Michael Burkey
2013-12-18 21:34           ` Michael Burkey
2013-12-19  8:09             ` Sascha Hauer
2014-01-09  7:20               ` Michael Burkey [this message]
2014-01-09 19:59                 ` Michael Burkey
2014-01-10  8:00                   ` Sascha Hauer
2014-01-10  8:13                 ` Sascha Hauer
2014-01-15 18:35                   ` Michael Burkey
2014-01-16 14:13                     ` Sascha Hauer
2014-01-16 21:18                       ` Michael Burkey
2014-01-20  8:00                         ` Sascha Hauer
2014-01-29 21:10                           ` Michael Burkey
2014-01-29 21:53                             ` Michael Burkey
2014-02-01 18:35                             ` Sascha Hauer
2014-02-04 21:44                               ` Michael D. Burkey

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