iMX27 clock settings

iMX27 clock settings

[Igor Trevisan]

Hi,

I'm working on a custom board based on iMX27L. Initially I worked with Redboot
as Linux bootloader but now, I'm happily working with Barebox (2012.01.0)
having replaced Redboot with it.

Everithing is fine (thanks to the guys in the list for helping me!) but...
I noticed that my Linux apps run more slowly within my system if it's
started by Barebox
then if it's started by Redbbot.
I think it's a matter of internal clocks settings.

I see that Redboot, for example, set:
        CSR=0x33F38107
while Barebox does:
	writel(0x33F30307 | CSCR_MPLL_RESTART | CSCR_SPLL_RESTART, CSCR)
That brings to CSR=0x33F30307 at the end of the PLLs restart procedure.

Reading the Manual I can see that the differences between the two settings
mean having an arm_clk that is 2/3 and an AHB_clk that's the half.

Is there a particular reason for having these "slower configuration"?

I tried to change the lowlevel_init.S to force 0x33F38107 into CSCR
at startup but, after that change, my board starts, has time to write
somenthing on the
serial console:

"barebox 2012.01.0-svn11070-dirty1 (Feb 14 2012 - 11:10:39)

Board: Freescale iÿ"

and then restarts... continuously.

Can anybody help me to understand this and to make (if possible) my
system faster?
Thanks in advance,
Igor


-- 
"Don't find fault, find a remedy."
(Henry Ford)

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Re: iMX27 clock settings

[Kamel BOUHARA]

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Hi Igor,

What revision of imx27 silicon do you have?
If it's a rev2.0 or 2.1, you shoult take a look a the freescale errata in
order to set your PLL properly.

Regards.

2012/2/14 Igor Trevisan <igt1972@gmail.com>

> Hi,
>
> I'm working on a custom board based on iMX27L. Initially I worked with
> Redboot
> as Linux bootloader but now, I'm happily working with Barebox (2012.01.0)
> having replaced Redboot with it.
>
> Everithing is fine (thanks to the guys in the list for helping me!) but...
> I noticed that my Linux apps run more slowly within my system if it's
> started by Barebox
> then if it's started by Redbbot.
> I think it's a matter of internal clocks settings.
>
> I see that Redboot, for example, set:
>        CSR=0x33F38107
> while Barebox does:
>        writel(0x33F30307 | CSCR_MPLL_RESTART | CSCR_SPLL_RESTART, CSCR)
> That brings to CSR=0x33F30307 at the end of the PLLs restart procedure.
>
> Reading the Manual I can see that the differences between the two settings
> mean having an arm_clk that is 2/3 and an AHB_clk that's the half.
>
> Is there a particular reason for having these "slower configuration"?
>
> I tried to change the lowlevel_init.S to force 0x33F38107 into CSCR
> at startup but, after that change, my board starts, has time to write
> somenthing on the
> serial console:
>
> "barebox 2012.01.0-svn11070-dirty1 (Feb 14 2012 - 11:10:39)
>
> Board: Freescale iÿ"
>
> and then restarts... continuously.
>
> Can anybody help me to understand this and to make (if possible) my
> system faster?
> Thanks in advance,
> Igor
>
>
> --
> "Don't find fault, find a remedy."
> (Henry Ford)
>
> _______________________________________________
> barebox mailing list
> barebox@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/barebox
>



-- 

_______________________________
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60610 Lacroix Saint-Ouen

Tel n°1:  +33634677323
     n°2:  +33617832904

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Re: iMX27 clock settings

[Juergen Beisert]

Igor Trevisan wrote:
> Hi,
>
> I'm working on a custom board based on iMX27L. Initially I worked with
> Redboot as Linux bootloader but now, I'm happily working with Barebox
> (2012.01.0) having replaced Redboot with it.
>
> Everithing is fine (thanks to the guys in the list for helping me!) but...
> I noticed that my Linux apps run more slowly within my system if it's
> started by Barebox
> then if it's started by Redbbot.
> I think it's a matter of internal clocks settings.
>
> I see that Redboot, for example, set:
>         CSR=0x33F38107
> while Barebox does:
> 	writel(0x33F30307 | CSCR_MPLL_RESTART | CSCR_SPLL_RESTART, CSCR)
> That brings to CSR=0x33F30307 at the end of the PLLs restart procedure.
>
> Reading the Manual I can see that the differences between the two settings
> mean having an arm_clk that is 2/3 and an AHB_clk that's the half.
>
> Is there a particular reason for having these "slower configuration"?
>
> I tried to change the lowlevel_init.S to force 0x33F38107 into CSCR
> at startup but, after that change, my board starts, has time to write
> somenthing on the
> serial console:
>
> "barebox 2012.01.0-svn11070-dirty1 (Feb 14 2012 - 11:10:39)
>
> Board: Freescale iÿ"
>
> and then restarts... continuously.
>
> Can anybody help me to understand this and to make (if possible) my
> system faster?

a) you cannot change the PLL settings, when the system is already up and
   running (which means the SDRAM controller is running)
   This is due to the fact, the clocks are stopping until the PLLs lock
   again to the new settings. While the clock is stopped the SDRAM may lose
   data (no refresh for about 100ms).
b) one way to solve it is to re-program the PLL very early prior the SDRAM
   controller gets configured.
c) solution b) does not work if the default core power supply is to low to run
   the core at the full speed.
d) solution here is to re-program the PLL to its final values, but with higher
   prescaler vale to keep the core clock at rates corresponding to the
   available core power supply value. Later on, when Barebox is up and running
   and can re-program the core power supply to higher values, it is possible
   the change only the prescalers to run the core at higher speed (without the
   need to reprogram the PLL).

Regards,
Juergen

-- 
Pengutronix e.K.                              | Juergen Beisert             |
Linux Solutions for Science and Industry      | http://www.pengutronix.de/  |

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Re: iMX27 clock settings

[Igor Trevisan]

Hi,

On Wed, Feb 15, 2012 at 10:15 AM, Kamel BOUHARA <k.bouhara@gmail.com> wrote:
> Hi Igor,
>
> What revision of imx27 silicon do you have?

Silicon Rev. of my iMX27L is V2.1 (code M72J).

> If it's a rev2.0 or 2.1, you shoult take a look a the freescale errata in
> order to set your PLL properly.

I had a look at the Chip Errata. I saw that there's a PLL problem and
for it Freescale suggest two possible workarounds, a Hardware and a
Software one.
On my board the Hardware workaround has been used.
By the way, I tried also to add the SW workaround configuring:
MPCTL0=0x00262C15 (I use the 26MHz oscillator as source)
and
CSCR=0x33F30307 (to use DIV3 as it is by default and AHBDIV=11)
or
CSCR=0x33F30207 (to use DIV3 as it is by default and AHBDIV=10 to slow down AHB)
and I discovered that this configuration (both of CSCR) works properly
on some boards, while on other boards (same uC-Memories core but different
peripherals and power supply) the system starts and hangs continuously
as I described in my first post.
So, at the end, I think that my settings to speed up the uC core @400MHz
are correct but probably I have a power supply problem on one of the
products I'm working on!
I'll investigate this and inform the list if it's not so...
Thanks for the support, also thanks to Juergen for his suggestions.
Ciao,
I.


-- 
"Don't find fault, find a remedy."
(Henry Ford)

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Re: iMX27 clock settings

[Sascha Hauer]

On Tue, Feb 14, 2012 at 04:10:08PM +0100, Igor Trevisan wrote:
> Hi,
> 
> I'm working on a custom board based on iMX27L. Initially I worked with Redboot
> as Linux bootloader but now, I'm happily working with Barebox (2012.01.0)
> having replaced Redboot with it.
> 
> Everithing is fine (thanks to the guys in the list for helping me!) but...
> I noticed that my Linux apps run more slowly within my system if it's
> started by Barebox
> then if it's started by Redbbot.
> I think it's a matter of internal clocks settings.
> 
> I see that Redboot, for example, set:
>         CSR=0x33F38107
> while Barebox does:
> 	writel(0x33F30307 | CSCR_MPLL_RESTART | CSCR_SPLL_RESTART, CSCR)
> That brings to CSR=0x33F30307 at the end of the PLLs restart procedure.
> 
> Reading the Manual I can see that the differences between the two settings
> mean having an arm_clk that is 2/3 and an AHB_clk that's the half.
> 
> Is there a particular reason for having these "slower configuration"?

One thing that might be interesting in such cases is the output of
the dump_clocks command.

Sascha


-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
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Re: iMX27 clock settings

[Igor Trevisan]

>
> One thing that might be interesting in such cases is the output of
> the dump_clocks command.

It's a useful debug command!
Here it is its output:

barebox:/ dump_clocks
chip id: [2,882,1,01d]
mpll:     600000000 Hz
spll:     240000000 Hz
arm:      400000000 Hz
perclk1:   20000000 Hz
perclk2:   40000000 Hz
perclk3:  100000000 Hz
perclk4:   40000000 Hz
clkin26:   26000000 Hz
ahb:      133333333 Hz
ipg:       66666666 Hz
barebox:/

This is what I get after the last configuration I tried:

writel(0x00262C15, MPCTL0)	
writel(0x040C2403, SPCTL0)	
writel(0x33F30207, CSCR)	/* Use DIV3 and AHBDIV=10 */

We have three different boards using iMX27L; on two of them
Barebox with this setting runs properly, on the third we frequently
see the system hanging (cyclic restarts).
Note: I have the same results with:
writel(0x33F30307, CSCR)	/* Use DIV3 and AHBDIV=11 */

Best regards,
I.

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Re: iMX27 clock settings

[Igor Trevisan]

Hi,

we found a problem in the pover supply chain.
We fixed this and now the board that was unstable seems to work properly.
Pushing on the frequency we probably made a hidden problem come to light.
So I think I can also confirm that the new settings to make the iMX27 working
@400MHz should be correct.
Thanks again to all the guys out there for their precious and kind
suggestions and support! :)
I.

-- 
"Don't find fault, find a remedy."
(Henry Ford)

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