From mboxrd@z Thu Jan 1 00:00:00 1970 Return-path: Received: from mail-pv0-f177.google.com ([74.125.83.177]) by canuck.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1QhfOy-0004of-9I for barebox@lists.infradead.org; Fri, 15 Jul 2011 10:13:49 +0000 Received: by pvg20 with SMTP id 20so1169102pvg.36 for ; Fri, 15 Jul 2011 03:13:36 -0700 (PDT) MIME-Version: 1.0 In-Reply-To: References: <20110712135443.GW6069@pengutronix.de> <20110712135816.GY6069@pengutronix.de> From: Kamel BOUHARA Date: Fri, 15 Jul 2011 12:13:16 +0200 Message-ID: List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: multipart/mixed; boundary="===============1107160917==" Sender: barebox-bounces@lists.infradead.org Errors-To: barebox-bounces+u.kleine-koenig=pengutronix.de@lists.infradead.org Subject: Fwd: FEC Not working with imx27 based board To: barebox@lists.infradead.org --===============1107160917== Content-Type: multipart/alternative; boundary=bcaec52162e50fb65604a818e71f --bcaec52162e50fb65604a818e71f Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: quoted-printable ---------- Forwarded message ---------- From: Kamel BOUHARA Date: 2011/7/12 Subject: Re: FEC Not working with imx27 based board To: Sascha Hauer Yes I've set the correct adress and it's why I don't have fffff like on the phytec. But in fact I had to change the fec_get_hwadrr() to make it work with my board : static int fec_get_hwaddr(struct eth_device *dev, unsigned char *mac) { int i; int uninitialized =3D 0; > for (i=3D0;i<6;i++) { mac[6-1-i] =3D readl(&IIM_BANK_REG(0,(IIM0_MAC+i))); } > /* uninitialized if all 00 */ if ((mac[0] =3D=3D 0) && (mac[1] =3D=3D 0) && (mac[2] =3D=3D 0) && (mac[3] =3D=3D 0) && (mac[4] =3D=3D 0) && (mac[5] =3D=3D 0)) uninitialized =3D 1; > /* uninitialized if all FF (could be safe) */ if ((mac[0] =3D=3D 0xff) && (mac[1] =3D=3D 0xff) && (mac[2] =3D=3D = 0xff) && (mac[3] =3D=3D 0xff) && (mac[4] =3D=3D 0xff) && (mac[5] =3D=3D 0xff)) uninitialized =3D 1; > return uninitialized; } Before this change it wasn't the case, I had no mac adress in barebox start... I also added a specific reset : void fec_reset() { int i=3D0; /* FEC RESET */ imx_gpio_mode(CFG_ETHPHY_RST | GPIO_OUT | GPIO_PUEN | GPIO_GPIO); printf("Before PHY reset\n"); GPIO_CLEAR(CFG_ETHPHY_RST); udelay(200); GPIO_SET(CFG_ETHPHY_RST); printf("After PHY reset\n"); } And then I call it in the fec_probe() to ensure the fec is reset properly before settings. I already tested the fec on u-boot and it works fine, so i tought it can help me with barebox but it seems there are some differences between codes. For now Im trying to see if it can be a cpu frequence problem because I hav= e an errata on the pll that shifts all my frequencies and so I have to adjust them in the lowlevelinit... So I would like to know if the clock initialization is taking effect if I boot from RAM ? Do I have t boot from flash ? Thanks again. Here is what 2011/7/12 Sascha Hauer > On Tue, Jul 12, 2011 at 03:54:43PM +0200, Sascha Hauer wrote: > > On Mon, Jul 11, 2011 at 05:14:54PM +0200, Kamel BOUHARA wrote: > > > Hi, > > > > > > Im trying to port barebox to my Armadeus apf27 board (based on the > Freescale > > > imx27 with a 512MiB NAND and 1GB of SDRAM). > > > I've first tried the phytec imx27 configuration and I got it worked > until > > > the Linux uncompressing task (the machine ID is bad so I didn't expec= t > it > > > will boot fine :)). > > > So I just copied the phycard-imx27 board directory and I followed the > > > boards.dox in order to add support for my board. > > > But when I've tried to boot again it was not working anymore ... > > > > > > There are somethings stranges with the FEC, here is the result of a > memory > > > display with both phytec and my own board : > > > > > > > barebox@Phytec phyCard-i.MX27:/ md -s /dev/phy0 > > > > > > > > 00000000: ffffffff ffffffff ffffffff ffffffff ................ > > > > > > > > 00000010: ffffffff ffffffff ffffffff ffffffff ................ > > > > > > > > 00000020: ffffffff ffffffff ffffffff ffffffff ................ > > > > > > > > 00000030: ffffffff ffffffff ffffffff ffffffff ................ > > > > This means your phy is not configured correctly. Do you usse the correc= t > > address (can be passed in platform_data). > > GPIO pins which hold the phy in reset are another thing which might go > wrong. > > Sascha > > -- > Pengutronix e.K. | = | > Industrial Linux Solutions | http://www.pengutronix.de/ = | > Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 = | > Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 = | > --=20 __________________________________ *Kamel BOUHARA* 7 rue Jules C=E9sar 02100 SAINT-QUENTIN 06.17.83.29.04 --=20 __________________________________ *Kamel BOUHARA* 7 rue Jules C=E9sar 02100 SAINT-QUENTIN 06.17.83.29.04 --bcaec52162e50fb65604a818e71f Content-Type: text/html; charset=ISO-8859-1 Content-Transfer-Encoding: quoted-printable

---------- Forwarded message ----------<= br>From: Kamel BOUHARA = <k.bouhara@gmail.com>
Date: 2011/7/12
Subject: Re: FEC Not working with imx27 based board
T= o: Sascha Hauer <s.hauer@pengu= tronix.de>


Yes I've set the correct adress and it'= ;s why I don't have fffff like on the phytec.
But in fact I had to change the fec_get_hwadrr() to make it work with my bo= ard :

static int fec_get_hwaddr(struct eth_device *dev, unsigned char *mac)
{
int i;
int uninitialized =3D 0;

for (i=3D0;i<6;i++) {
mac[6-1-i] =3D readl(&IIM= _BANK_REG(0,(IIM0_MAC+i)));
}

/* uninitialized if all 00 */<= /blockquote>
if ((mac[0] =3D=3D 0) &&am= p; (mac[1] =3D=3D 0) && (mac[2] =3D=3D 0) &&
=A0=A0 =A0 =A0 =A0 =A0 =A0(mac[3] =3D=3D 0) && (mac[4] =3D=3D 0) &a= mp;& (mac[5] =3D=3D 0))
=A0=A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0uninitialized =3D 1;

/* uninitialized if all FF (co= uld be safe) */
=A0=A0 =A0 =A0 =A0if ((mac[0] =3D=3D 0xff) && (mac[1] =3D=3D 0xff) = && (mac[2] =3D=3D 0xff) &&
=A0 =A0(mac[3] =3D=3D 0xff) &= amp;& (mac[4] =3D=3D 0xff) && (mac[5] =3D=3D 0xff))
=A0 =A0 =A0 =A0uninitialized = =3D 1;

return uninitialized;
}

Before this change it wasn't th= e case, I had no mac adress in barebox start...
I also added a sp= ecific reset :

void fec_reset()
{
=A0=A0 =A0 =A0 =A0int i=3D0;
=A0=A0 =A0/* =A0FEC RESE= T */
=A0=A0 =A0imx_gpio_mode(CFG_ETHPHY_RST | GPIO_OUT | GPIO_PUE= N | GPIO_GPIO);
=A0=A0 =A0printf("Before PHY reset\n");=
=A0=A0 =A0GPIO_CLEAR(CFG_ETHPHY_RST);
=A0=A0 =A0udelay(200);
=A0=A0 =A0GPIO_SET(CFG_ETHPHY_RST);
=A0=A0 =A0printf("After PHY reset\n");
=A0=A0 = =A0
}

And then I call it in the fe= c_probe() to ensure the fec is reset properly before settings.
I already tested the fec on u-boot and it works fine, so i tought it c= an help me with barebox but it seems there are some differences between cod= es.

For now Im trying to see if it can be a cpu fr= equence problem because I have an errata on the pll that shifts all my freq= uencies and so I have to adjust them in the lowlevelinit...

So I would like to know if the clock initialization is = taking effect if I boot from RAM ? Do I have t boot from flash ?
=
Thanks again.

Here is what


2011/7/12 Sascha Hauer <s.hauer@pengutroni= x.de>
On Tue, Jul 12, 2011 at 03:54:43PM +0200, Sascha Hauer wrote:
> On Mon, Jul 11, 2011 at 05:14:54PM +0200, Kamel BOUHARA wrote:
> > Hi,
> >
> > Im trying to port barebox to my Armadeus apf27 board (based on th= e Freescale
> > imx27 with a 512MiB NAND and 1GB of SDRAM).
> > I've first tried the phytec imx27 configuration and I got it = worked until
> > the Linux uncompressing task (the machine ID is bad so I didn'= ;t expect it
> > will boot fine :)).
> > So I just copied the phycard-imx27 board directory and I followed= the
> > boards.dox in order to add support for my board.
> > But when I've tried to boot again it was not working anymore = ...
> >
> > There are somethings stranges with the FEC, here is the result of= a memory
> > display with both phytec and my own board :
> >
> > > barebox@Phytec phyCard-i.MX27:/ md -s /dev/phy0
> > >
> > > 00000000: ffffffff ffffffff ffffffff ffffffff ..............= ..
> > >
> > > 00000010: ffffffff ffffffff ffffffff ffffffff ..............= ..
> > >
> > > 00000020: ffffffff ffffffff ffffffff ffffffff ..............= ..
> > >
> > > 00000030: ffffffff ffffffff ffffffff ffffffff ..............= ..
>
> This means your phy is not configured correctly. Do you usse the corre= ct
> address (can be passed in platform_data).

GPIO pins which hold the phy in reset are another thing which might g= o
wrong.

Sascha

--
Pengutronix e.K. =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 | =A0 = =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 |
Industrial Linux Solutions =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 | http://www.pengutronix.de/ = =A0|
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 =A0 = =A0|
Amtsgericht Hildesheim, HRA 2686 =A0 =A0 =A0 =A0 =A0 | Fax: =A0 +49-5121-20= 6917-5555 |



--
__________________________________
Kamel BOUHARA
7 rue Jule= s C=E9sar
02100 SAINT-QUENTIN
06.17.83.29.04





--
__________________________________Kamel BOUHARA
7 rue Jules C=E9sar
02100 SAINT-QUENTIN
06.17.83.29.04
=

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